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Ghennadi Procopciucb47d0852024-09-12 09:20:08 +03001/*
2 * Copyright 2023-2024 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6#include <lib/mmio.h>
7#include <lib/utils_def.h>
8#include <s32cc-mc-rgm.h>
9
10#define MC_RGM_PRST(MC_RGM, PER) ((MC_RGM) + 0x40UL + ((PER) * 0x8UL))
11
12/* ERR051700
13 * Releasing more than one Software Resettable Domain (SRD)
14 * from reset simultaneously, by clearing the corresponding
15 * peripheral MC_RGM_PRSTn[PERIPH_x_RST] reset control may
16 * cause a false setting of the Fault Collection and
17 * Control Unit (FCCU) Non-Critical Fault (NCF) flag
18 * corresponding to a Memory-Test-Repair (MTR) Error
19 */
20#if (ERRATA_S32_051700 == 1)
21void mc_rgm_periph_reset(uintptr_t rgm, uint32_t part, uint32_t value)
22{
23 uint32_t current_bit_checked, i;
24 uint32_t current_regs, mask;
25 int bit_index;
26
27 current_regs = mmio_read_32(MC_RGM_PRST(rgm, part));
28 /* Create a mask with all changed bits */
29 mask = current_regs ^ value;
30
31 while (mask != 0U) {
32 bit_index = __builtin_ffs(mask);
33 if (bit_index < 1) {
34 break;
35 }
36
37 i = (uint32_t)bit_index - 1U;
38 current_bit_checked = BIT_32(i);
39
40 /* Check if we assert or de-assert.
41 * Also wait for completion.
42 */
43 if ((value & current_bit_checked) != 0U) {
44 mmio_setbits_32(MC_RGM_PRST(rgm, part),
45 current_bit_checked);
46 while ((mmio_read_32(MC_RGM_PRST(rgm, part)) &
47 current_bit_checked) == 0U)
48 ;
49 } else {
50 mmio_clrbits_32(MC_RGM_PRST(rgm, part),
51 current_bit_checked);
52 while ((mmio_read_32(MC_RGM_PRST(rgm, part)) &
53 current_bit_checked) != 0U)
54 ;
55 }
56
57 mask &= ~current_bit_checked;
58 }
59}
60#else /* ERRATA_S32_051700 */
61void mc_rgm_periph_reset(uintptr_t rgm, uint32_t part, uint32_t value)
62{
63 mmio_write_32(MC_RGM_PRST(rgm, part), value);
64}
65#endif /* ERRATA_S32_051700 */