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Sandrine Bailleux01b916b2014-07-17 16:06:39 +01001/*
2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <arch_helpers.h>
32#include <assert.h>
33#include <bl_common.h>
34#include <debug.h>
35#include <mmio.h>
36#include <platform.h>
37#include <platform_def.h>
38#include <xlat_tables.h>
39#include "../juno_def.h"
40
Soby Mathewd0ecd972014-09-03 17:48:44 +010041#define MAP_MHU_SECURE MAP_REGION_FLAT(MHU_SECURE_BASE, \
42 MHU_SECURE_SIZE, \
43 (MHU_PAYLOAD_CACHED ? \
44 MT_MEMORY : MT_DEVICE) \
45 | MT_RW | MT_SECURE)
46
47#define MAP_FLASH MAP_REGION_FLAT(FLASH_BASE, \
48 FLASH_SIZE, \
49 MT_MEMORY | MT_RO | MT_SECURE)
50
51#define MAP_IOFPGA MAP_REGION_FLAT(IOFPGA_BASE, \
52 IOFPGA_SIZE, \
53 MT_DEVICE | MT_RW | MT_SECURE)
54
55#define MAP_DEVICE0 MAP_REGION_FLAT(DEVICE0_BASE, \
56 DEVICE0_SIZE, \
57 MT_DEVICE | MT_RW | MT_SECURE)
58
59#define MAP_DEVICE1 MAP_REGION_FLAT(DEVICE1_BASE, \
60 DEVICE1_SIZE, \
61 MT_DEVICE | MT_RW | MT_SECURE)
62
Juan Castillo740134e2014-09-05 17:29:38 +010063#define MAP_NS_DRAM MAP_REGION_FLAT(DRAM_NS_BASE, \
64 DRAM_NS_SIZE, \
Soby Mathewd0ecd972014-09-03 17:48:44 +010065 MT_MEMORY | MT_RW | MT_NS)
Juan Castillo740134e2014-09-05 17:29:38 +010066
67#define MAP_TSP_MEM MAP_REGION_FLAT(TSP_SEC_MEM_BASE, \
68 TSP_SEC_MEM_SIZE, \
69 MT_MEMORY | MT_RW | MT_SECURE)
70
Sandrine Bailleux01b916b2014-07-17 16:06:39 +010071/*
Soby Mathewd0ecd972014-09-03 17:48:44 +010072 * Table of regions for different BL stages to map using the MMU.
Sandrine Bailleux01b916b2014-07-17 16:06:39 +010073 * This doesn't include Trusted RAM as the 'mem_layout' argument passed to
74 * configure_mmu_elx() will give the available subset of that,
75 */
Soby Mathewd0ecd972014-09-03 17:48:44 +010076#if IMAGE_BL1
Sandrine Bailleux01b916b2014-07-17 16:06:39 +010077static const mmap_region_t juno_mmap[] = {
Soby Mathewd0ecd972014-09-03 17:48:44 +010078 MAP_MHU_SECURE,
79 MAP_FLASH,
80 MAP_IOFPGA,
81 MAP_DEVICE0,
82 MAP_DEVICE1,
Sandrine Bailleux01b916b2014-07-17 16:06:39 +010083 {0}
84};
Soby Mathewd0ecd972014-09-03 17:48:44 +010085#endif
86#if IMAGE_BL2
87static const mmap_region_t juno_mmap[] = {
88 MAP_MHU_SECURE,
89 MAP_FLASH,
90 MAP_IOFPGA,
91 MAP_DEVICE0,
92 MAP_DEVICE1,
Juan Castillo740134e2014-09-05 17:29:38 +010093 MAP_NS_DRAM,
94 MAP_TSP_MEM,
Soby Mathewd0ecd972014-09-03 17:48:44 +010095 {0}
96};
97#endif
98#if IMAGE_BL31
99static const mmap_region_t juno_mmap[] = {
100 MAP_MHU_SECURE,
101 MAP_IOFPGA,
102 MAP_DEVICE0,
103 MAP_DEVICE1,
104 {0}
105};
106#endif
107#if IMAGE_BL32
108static const mmap_region_t juno_mmap[] = {
109 MAP_IOFPGA,
110 MAP_DEVICE0,
111 MAP_DEVICE1,
112 {0}
113};
114#endif
Sandrine Bailleux01b916b2014-07-17 16:06:39 +0100115
116/*******************************************************************************
117 * Macro generating the code for the function setting up the pagetables as per
118 * the platform memory map & initialize the mmu, for the given exception level
119 ******************************************************************************/
120#define DEFINE_CONFIGURE_MMU_EL(_el) \
121 void configure_mmu_el##_el(unsigned long total_base, \
122 unsigned long total_size, \
123 unsigned long ro_start, \
124 unsigned long ro_limit, \
125 unsigned long coh_start, \
126 unsigned long coh_limit) \
127 { \
128 mmap_add_region(total_base, total_base, \
129 total_size, \
130 MT_MEMORY | MT_RW | MT_SECURE); \
131 mmap_add_region(ro_start, ro_start, \
132 ro_limit - ro_start, \
133 MT_MEMORY | MT_RO | MT_SECURE); \
134 mmap_add_region(coh_start, coh_start, \
135 coh_limit - coh_start, \
136 MT_DEVICE | MT_RW | MT_SECURE); \
137 mmap_add(juno_mmap); \
138 init_xlat_tables(); \
139 \
140 enable_mmu_el##_el(0); \
141 }
142
143/* Define EL1 and EL3 variants of the function initialising the MMU */
144DEFINE_CONFIGURE_MMU_EL(1)
145DEFINE_CONFIGURE_MMU_EL(3)
146
147
148unsigned long plat_get_ns_image_entrypoint(void)
149{
150 return NS_IMAGE_OFFSET;
151}
152
153uint64_t plat_get_syscnt_freq(void)
154{
155 uint64_t counter_base_frequency;
156
157 /* Read the frequency from Frequency modes table */
158 counter_base_frequency = mmio_read_32(SYS_CNTCTL_BASE + CNTFID_OFF);
159
160 /* The first entry of the frequency modes table must not be 0 */
161 if (counter_base_frequency == 0)
162 panic();
163
164 return counter_base_frequency;
165}