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Michal Simek1d333e62022-08-31 16:45:14 +02001/*
Michal Simek619bc132023-04-14 08:43:51 +02002 * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved.
Michal Simek1d333e62022-08-31 16:45:14 +02003 * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved.
Michal Simek27749652023-04-25 14:14:06 +02004 * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved.
Michal Simek1d333e62022-08-31 16:45:14 +02005 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9#include <common/debug.h>
10#include <plat/common/platform.h>
11
12#include <plat_private.h>
13#include <platform_def.h>
14
15static const uint8_t plat_power_domain_tree_desc[] = {
16 /* Number of root nodes */
17 1,
18 /* Number of clusters */
19 PLATFORM_CLUSTER_COUNT,
20 /* Number of children for the first cluster node */
21 PLATFORM_CORE_COUNT_PER_CLUSTER,
22 /* Number of children for the second cluster node */
23 PLATFORM_CORE_COUNT_PER_CLUSTER,
24 /* Number of children for the third cluster node */
25 PLATFORM_CORE_COUNT_PER_CLUSTER,
26 /* Number of children for the fourth cluster node */
27 PLATFORM_CORE_COUNT_PER_CLUSTER,
28};
29
30const uint8_t *plat_get_power_domain_tree_desc(void)
31{
32 return plat_power_domain_tree_desc;
33}
34
35/*******************************************************************************
36 * This function implements a part of the critical interface between the psci
37 * generic layer and the platform that allows the former to query the platform
38 * to convert an MPIDR to a unique linear index. An error code (-1) is returned
39 * in case the MPIDR is invalid.
40 ******************************************************************************/
41int32_t plat_core_pos_by_mpidr(u_register_t mpidr)
42{
43 uint32_t cluster_id, cpu_id;
Maheedhar Bollapalli5003a332024-10-29 03:34:49 +000044 int32_t ret;
Michal Simek1d333e62022-08-31 16:45:14 +020045
46 mpidr &= MPIDR_AFFINITY_MASK;
47
Maheedhar Bollapallid51c8e42024-10-22 06:53:27 +000048 cluster_id = (uint32_t)MPIDR_AFFLVL2_VAL(mpidr);
49 cpu_id = (uint32_t)MPIDR_AFFLVL1_VAL(mpidr);
Michal Simek1d333e62022-08-31 16:45:14 +020050
51 if (cluster_id >= PLATFORM_CLUSTER_COUNT) {
Maheedhar Bollapalli5003a332024-10-29 03:34:49 +000052 ret = E_INVALID_CLUSTER_COUNT;
53 goto exit_label;
Michal Simek1d333e62022-08-31 16:45:14 +020054 }
55
56 /*
57 * Validate cpu_id by checking whether it represents a CPU in
58 * one of the two clusters present on the platform.
59 */
60 if (cpu_id >= PLATFORM_CORE_COUNT_PER_CLUSTER) {
Maheedhar Bollapalli5003a332024-10-29 03:34:49 +000061 ret = E_INVALID_CORE_COUNT;
62 } else {
63 ret = (int32_t)(cpu_id + (cluster_id * PLATFORM_CORE_COUNT_PER_CLUSTER));
Michal Simek1d333e62022-08-31 16:45:14 +020064 }
65
Maheedhar Bollapalli5003a332024-10-29 03:34:49 +000066exit_label:
67 return ret;
Michal Simek1d333e62022-08-31 16:45:14 +020068}