Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 1 | /* |
Dan Handley | e83b0ca | 2014-01-14 18:17:09 +0000 | [diff] [blame] | 2 | * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
Dan Handley | 97043ac | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 31 | #include <arch.h> |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 32 | #include <arch_helpers.h> |
Dan Handley | 97043ac | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 33 | #include <assert.h> |
| 34 | #include <bl_common.h> |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 35 | #include <bl1.h> |
Dan Handley | 97043ac | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 36 | #include <platform.h> |
| 37 | #include <stdio.h> |
Dan Handley | 5b827a8 | 2014-04-17 18:53:42 +0100 | [diff] [blame] | 38 | #include "bl1_private.h" |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 39 | |
| 40 | /******************************************************************************* |
Vikram Kanigiri | 29fb905 | 2014-05-15 18:27:15 +0100 | [diff] [blame^] | 41 | * Runs BL2 from the given entry point. It results in dropping the |
| 42 | * exception level |
| 43 | ******************************************************************************/ |
| 44 | static void __dead2 bl1_run_bl2(el_change_info_t *bl2_ep) |
| 45 | { |
| 46 | bl1_arch_next_el_setup(); |
| 47 | |
| 48 | /* Tell next EL what we want done */ |
| 49 | bl2_ep->args.arg0 = RUN_IMAGE; |
| 50 | |
| 51 | if (bl2_ep->security_state == NON_SECURE) |
| 52 | change_security_state(bl2_ep->security_state); |
| 53 | |
| 54 | write_spsr_el3(bl2_ep->spsr); |
| 55 | write_elr_el3(bl2_ep->entrypoint); |
| 56 | |
| 57 | eret(bl2_ep->args.arg0, |
| 58 | bl2_ep->args.arg1, |
| 59 | bl2_ep->args.arg2, |
| 60 | bl2_ep->args.arg3, |
| 61 | bl2_ep->args.arg4, |
| 62 | bl2_ep->args.arg5, |
| 63 | bl2_ep->args.arg6, |
| 64 | bl2_ep->args.arg7); |
| 65 | } |
| 66 | |
| 67 | |
| 68 | /******************************************************************************* |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 69 | * Function to perform late architectural and platform specific initialization. |
| 70 | * It also locates and loads the BL2 raw binary image in the trusted DRAM. Only |
| 71 | * called by the primary cpu after a cold boot. |
| 72 | * TODO: Add support for alternative image load mechanism e.g using virtio/elf |
| 73 | * loader etc. |
| 74 | ******************************************************************************/ |
| 75 | void bl1_main(void) |
| 76 | { |
James Morrissey | 40a6f64 | 2014-02-10 14:24:36 +0000 | [diff] [blame] | 77 | #if DEBUG |
Vikram Kanigiri | 6ba0b6d | 2014-03-11 17:41:00 +0000 | [diff] [blame] | 78 | unsigned long sctlr_el3 = read_sctlr_el3(); |
James Morrissey | 40a6f64 | 2014-02-10 14:24:36 +0000 | [diff] [blame] | 79 | #endif |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 80 | unsigned long bl2_base; |
Vikram Kanigiri | 29fb905 | 2014-05-15 18:27:15 +0100 | [diff] [blame^] | 81 | unsigned int load_type = TOP_LOAD; |
Dan Handley | fb037bf | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 82 | meminfo_t *bl1_tzram_layout; |
| 83 | meminfo_t *bl2_tzram_layout = 0x0; |
Vikram Kanigiri | 29fb905 | 2014-05-15 18:27:15 +0100 | [diff] [blame^] | 84 | el_change_info_t bl2_ep = {0}; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 85 | |
| 86 | /* |
| 87 | * Ensure that MMU/Caches and coherency are turned on |
| 88 | */ |
| 89 | assert(sctlr_el3 | SCTLR_M_BIT); |
| 90 | assert(sctlr_el3 | SCTLR_C_BIT); |
| 91 | assert(sctlr_el3 | SCTLR_I_BIT); |
| 92 | |
| 93 | /* Perform remaining generic architectural setup from EL3 */ |
| 94 | bl1_arch_setup(); |
| 95 | |
| 96 | /* Perform platform setup in BL1. */ |
| 97 | bl1_platform_setup(); |
| 98 | |
| 99 | /* Announce our arrival */ |
| 100 | printf(FIRMWARE_WELCOME_STR); |
Jon Medhurst | fb05246 | 2014-02-17 12:18:24 +0000 | [diff] [blame] | 101 | printf("%s\n\r", build_message); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 102 | |
| 103 | /* |
| 104 | * Find out how much free trusted ram remains after BL1 load |
| 105 | * & load the BL2 image at its top |
| 106 | */ |
Sandrine Bailleux | ee12f6f | 2013-11-28 14:55:58 +0000 | [diff] [blame] | 107 | bl1_tzram_layout = bl1_plat_sec_mem_layout(); |
| 108 | bl2_base = load_image(bl1_tzram_layout, |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 109 | (const char *) BL2_IMAGE_NAME, |
| 110 | load_type, BL2_BASE); |
| 111 | |
| 112 | /* |
| 113 | * Create a new layout of memory for BL2 as seen by BL1 i.e. |
| 114 | * tell it the amount of total and free memory available. |
| 115 | * This layout is created at the first free address visible |
| 116 | * to BL2. BL2 will read the memory layout before using its |
| 117 | * memory for other purposes. |
| 118 | */ |
Dan Handley | fb037bf | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 119 | bl2_tzram_layout = (meminfo_t *) bl1_tzram_layout->free_base; |
Sandrine Bailleux | ee12f6f | 2013-11-28 14:55:58 +0000 | [diff] [blame] | 120 | init_bl2_mem_layout(bl1_tzram_layout, |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 121 | bl2_tzram_layout, |
| 122 | load_type, |
| 123 | bl2_base); |
| 124 | |
| 125 | if (bl2_base) { |
Vikram Kanigiri | 29fb905 | 2014-05-15 18:27:15 +0100 | [diff] [blame^] | 126 | bl2_ep.spsr = |
| 127 | SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); |
| 128 | bl2_ep.entrypoint = bl2_base; |
| 129 | bl2_ep.security_state = SECURE; |
| 130 | bl2_ep.args.arg1 = (unsigned long)bl2_tzram_layout; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 131 | printf("Booting trusted firmware boot loader stage 2\n\r"); |
| 132 | #if DEBUG |
| 133 | printf("BL2 address = 0x%llx \n\r", (unsigned long long) bl2_base); |
Vikram Kanigiri | 29fb905 | 2014-05-15 18:27:15 +0100 | [diff] [blame^] | 134 | printf("BL2 cpsr = 0x%x \n\r", bl2_ep.spsr); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 135 | printf("BL2 memory layout address = 0x%llx \n\r", |
| 136 | (unsigned long long) bl2_tzram_layout); |
| 137 | #endif |
Vikram Kanigiri | 29fb905 | 2014-05-15 18:27:15 +0100 | [diff] [blame^] | 138 | bl1_run_bl2(&bl2_ep); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 139 | } |
| 140 | |
| 141 | /* |
| 142 | * TODO: print failure to load BL2 but also add a tzwdog timer |
| 143 | * which will reset the system eventually. |
| 144 | */ |
| 145 | printf("Failed to load boot loader stage 2 (BL2) firmware.\n\r"); |
| 146 | return; |
| 147 | } |
| 148 | |
| 149 | /******************************************************************************* |
| 150 | * Temporary function to print the fact that BL2 has done its job and BL31 is |
| 151 | * about to be loaded. This is needed as long as printfs cannot be used |
| 152 | ******************************************************************************/ |
Vikram Kanigiri | 29fb905 | 2014-05-15 18:27:15 +0100 | [diff] [blame^] | 153 | void display_boot_progress(el_change_info_t *bl31_ep_info) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 154 | { |
| 155 | printf("Booting trusted firmware boot loader stage 3\n\r"); |
| 156 | #if DEBUG |
Vikram Kanigiri | 29fb905 | 2014-05-15 18:27:15 +0100 | [diff] [blame^] | 157 | printf("BL31 address = 0x%llx\n", |
| 158 | (unsigned long long)bl31_ep_info->entrypoint); |
| 159 | printf("BL31 cpsr = 0x%llx\n", |
| 160 | (unsigned long long)bl31_ep_info->spsr); |
| 161 | printf("BL31 args address = 0x%llx\n", |
| 162 | (unsigned long long)bl31_ep_info->args.arg0); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 163 | #endif |
| 164 | return; |
| 165 | } |