blob: 859791dc192cf0e2fc21354f23648a82a17b9c08 [file] [log] [blame]
Dan Handleyb4315302015-03-19 18:58:55 +00001#
Harrison Mutaia5566f62023-12-01 15:50:00 +00002# Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
Dan Handleyb4315302015-03-19 18:58:55 +00003#
dp-arm82cb2c12017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Dan Handleyb4315302015-03-19 18:58:55 +00005#
6
Chris Kay1fa05da2021-09-28 15:52:14 +01007include common/fdt_wrappers.mk
8
Juan Pablo Conde043f38f2023-08-09 13:19:21 -05009ifeq (${ARCH},aarch32)
10 ifeq (${AARCH32_SP},none)
11 $(error Variable AARCH32_SP has to be set for AArch32)
12 endif
13endif
14
Soby Mathew877cf3f2016-07-11 14:13:56 +010015ifeq (${ARCH}, aarch64)
16 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted
17 # DRAM (if available) or the TZC secured area of DRAM.
Dimitris Papastamos66db10c2018-01-02 10:25:50 +000018 # TZC secured DRAM is the default.
Dan Handleyb4315302015-03-19 18:58:55 +000019
Dimitris Papastamos66db10c2018-01-02 10:25:50 +000020 ARM_TSP_RAM_LOCATION ?= dram
Qixiang Xu7ca267b2017-10-13 09:04:12 +080021
Soby Mathew877cf3f2016-07-11 14:13:56 +010022 ifeq (${ARM_TSP_RAM_LOCATION}, tsram)
23 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
24 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram)
25 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID
26 else ifeq (${ARM_TSP_RAM_LOCATION}, dram)
27 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID
28 else
Salman Nabi4f321792024-06-19 17:18:26 +010029 $(error Unsupported ARM_TSP_RAM_LOCATION value)
Soby Mathew877cf3f2016-07-11 14:13:56 +010030 endif
31
32 # Process flags
Soby Mathew877cf3f2016-07-11 14:13:56 +010033 # Process ARM_BL31_IN_DRAM flag
34 ARM_BL31_IN_DRAM := 0
35 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
36 $(eval $(call add_define,ARM_BL31_IN_DRAM))
Roberto Vargasd58f3ca2017-10-20 10:46:23 +010037else
38 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
Dan Handleyb4315302015-03-19 18:58:55 +000039endif
40
Roberto Vargasd58f3ca2017-10-20 10:46:23 +010041$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))
42
43
Soby Mathew2204afd2015-04-16 14:49:09 +010044# For the original power-state parameter format, the State-ID can be encoded
45# according to the recommended encoding or zero. This flag determines which
46# State-ID encoding to be parsed.
47ARM_RECOM_STATE_ID_ENC := 0
48
Douglas Raillard91a422d2016-11-07 17:29:34 +000049# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to
50# be set. Else throw a build error.
Soby Mathew2204afd2015-04-16 14:49:09 +010051ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
52 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
Douglas Raillard91a422d2016-11-07 17:29:34 +000053 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
54 PSCI_EXTENDED_STATE_ID is set for ARM platforms)
Soby Mathew2204afd2015-04-16 14:49:09 +010055 endif
56endif
57
58# Process ARM_RECOM_STATE_ID_ENC flag
59$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
60$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
61
Juan Castillo7b4c1402015-10-06 14:01:35 +010062# Process ARM_DISABLE_TRUSTED_WDOG flag
Zelalem Aweke07e96d12021-10-01 12:30:49 -050063# By default, Trusted Watchdog is always enabled unless
64# SPIN_ON_BL1_EXIT or ENABLE_RME is set
Juan Castillo7b4c1402015-10-06 14:01:35 +010065ARM_DISABLE_TRUSTED_WDOG := 0
Zelalem Aweke07e96d12021-10-01 12:30:49 -050066ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),)
Juan Castillo7b4c1402015-10-06 14:01:35 +010067ARM_DISABLE_TRUSTED_WDOG := 1
68endif
69$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
70$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
71
Juan Castillo0e5dcdd2015-11-06 16:02:32 +000072# Process ARM_CONFIG_CNTACR
73ARM_CONFIG_CNTACR := 1
74$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
75$(eval $(call add_define,ARM_CONFIG_CNTACR))
76
David Wang4518dd92016-03-07 11:02:57 +080077# Process ARM_BL31_IN_DRAM flag
78ARM_BL31_IN_DRAM := 0
79$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
80$(eval $(call add_define,ARM_BL31_IN_DRAM))
81
Sandrine Bailleux1164a592022-07-04 11:17:43 +020082# As per CCA security model, all root firmware must execute from on-chip secure
83# memory. This means we must not run BL31 from TZC-protected DRAM.
84ifeq (${ARM_BL31_IN_DRAM},1)
85 ifeq (${ENABLE_RME},1)
Salman Nabi4f321792024-06-19 17:18:26 +010086 $(error BL31 must not run from DRAM on RME-systems. Please set ARM_BL31_IN_DRAM to 0)
Sandrine Bailleux1164a592022-07-04 11:17:43 +020087 endif
88endif
89
Summer Qind8d6cf22017-02-28 16:46:17 +000090# Process ARM_PLAT_MT flag
91ARM_PLAT_MT := 0
92$(eval $(call assert_boolean,ARM_PLAT_MT))
93$(eval $(call add_define,ARM_PLAT_MT))
94
Antonio Nino Diaz3b211ff2017-04-11 14:04:56 +010095# Use translation tables library v2 by default
96ARM_XLAT_TABLES_LIB_V1 := 0
97$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
98$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
99
Antonio Nino Diazb726c162018-05-11 11:15:10 +0100100# Don't have the Linux kernel as a BL33 image by default
101ARM_LINUX_KERNEL_AS_BL33 := 0
102$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
103$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
104
105ifeq (${ARM_LINUX_KERNEL_AS_BL33},1)
Andre Przywarae27340a2021-02-08 17:40:48 +0000106 ifneq (${ARCH},aarch64)
Manish Pandeyed2c4f42018-11-02 13:28:25 +0000107 ifneq (${RESET_TO_SP_MIN},1)
Salman Nabi4f321792024-06-19 17:18:26 +0100108 $(error ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.)
Manish Pandeyed2c4f42018-11-02 13:28:25 +0000109 endif
Antonio Nino Diazb726c162018-05-11 11:15:10 +0100110 endif
111 ifndef PRELOADED_BL33_BASE
Salman Nabi4f321792024-06-19 17:18:26 +0100112 $(error PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.)
Antonio Nino Diazb726c162018-05-11 11:15:10 +0100113 endif
Zelalem Aweke672d6692021-07-26 21:39:05 -0500114 ifeq (${RESET_TO_BL31},1)
115 ifndef ARM_PRELOADED_DTB_BASE
Salman Nabi4f321792024-06-19 17:18:26 +0100116 $(error ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used with RESET_TO_BL31.)
Zelalem Aweke672d6692021-07-26 21:39:05 -0500117 endif
118 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
Antonio Nino Diazb726c162018-05-11 11:15:10 +0100119 endif
Antonio Nino Diazb726c162018-05-11 11:15:10 +0100120endif
121
Summer Qin71fb3962017-04-20 16:28:39 +0100122# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
123# in the FIP if the platform requires.
124ifneq ($(BL32_EXTRA1),)
Masahiro Yamada33950dd2018-01-26 11:42:01 +0900125$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
Summer Qin71fb3962017-04-20 16:28:39 +0100126endif
127ifneq ($(BL32_EXTRA2),)
Masahiro Yamada33950dd2018-01-26 11:42:01 +0900128$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
Summer Qin71fb3962017-04-20 16:28:39 +0100129endif
130
Soby Mathewd75f2572016-05-23 16:07:53 +0100131# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
Soby Mathew877cf3f2016-07-11 14:13:56 +0100132ENABLE_PSCI_STAT := 1
dp-arm04c1db12017-01-31 13:01:04 +0000133ENABLE_PMF := 1
Soby Mathewd75f2572016-05-23 16:07:53 +0100134
Alexei Fedorove3f2b1a2020-09-01 15:38:32 +0100135# Override the standard libc with optimised libc_asm
136OVERRIDE_LIBC := 1
137ifeq (${OVERRIDE_LIBC},1)
138 include lib/libc/libc_asm.mk
139endif
140
Sandrine Bailleux0af559a2016-07-08 14:38:16 +0100141# On ARM platforms, separate the code and read-only data sections to allow
142# mapping the former as executable and the latter as execute-never.
143SEPARATE_CODE_AND_RODATA := 1
144
Madhukar Pappireddy0c1f1972020-01-27 15:38:26 -0600145# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS
146# and NOBITS sections of BL31 image are adjacent to each other and loaded
147# into Trusted SRAM.
148SEPARATE_NOBITS_REGION := 0
149
150# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load
151# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate
152# the build to require that ARM_BL31_IN_DRAM is enabled as well.
153ifeq ($(SEPARATE_NOBITS_REGION),1)
154 ifneq ($(ARM_BL31_IN_DRAM),1)
155 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled)
156 endif
157 ifneq ($(RECLAIM_INIT_CODE),0)
158 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported)
159 endif
160endif
161
Manish Pandey7285fd52021-06-10 15:22:48 +0100162# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case
163ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),)
164 ENABLE_PIE := 1
Manish Pandey133a5c62019-11-06 13:17:46 +0000165endif
166
Manish V Badarkheef1daa42021-02-22 17:30:17 +0000167# Disable GPT parser support, use FIP image by default
168ARM_GPT_SUPPORT := 0
169$(eval $(call assert_boolean,ARM_GPT_SUPPORT))
170$(eval $(call add_define,ARM_GPT_SUPPORT))
171
172# Include necessary sources to parse GPT image
173ifeq (${ARM_GPT_SUPPORT}, 1)
174 BL2_SOURCES += drivers/partition/gpt.c \
175 drivers/partition/partition.c
176endif
177
Manish V Badarkhea1cedad2021-04-22 14:41:27 +0100178# Enable CRC instructions via extension for ARMv8-A CPUs.
179# For ARMv8.1-A, and onwards CRC instructions are default enabled.
180# Enable HW computed CRC support unconditionally in BL2 component.
Diego Sueiro4202cd52022-11-03 17:01:39 +0000181ifeq (${ARM_ARCH_MAJOR},8)
182 ifeq (${ARM_ARCH_MINOR},0)
183 BL2_CPPFLAGS += -march=armv8-a+crc
184 endif
Manish V Badarkhea1cedad2021-04-22 14:41:27 +0100185endif
186
Manish V Badarkhe2f1177b2021-06-25 23:43:33 +0100187ifeq ($(PSA_FWU_SUPPORT),1)
188 # GPT support is recommended as per PSA FWU specification hence
189 # PSA FWU implementation is tightly coupled with GPT support,
190 # and it does not support other formats.
191 ifneq ($(ARM_GPT_SUPPORT),1)
192 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled)
193 endif
194 FWU_MK := drivers/fwu/fwu.mk
195 $(info Including ${FWU_MK})
196 include ${FWU_MK}
197endif
198
Soby Mathew877cf3f2016-07-11 14:13:56 +0100199ifeq (${ARCH}, aarch64)
200PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64
201endif
Dan Handleyb4315302015-03-19 18:58:55 +0000202
Antonio Nino Diaz3b211ff2017-04-11 14:04:56 +0100203PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \
Antonio Nino Diaz88a05232018-06-19 09:29:36 +0100204 plat/arm/common/arm_common.c \
205 plat/arm/common/arm_console.c
Antonio Nino Diaz3b211ff2017-04-11 14:04:56 +0100206
207ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
Gary Morrison5fb061e2021-01-27 13:08:47 -0600208PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \
Antonio Nino Diaz3b211ff2017-04-11 14:04:56 +0100209 lib/xlat_tables/${ARCH}/xlat_tables.c
210else
Gary Morrison5fb061e2021-01-27 13:08:47 -0600211ifeq (${XLAT_MPU_LIB_V1}, 1)
212include lib/xlat_mpu/xlat_mpu.mk
213PLAT_BL_COMMON_SOURCES += ${XLAT_MPU_LIB_V1_SRCS}
214else
Antonio Nino Diazbf75a372017-02-23 17:22:58 +0000215include lib/xlat_tables_v2/xlat_tables.mk
Gary Morrison5fb061e2021-01-27 13:08:47 -0600216PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
217endif
Antonio Nino Diaz3b211ff2017-04-11 14:04:56 +0100218endif
Dan Handleyb4315302015-03-19 18:58:55 +0000219
Louis Mayencourta6de8242020-02-28 16:57:30 +0000220ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \
Louis Mayencourt0a6e7e32019-10-24 15:18:46 +0100221 plat/arm/common/fconf/arm_fconf_io.c
Olivier Deprez7cd64d12020-01-23 11:24:33 +0100222ifeq (${SPD},spmd)
Balint Dobszay46789a72021-03-26 16:23:18 +0100223 ifeq (${BL2_ENABLE_SP_LOAD},1)
Olivier Deprezc33ff192020-03-19 09:27:11 +0100224 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c
225 endif
Olivier Deprez7cd64d12020-01-23 11:24:33 +0100226endif
Louis Mayencourt0a6e7e32019-10-24 15:18:46 +0100227
Aditya Angadib0c97da2019-04-16 11:29:14 +0530228BL1_SOURCES += drivers/io/io_fip.c \
Dan Handleyb4315302015-03-19 18:58:55 +0000229 drivers/io/io_memmap.c \
230 drivers/io/io_storage.c \
231 plat/arm/common/arm_bl1_setup.c \
Soby Mathew7b569282018-03-07 11:32:04 +0000232 plat/arm/common/arm_err.c \
Louis Mayencourt0a6e7e32019-10-24 15:18:46 +0100233 ${ARM_IO_SOURCES}
234
Sandrine Bailleux4c117f62015-11-26 16:31:34 +0000235ifdef EL3_PAYLOAD_BASE
Dimitris Papastamos2a246d2e2018-06-18 13:01:06 +0100236# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from
Sandrine Bailleux4c117f62015-11-26 16:31:34 +0000237# their holding pen
238BL1_SOURCES += plat/arm/common/arm_pm.c
239endif
Dan Handleyb4315302015-03-19 18:58:55 +0000240
Soby Mathew18e279e2017-06-12 12:37:10 +0100241BL2_SOURCES += drivers/delay_timer/delay_timer.c \
242 drivers/delay_timer/generic_delay_timer.c \
243 drivers/io/io_fip.c \
Dan Handleyb4315302015-03-19 18:58:55 +0000244 drivers/io/io_memmap.c \
245 drivers/io/io_storage.c \
246 plat/arm/common/arm_bl2_setup.c \
Soby Mathew7b569282018-03-07 11:32:04 +0000247 plat/arm/common/arm_err.c \
Manish V Badarkhec885d5c2021-07-02 20:29:56 +0100248 common/tf_crc32.c \
Louis Mayencourt0a6e7e32019-10-24 15:18:46 +0100249 ${ARM_IO_SOURCES}
Roberto Vargas81528db2017-11-17 13:22:18 +0000250
Louis Mayencourtab1981d2019-08-08 12:03:26 +0100251# Firmware Configuration Framework sources
252include lib/fconf/fconf.mk
Roberto Vargas81528db2017-11-17 13:22:18 +0000253
Chris Kaye04da4c2021-05-20 13:22:43 +0100254BL1_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
255BL2_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
256
Soby Mathewcab0b5b2018-01-15 14:45:33 +0000257# Add `libfdt` and Arm common helpers required for Dynamic Config
258include lib/libfdt/libfdt.mk
Soby Mathew6e79f9f2018-03-26 15:16:46 +0100259
260DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \
Soby Mathewcab0b5b2018-01-15 14:45:33 +0000261 plat/arm/common/arm_dyn_cfg_helpers.c \
David Horstmann7d111d92021-04-08 14:50:21 +0100262 common/uuid.c
Soby Mathewcab0b5b2018-01-15 14:45:33 +0000263
Chris Kay1fa05da2021-09-28 15:52:14 +0100264DYN_CFG_SOURCES += ${FDT_WRAPPERS_SOURCES}
265
Soby Mathew6e79f9f2018-03-26 15:16:46 +0100266BL1_SOURCES += ${DYN_CFG_SOURCES}
267BL2_SOURCES += ${DYN_CFG_SOURCES}
268
Arvind Ram Prakash42d4d3b2022-11-22 14:41:00 -0600269ifeq (${RESET_TO_BL2},1)
Roberto Vargas81528db2017-11-17 13:22:18 +0000270BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c
271endif
272
Yatharth Kochar07570d52016-11-14 12:01:04 +0000273# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
274# the AArch32 descriptors.
275ifeq (${JUNO_AARCH32_EL3_RUNTIME},1)
276BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
277else
Vishnu Banavath0260eb02022-01-19 18:43:12 +0000278ifneq (${PLAT}, corstone1000)
Yatharth Kochar07570d52016-11-14 12:01:04 +0000279BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
280endif
Abdellatif El Khlifibf3ce992021-04-21 17:20:43 +0100281endif
Yatharth Kochar07570d52016-11-14 12:01:04 +0000282BL2_SOURCES += plat/arm/common/arm_image_load.c \
Yatharth Kochara8aa7fe2016-09-13 17:07:57 +0100283 common/desc_image_load.c
Summer Qin54661cd2017-04-24 16:49:28 +0100284ifeq (${SPD},opteed)
285BL2_SOURCES += lib/optee/optee_utils.c
286endif
Dan Handleyb4315302015-03-19 18:58:55 +0000287
Soby Mathew18e279e2017-06-12 12:37:10 +0100288BL2U_SOURCES += drivers/delay_timer/delay_timer.c \
289 drivers/delay_timer/generic_delay_timer.c \
290 plat/arm/common/arm_bl2u_setup.c
Yatharth Kochardcda29f2015-10-14 15:28:11 +0100291
Vikram Kanigiri6355f232016-02-15 11:54:14 +0000292BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \
Dan Handleyb4315302015-03-19 18:58:55 +0000293 plat/arm/common/arm_pm.c \
Dan Handleyb4315302015-03-19 18:58:55 +0000294 plat/arm/common/arm_topology.c \
Soby Mathewbb2162f2016-05-03 12:31:18 +0100295 plat/common/plat_psci_common.c
Juan Castillo1779ba62015-05-19 11:54:12 +0100296
Harrison Mutaia5566f62023-12-01 15:50:00 +0000297ifeq (${TRANSFER_LIST}, 1)
298 TRANSFER_LIST_SOURCES += plat/arm/common/arm_transfer_list.c
299endif
300
Rajasekaran Kalidoss352366e2023-05-08 14:55:13 +0200301ifneq ($(filter 1,${ENABLE_PMF} ${ETHOSN_NPU_DRIVER}),)
Mikael Olsson76a21172021-02-12 17:30:22 +0100302ARM_SVC_HANDLER_SRCS :=
303
304ifeq (${ENABLE_PMF},1)
305ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c
306endif
307
Rajasekaran Kalidoss352366e2023-05-08 14:55:13 +0200308ifeq (${ETHOSN_NPU_DRIVER},1)
Mikael Olsson76a21172021-02-12 17:30:22 +0100309ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \
310 drivers/delay_timer/delay_timer.c \
311 drivers/arm/ethosn/ethosn_smc.c
Rajasekaran Kalidoss352366e2023-05-08 14:55:13 +0200312ifeq (${ETHOSN_NPU_TZMP1},1)
Mikael Olsson313b7762023-01-13 09:56:41 +0100313ARM_SVC_HANDLER_SRCS += drivers/arm/ethosn/ethosn_big_fw.c
314endif
Mikael Olsson76a21172021-02-12 17:30:22 +0100315endif
316
Bence Szépkúti9d725192019-10-24 15:53:23 +0200317ifeq (${ARCH}, aarch64)
318BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\
319 plat/arm/common/arm_sip_svc.c \
Madhukar Pappireddy7a2130b2023-09-09 23:02:34 -0500320 plat/arm/common/plat_arm_sip_svc.c \
Mikael Olsson76a21172021-02-12 17:30:22 +0100321 ${ARM_SVC_HANDLER_SRCS}
Bence Szépkúti0531ada2019-11-07 12:09:24 +0100322else
323BL32_SOURCES += plat/arm/common/arm_sip_svc.c \
Madhukar Pappireddy7a2130b2023-09-09 23:02:34 -0500324 plat/arm/common/plat_arm_sip_svc.c \
Mikael Olsson76a21172021-02-12 17:30:22 +0100325 ${ARM_SVC_HANDLER_SRCS}
dp-armf10796a2016-09-19 11:21:03 +0100326endif
Bence Szépkúti9d725192019-10-24 15:53:23 +0200327endif
dp-armf10796a2016-09-19 11:21:03 +0100328
Jeenu Viswambharan0bef0ed2017-10-24 11:47:13 +0100329ifeq (${EL3_EXCEPTION_HANDLING},1)
Sandeep Tripathy262acea2020-08-12 18:42:13 +0530330BL31_SOURCES += plat/common/aarch64/plat_ehf.c
Jeenu Viswambharan0bef0ed2017-10-24 11:47:13 +0100331endif
332
Jeenu Viswambharan0baec2a2017-09-22 08:32:10 +0100333ifeq (${SDEI_SUPPORT},1)
334BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c
Balint Dobszaycbf9e842019-12-18 15:28:00 +0100335ifeq (${SDEI_IN_FCONF},1)
336BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c
337endif
Jeenu Viswambharan0baec2a2017-09-22 08:32:10 +0100338endif
339
Jeenu Viswambharan0b9ce902018-02-06 12:21:39 +0000340# RAS sources
Manish Pandeyf87e54f2023-10-10 15:42:19 +0100341ifeq (${ENABLE_FEAT_RAS}-${HANDLE_EA_EL3_FIRST_NS},1-1)
Jeenu Viswambharan0b9ce902018-02-06 12:21:39 +0000342BL31_SOURCES += lib/extensions/ras/std_err_record.c \
Jeenu Viswambharana7055c52018-06-08 08:44:36 +0100343 lib/extensions/ras/ras_common.c
Jeenu Viswambharan0b9ce902018-02-06 12:21:39 +0000344endif
345
Antonio Nino Diazff6844c2019-01-31 11:01:10 +0000346# Pointer Authentication sources
347ifeq (${ENABLE_PAUTH}, 1)
Boyan Karatotev90ce8b82023-01-13 16:47:07 +0000348PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c
Antonio Nino Diazff6844c2019-01-31 11:01:10 +0000349endif
350
Achin Guptac3fb00d2019-10-11 15:50:43 +0100351ifeq (${SPD},spmd)
352BL31_SOURCES += plat/common/plat_spmd_manifest.c \
David Horstmann7d111d92021-04-08 14:50:21 +0100353 common/uuid.c \
Achin Guptac3fb00d2019-10-11 15:50:43 +0100354 ${LIBFDT_SRCS}
355
Chris Kay1fa05da2021-09-28 15:52:14 +0100356BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
Achin Guptac3fb00d2019-10-11 15:50:43 +0100357endif
358
Manish V Badarkhe586f60c2022-07-12 21:48:04 +0100359ifeq (${DRTM_SUPPORT},1)
360BL31_SOURCES += plat/arm/common/arm_err.c
361endif
362
Manish V Badarkhe014975c2024-09-06 10:53:54 +0100363ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),)
364 PLAT_INCLUDES += -Iplat/arm/common \
365 -Iinclude/drivers/auth/mbedtls
366 # Specify mbed TLS configuration file
367 ifeq (${PSA_CRYPTO},1)
368 MBEDTLS_CONFIG_FILE ?= "<plat_arm_psa_mbedtls_config.h>"
369 else
370 MBEDTLS_CONFIG_FILE ?= "<plat_arm_mbedtls_config.h>"
371 endif
372endif
373
Juan Castillo1779ba62015-05-19 11:54:12 +0100374ifneq (${TRUSTED_BOARD_BOOT},0)
375
Juan Castillo1779ba62015-05-19 11:54:12 +0100376 # Include common TBB sources
Manish V Badarkhe88c51c32022-01-08 23:08:02 +0000377 AUTH_SOURCES := drivers/auth/auth_mod.c \
378 drivers/auth/img_parser_mod.c
Sandrine Bailleux3bff9102020-01-15 10:23:25 +0100379
380 # Include the selected chain of trust sources.
381 ifeq (${COT},tbbr)
laurenw-arme31fb0f2021-03-03 14:19:38 -0600382 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \
Manish V Badarkhe28e9a552020-07-23 10:43:57 +0100383 drivers/auth/tbbr/tbbr_cot_bl1.c
384 ifneq (${COT_DESC_IN_DTB},0)
385 BL2_SOURCES += lib/fconf/fconf_cot_getter.c
386 else
Rob Hughes33bcaed2023-01-17 16:10:26 +0000387 # Juno has its own TBBR CoT file for BL2
Xialin Liu479c8332024-07-10 14:35:33 -0500388 ifeq (${PLAT},juno)
389 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c
Rob Hughes33bcaed2023-01-17 16:10:26 +0000390 endif
Manish V Badarkhe28e9a552020-07-23 10:43:57 +0100391 endif
Sandrine Bailleux1035a702020-02-06 14:59:33 +0100392 else ifeq (${COT},dualroot)
Xialin Liu3146a702024-06-27 12:07:10 -0500393 BL1_SOURCES += drivers/auth/dualroot/bl1_cot.c
laurenw-arm731ac5e2024-05-14 12:51:26 -0500394 ifneq (${COT_DESC_IN_DTB},0)
395 BL2_SOURCES += lib/fconf/fconf_cot_getter.c
laurenw-arm731ac5e2024-05-14 12:51:26 -0500396 endif
laurenw-armf2423792022-04-21 16:50:49 -0500397 else ifeq (${COT},cca)
Xialin Liu3146a702024-06-27 12:07:10 -0500398 BL1_SOURCES += drivers/auth/cca/bl1_cot.c
laurenw-armb76a43c2023-11-28 13:42:36 -0600399 ifneq (${COT_DESC_IN_DTB},0)
400 BL2_SOURCES += lib/fconf/fconf_cot_getter.c
laurenw-armb76a43c2023-11-28 13:42:36 -0600401 endif
Sandrine Bailleux3bff9102020-01-15 10:23:25 +0100402 else
403 $(error Unknown chain of trust ${COT})
404 endif
Juan Castillo1779ba62015-05-19 11:54:12 +0100405
Xialin Liu0e0fab02024-06-28 12:52:29 -0500406 ifeq (${COT_DESC_IN_DTB},0)
407 ifeq (${COT},dualroot)
408 COTDTPATH := fdts/dualroot_cot_descriptors.dtsi
409 else ifeq (${COT},cca)
410 COTDTPATH := fdts/cca_cot_descriptors.dtsi
Xialin Liu479c8332024-07-10 14:35:33 -0500411 else ifeq (${COT},tbbr)
412 ifneq (${PLAT},juno)
413 COTDTPATH := fdts/tbbr_cot_descriptors.dtsi
414 endif
Xialin Liu0e0fab02024-06-28 12:52:29 -0500415 endif
Xialin Liu0e0fab02024-06-28 12:52:29 -0500416 endif
417
Yatharth Kochar843ddee2016-02-01 11:04:46 +0000418 BL1_SOURCES += ${AUTH_SOURCES} \
419 bl1/tbbr/tbbr_img_desc.c \
dp-armd35dee22016-12-12 14:48:13 +0000420 plat/arm/common/arm_bl1_fwu.c \
421 plat/common/tbbr/plat_tbbr.c
Yatharth Kochar436223d2015-10-11 14:14:55 +0100422
dp-armd35dee22016-12-12 14:48:13 +0000423 BL2_SOURCES += ${AUTH_SOURCES} \
Manish V Badarkheb58956e2020-05-27 09:39:42 +0100424 plat/common/tbbr/plat_tbbr.c
Juan Castillo1779ba62015-05-19 11:54:12 +0100425
Masahiro Yamada33950dd2018-01-26 11:42:01 +0900426 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_))
Yatharth Kochar01912622015-10-12 12:33:47 +0100427
Manish V Badarkhe88c51c32022-01-08 23:08:02 +0000428 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
429
430 $(info Including ${IMG_PARSER_LIB_MK})
431 include ${IMG_PARSER_LIB_MK}
432endif
433
Manish V Badarkhe14db9632021-10-06 23:41:50 +0100434# Include Measured Boot makefile before any Crypto library makefile.
435# Crypto library makefile may need default definitions of Measured Boot build
436# flags present in Measured Boot makefile.
Manish V Badarkhe40814262022-06-17 11:42:17 +0100437ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),)
Manish V Badarkhe14db9632021-10-06 23:41:50 +0100438 MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk
439 $(info Including ${MEASURED_BOOT_MK})
440 include ${MEASURED_BOOT_MK}
Manish V Badarkhe992d97c2022-01-18 22:40:17 +0000441
Manish V Badarkhe40814262022-06-17 11:42:17 +0100442 ifeq (${MEASURED_BOOT},1)
443 BL1_SOURCES += ${EVENT_LOG_SOURCES}
444 BL2_SOURCES += ${EVENT_LOG_SOURCES}
445 endif
446
447 ifeq (${DRTM_SUPPORT},1)
448 BL31_SOURCES += ${EVENT_LOG_SOURCES}
449 endif
Manish V Badarkhe14db9632021-10-06 23:41:50 +0100450endif
451
Manish V Badarkhec9bd1ba2022-02-25 09:06:57 +0000452ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),)
Manish V Badarkhe88c51c32022-01-08 23:08:02 +0000453 CRYPTO_SOURCES := drivers/auth/crypto_mod.c \
454 lib/fconf/fconf_tbbr_getter.c
455 BL1_SOURCES += ${CRYPTO_SOURCES}
456 BL2_SOURCES += ${CRYPTO_SOURCES}
Manish V Badarkhec9bd1ba2022-02-25 09:06:57 +0000457 BL31_SOURCES += drivers/auth/crypto_mod.c
Manish V Badarkhe88c51c32022-01-08 23:08:02 +0000458
Juan Castillo1779ba62015-05-19 11:54:12 +0100459 # We expect to locate the *.mk files under the directories specified below
Sandrine Bailleuxb65dfe42023-10-26 15:14:42 +0200460 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
Juan Castillo1779ba62015-05-19 11:54:12 +0100461
462 $(info Including ${CRYPTO_LIB_MK})
463 include ${CRYPTO_LIB_MK}
Juan Castillo1779ba62015-05-19 11:54:12 +0100464endif
Daniel Boulbycb4adb02018-09-18 11:52:49 +0100465
Daniel Boulbycb4adb02018-09-18 11:52:49 +0100466ifeq (${RECLAIM_INIT_CODE}, 1)
Daniel Boulbycb4adb02018-09-18 11:52:49 +0100467 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
Salman Nabi4f321792024-06-19 17:18:26 +0100468 $(error To reclaim init code xlat tables v2 must be used)
Daniel Boulbycb4adb02018-09-18 11:52:49 +0100469 endif
470endif
Harrison Mutai1a0ebff2024-05-02 12:40:20 +0000471
472TRANSFER_LIST_BIN := ${BUILD_PLAT}/tl.bin
473
474.PHONY: tl
475tl: ${HW_CONFIG}
476 @echo " TLC ${TRANSFER_LIST_BIN}"
477 $(Q)${PYTHON} -m tools.tlc.tlc create --fdt ${HW_CONFIG} -s ${FW_HANDOFF_SIZE} ${TRANSFER_LIST_BIN}
478 $(Q)$(eval ARM_PRELOADED_DTB_OFFSET := `tlc info --fdt-offset ${TRANSFER_LIST_BIN}`)
479
480ifeq (${TRANSFER_LIST}, 1)
481 ifeq (${RESET_TO_BL31}, 1)
482 bl31: tl
483 endif
484endif
Xialin Liu0e0fab02024-06-28 12:52:29 -0500485
Xialin Liu0e0fab02024-06-28 12:52:29 -0500486ifneq ($(COTDTPATH),)
Chris Kay73f7b7d2024-08-15 17:08:07 +0000487 cot-dt-defines = IMAGE_BL2 $(BL2_DEFINES) $(PLAT_BL_COMMON_DEFINES)
488 cot-dt-include-dirs = $(BL2_INCLUDE_DIRS) $(PLAT_BL_COMMON_INCLUDE_DIRS)
489
490 cot-dt-cpp-flags = $(cot-dt-defines:%=-D%)
491 cot-dt-cpp-flags += $(cot-dt-include-dirs:%=-I%)
492
493 cot-dt-cpp-flags += $(BL2_CPPFLAGS) $(PLAT_BL_COMMON_CPPFLAGS)
494 cot-dt-cpp-flags += $(CPPFLAGS) $(BL_CPPFLAGS) $(TF_CFLAGS_$(ARCH))
495 cot-dt-cpp-flags += -c -x assembler-with-cpp -E -P -o $@ $<
496
497 $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.dts): $(COTDTPATH) | $$(@D)/
498 $(q)$($(ARCH)-cpp) $(cot-dt-cpp-flags)
499
500 $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.c): $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.dts) | $$(@D)/
501 $(q)poetry -q install
502 $(q)poetry run cot-dt2c convert-to-c $< $@
503
504 BL2_SOURCES += $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.c)
Xialin Liu0e0fab02024-06-28 12:52:29 -0500505endif