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Ken Liu91d44da2018-09-20 22:42:31 +08001/*
David Hu9804b6a2021-02-15 21:23:06 +08002 * Copyright (c) 2018-2021, Arm Limited. All rights reserved.
Ken Liu91d44da2018-09-20 22:42:31 +08003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7#include <inttypes.h>
Xinyu Zhangcdbe3622022-10-31 14:34:25 +08008#include "config_spm.h"
David Hu9804b6a2021-02-15 21:23:06 +08009#include "fih.h"
Summer Qin5fdcf632020-06-22 16:49:24 +080010#include "utilities.h"
Summer Qinbce21132020-08-19 14:28:10 +080011#include "tfm_hal_platform.h"
Ken Liu91d44da2018-09-20 22:42:31 +080012
Edison Ai9059ea02019-11-28 13:46:14 +080013void tfm_core_panic(void)
Ken Liu91d44da2018-09-20 22:42:31 +080014{
David Hu9804b6a2021-02-15 21:23:06 +080015 fih_delay();
16
Sebastian Bøe055d83a2022-02-21 12:01:41 +010017#ifdef CONFIG_TFM_HALT_ON_CORE_PANIC
18
19 /*
20 * Halt instead of reboot to retain the backtrace that triggered
21 * the fault and thereby make it easier to debug.
22 */
23 tfm_hal_system_halt();
24
25#ifdef TFM_FIH_PROFILE_ON
26 fih_delay();
27
28 tfm_hal_system_halt();
29#endif
30
31#else /* CONFIG_TFM_HALT_ON_CORE_PANIC */
Edison Ai93dabfd2019-12-03 13:44:45 +080032 /*
33 * FixMe: In the first stage, the SPM will restart the entire system when a
34 * programmer error is detected in either the SPE or NSPE.
35 * In the next stage, the specified error codes are also sent to any NSPE
36 * management firmware. The NSPE management firmware can then decide to pass
37 * those error codes back to the calling task or to use its own
38 * functionality for terminating an execution context.
39 */
Summer Qinbce21132020-08-19 14:28:10 +080040 tfm_hal_system_reset();
David Hu9804b6a2021-02-15 21:23:06 +080041
42#ifdef TFM_FIH_PROFILE_ON
43 fih_delay();
44
45 tfm_hal_system_reset();
46#endif
Sebastian Bøe055d83a2022-02-21 12:01:41 +010047
48#endif /* CONFIG_TFM_HALT_ON_CORE_PANIC */
Ken Liu91d44da2018-09-20 22:42:31 +080049}