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Ken Liu91d44da2018-09-20 22:42:31 +08001/*
David Hu9804b6a2021-02-15 21:23:06 +08002 * Copyright (c) 2018-2021, Arm Limited. All rights reserved.
Ken Liu91d44da2018-09-20 22:42:31 +08003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7#include <inttypes.h>
David Hu9804b6a2021-02-15 21:23:06 +08008#include "fih.h"
Summer Qin5fdcf632020-06-22 16:49:24 +08009#include "utilities.h"
Summer Qinbce21132020-08-19 14:28:10 +080010#include "tfm_hal_platform.h"
Ken Liu91d44da2018-09-20 22:42:31 +080011
Edison Ai9059ea02019-11-28 13:46:14 +080012void tfm_core_panic(void)
Ken Liu91d44da2018-09-20 22:42:31 +080013{
David Hu9804b6a2021-02-15 21:23:06 +080014 fih_delay();
15
Sebastian Bøe055d83a2022-02-21 12:01:41 +010016#ifdef CONFIG_TFM_HALT_ON_CORE_PANIC
17
18 /*
19 * Halt instead of reboot to retain the backtrace that triggered
20 * the fault and thereby make it easier to debug.
21 */
22 tfm_hal_system_halt();
23
24#ifdef TFM_FIH_PROFILE_ON
25 fih_delay();
26
27 tfm_hal_system_halt();
28#endif
29
30#else /* CONFIG_TFM_HALT_ON_CORE_PANIC */
Edison Ai93dabfd2019-12-03 13:44:45 +080031 /*
32 * FixMe: In the first stage, the SPM will restart the entire system when a
33 * programmer error is detected in either the SPE or NSPE.
34 * In the next stage, the specified error codes are also sent to any NSPE
35 * management firmware. The NSPE management firmware can then decide to pass
36 * those error codes back to the calling task or to use its own
37 * functionality for terminating an execution context.
38 */
Summer Qinbce21132020-08-19 14:28:10 +080039 tfm_hal_system_reset();
David Hu9804b6a2021-02-15 21:23:06 +080040
41#ifdef TFM_FIH_PROFILE_ON
42 fih_delay();
43
44 tfm_hal_system_reset();
45#endif
Sebastian Bøe055d83a2022-02-21 12:01:41 +010046
47#endif /* CONFIG_TFM_HALT_ON_CORE_PANIC */
Ken Liu91d44da2018-09-20 22:42:31 +080048}