| Manish Pandey | d27b37d | 2021-03-02 14:41:58 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2021, Arm Limited. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <asm_macros.S> |
| 8 | |
| 9 | .globl cactus_vector |
| 10 | |
| 11 | /* |
| 12 | * Exception vector code for unhandled exceptions. |
| 13 | * Print a crash dump on the UART and loops forever. |
| 14 | */ |
| 15 | .macro unhandled_exception name |
| 16 | vector_entry \name |
| 17 | b crash_dump |
| 18 | end_vector_entry \name |
| 19 | .endm |
| 20 | |
| 21 | vector_base cactus_vector |
| 22 | |
| 23 | /* |
| 24 | * Current EL with SP0 : 0x0 - 0x200. |
| 25 | */ |
| 26 | unhandled_exception sync_sp0 |
| 27 | unhandled_exception irq_sp0 |
| 28 | unhandled_exception fiq_sp0 |
| 29 | unhandled_exception serr_sp0 |
| 30 | |
| 31 | /* |
| 32 | * Current EL with SPx : 0x200 - 0x400. |
| 33 | */ |
| 34 | unhandled_exception sync_spx |
| 35 | |
| 36 | vector_entry irq_spx |
| 37 | b irq_vector_entry |
| 38 | end_vector_entry irq_spx |
| 39 | |
| 40 | vector_entry fiq_spx |
| 41 | b fiq_vector_entry |
| 42 | end_vector_entry fiq_spx |
| 43 | |
| 44 | unhandled_exception serr_spx |
| 45 | |
| 46 | /* |
| 47 | * Lower EL using AArch64 : 0x400 - 0x600. |
| 48 | */ |
| 49 | unhandled_exception sync_a64 |
| 50 | unhandled_exception irq_a64 |
| 51 | unhandled_exception fiq_a64 |
| 52 | unhandled_exception serr_a64 |
| 53 | |
| 54 | /* |
| 55 | * Lower EL using AArch32 : 0x600 - 0x800. |
| 56 | */ |
| 57 | unhandled_exception sync_a32 |
| 58 | unhandled_exception irq_a32 |
| 59 | unhandled_exception fiq_a32 |
| 60 | unhandled_exception serr_a32 |
| 61 | |
| 62 | .macro save_gp_regs |
| 63 | stp x0, x1, [sp, #0x0] |
| 64 | stp x2, x3, [sp, #0x10] |
| 65 | stp x4, x5, [sp, #0x20] |
| 66 | stp x6, x7, [sp, #0x30] |
| 67 | stp x8, x9, [sp, #0x40] |
| 68 | stp x10, x11, [sp, #0x50] |
| 69 | stp x12, x13, [sp, #0x60] |
| 70 | stp x14, x15, [sp, #0x70] |
| 71 | stp x16, x17, [sp, #0x80] |
| 72 | stp x18, x19, [sp, #0x90] |
| 73 | stp x20, x21, [sp, #0xa0] |
| 74 | stp x22, x23, [sp, #0xb0] |
| 75 | stp x24, x25, [sp, #0xc0] |
| 76 | stp x26, x27, [sp, #0xd0] |
| 77 | stp x28, x29, [sp, #0xe0] |
| 78 | /* We push xzr simply to keep the stack 16-byte aligned. */ |
| 79 | stp x30, xzr, [sp, #0xf0] |
| 80 | .endm |
| 81 | |
| 82 | .macro restore_gp_regs |
| 83 | ldp x30, xzr, [sp, #0xf0] |
| 84 | ldp x28, x29, [sp, #0xe0] |
| 85 | ldp x26, x27, [sp, #0xd0] |
| 86 | ldp x24, x25, [sp, #0xc0] |
| 87 | ldp x22, x23, [sp, #0xb0] |
| 88 | ldp x20, x21, [sp, #0xa0] |
| 89 | ldp x18, x19, [sp, #0x90] |
| 90 | ldp x16, x17, [sp, #0x80] |
| 91 | ldp x14, x15, [sp, #0x70] |
| 92 | ldp x12, x13, [sp, #0x60] |
| 93 | ldp x10, x11, [sp, #0x50] |
| 94 | ldp x8, x9, [sp, #0x40] |
| 95 | ldp x6, x7, [sp, #0x30] |
| 96 | ldp x4, x5, [sp, #0x20] |
| 97 | ldp x2, x3, [sp, #0x10] |
| 98 | ldp x0, x1, [sp, #0x0] |
| 99 | .endm |
| 100 | |
| 101 | func irq_vector_entry |
| 102 | sub sp, sp, #0x100 |
| 103 | save_gp_regs |
| 104 | bl cactus_irq_handler |
| 105 | restore_gp_regs |
| 106 | add sp, sp, #0x100 |
| 107 | eret |
| 108 | endfunc irq_vector_entry |
| 109 | |
| 110 | func fiq_vector_entry |
| 111 | sub sp, sp, #0x100 |
| 112 | save_gp_regs |
| 113 | bl cactus_fiq_handler |
| 114 | restore_gp_regs |
| 115 | add sp, sp, #0x100 |
| 116 | eret |
| 117 | endfunc fiq_vector_entry |
| 118 | |
| 119 | func crash_dump |
| 120 | /* Save general-purpose registers on the stack. */ |
| 121 | sub sp, sp, #0x100 |
| 122 | save_gp_regs |
| 123 | |
| 124 | /* Save original stack pointer value on the stack. */ |
| 125 | add x1, sp, #0x100 |
| 126 | str x1, [sp, #0xf8] |
| 127 | |
| 128 | /* Print the saved CPU context on the UART. */ |
| 129 | mov x0, sp |
| 130 | b print_exception |
| 131 | endfunc crash_dump |