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Sandrine Bailleux3cd87d72018-10-09 11:12:55 +02001Trusted Firmware-A Tests - Design
2=================================
3
4.. section-numbering::
5 :suffix: .
6
7.. contents::
8
9This document provides some details about the internals of the TF-A Tests
10design. It is incomplete at the moment.
11
12Global overview of the TF-A tests behaviour
13-------------------------------------------
14
15The EL3 firmware is expected to hand over to the TF-A tests with all secondary
16cores powered down, i.e. only the primary core should enter the TF-A tests.
17
18The primary CPU initialises the platform and the TF-A tests internal data
19structures.
20
21Then the test session begins. The TF-A tests are executed one after the
22other. Tests results are saved in non-volatile memory as we go along.
23
Sandrine Bailleux68d76a22018-11-07 16:31:23 +010024Once all tests have completed, a report is printed over the serial console.
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020025
26Global Code Structure
27---------------------
28
29The code is organised into the following categories (present as directories at
30the top level or under the ``tftf/`` directory):
31
32- **Drivers.**
33
34 Some examples follow, this list might not be exhaustive.
35
36 - Generic GIC driver.
37
38 ``arm_gic.h`` contains the public APIs that tests might use. Both GIC
39 architecture versions 2 and 3 are supported.
40
41 - PL011 UART driver.
42
43 - VExpress NOR flash driver.
44
45 Note that tests are not expected to use this driver in most
46 cases. Instead, they should use the ``tftf_nvm_read()`` and
47 ``tftf_nvm_write()`` wrapper APIs. See definitions in
48 ``tftf/framework/include/nvm.h``. See also the NVM validation test cases
49 (``tftf/tests/framework_validation_tests/test_validation_nvm.c``) for an
50 example of usage of these functions.
51
52 - SP805 watchdog.
53
54 Used solely to generate an interrupt that will reset the system on purpose
55 (used in ``tftf_plat_reset()``).
56
57 - SP804 timer.
58
59 This is used as the system timer on Juno. It is configured such that an
60 interrupt is generated when it reaches 0. It is programmed in one-shot
61 mode, i.e. it must be rearmed every time it reaches 0.
62
63- **Framework.**
64
65 Core features of the test framework.
66
67- **Library code.**
68
John Tsichritzis4586e0d2018-10-18 10:00:28 +010069 Firstly, there is ``include/stdlib/`` which provides standard C library
70 functions like ``memcpy()``, ``printf()`` and so on.
71 Additionally, various other APIs are provided under ``include/lib/``. The
72 below list gives some examples but might not be exhaustive.
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020073
74 - ``aarch64/``
75
76 Architecture helper functions for e.g. system registers access, cache
77 maintenance operations, MMU configuration, ...
78
79 - ``events.h``
80
81 Events API. Used to create synchronisation points between CPUs in tests.
82
83 - ``irq.h``
84
85 IRQ handling support. Used to configure IRQs and register/unregister
86 handlers called upon reception of a specific IRQ.
87
88 - ``power_management.h``
89
90 Power management operations (CPU ON/OFF, CPU suspend, etc.).
91
92 - ``sgi.h``
93
94 Software Generated Interrupt support. Used as an inter-CPU communication
95 mechanism.
96
97 - ``spinlock.h``
98
99 Lightweight implementation of synchronisation locks. Used to prevent
100 concurrent accesses to shared data structures.
101
102 - ``timer.h``
103
104 Support for programming the timer. Any timer which is in the `always-on`
105 power domain can be used to exit CPUs from suspend state.
106
107 - ``tftf_lib.h``
108
109 Miscellaneous helper functions/macros: MP-safe ``printf()``, low-level
110 PSCI wrappers, insertion of delays, raw SMC interface, support for writing
111 a string in the test report, macros to skip tests on platforms that do not
112 meet topology requirements, etc.
113
114 - ``semihosting.h``
115
116 Semihosting support.
117
118 - ``io_storage.h``
119
120 Low-level IO operations. Tests are not expected to use these APIs
121 directly. They should use higher-level APIs like ``tftf_nvm_read()``
122 and ``tftf_nvm_write()``.
123
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200124- **Platform specific.**
125
126 Note that ``include/plat/common/plat_topology.h`` provides the interfaces
127 that a platform must implement to support topology discovery (i.e. how many
128 CPUs and clusters there are).
129
130- **Tests.**
131
John Tsichritzis88a956f2018-10-19 10:30:00 +0100132 The tests are divided into the following categories (present as directories in
133 the ``tftf/tests/`` directory):
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200134
John Tsichritzis88a956f2018-10-19 10:30:00 +0100135 - **Framework validation tests.**
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200136
John Tsichritzis88a956f2018-10-19 10:30:00 +0100137 Tests that exercise the core features of the framework. Verify that the test
138 framework itself works properly.
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200139
John Tsichritzis88a956f2018-10-19 10:30:00 +0100140 - **Runtime services tests.**
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200141
John Tsichritzis88a956f2018-10-19 10:30:00 +0100142 Tests that exercise the runtime services offered by the EL3 Firmware to the
143 Normal World software. For example, this includes tests for the Standard
144 Service (to which PSCI belongs to), the Trusted OS service or the SiP
145 service.
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200146
John Tsichritzis88a956f2018-10-19 10:30:00 +0100147 - **CPU extensions tests.**
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200148
John Tsichritzis88a956f2018-10-19 10:30:00 +0100149 Tests some CPU extensions features. For example, the AMU tests ensure that
150 the counters provided by the Activity Monitor Unit are behaving correctly.
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200151
John Tsichritzis88a956f2018-10-19 10:30:00 +0100152 - **Firmware Update tests.**
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200153
John Tsichritzis88a956f2018-10-19 10:30:00 +0100154 Tests that exercise the `Firmware Update`_ feature of TF-A.
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200155
John Tsichritzis88a956f2018-10-19 10:30:00 +0100156 - **Template tests.**
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200157
John Tsichritzis88a956f2018-10-19 10:30:00 +0100158 Sample test code showing how to write tests in practice. Serves as
159 documentation.
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200160
John Tsichritzis88a956f2018-10-19 10:30:00 +0100161 - **Performance tests.**
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200162
John Tsichritzis88a956f2018-10-19 10:30:00 +0100163 Simple tests measuring the latency of an SMC call.
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200164
John Tsichritzis88a956f2018-10-19 10:30:00 +0100165 - **Miscellaneous tests.**
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200166
John Tsichritzis88a956f2018-10-19 10:30:00 +0100167 Tests for RAS support, correct system setup, ...
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200168
169All assembler files have the ``.S`` extension. The linker source file has the
170extension ``.ld.S``. This is processed by GCC to create the linker script which
171has the extension ``.ld``.
172
173Detailed Code Structure
174-----------------------
175
176The cold boot entry point is ``tftf_entrypoint`` (see
177``tftf/framework/aarch64/entrypoint.S``). As explained in section `Global
178overview of the TF-A tests behaviour`_, only the primary CPU is expected to
179execute this code.
180
181Tests can power on other CPUs using the function ``tftf_cpu_on()``. This uses
182the PSCI ``CPU_ON`` API of the EL3 Firmware. When entering the Normal World,
183execution starts at the warm boot entry point, which is ``tftf_hotplug_entry()``
184(see ``tftf/framework/aarch64/entrypoint.S``).
185
186Information about the progression of the test session and tests results are
187written into Non-Volatile Memory as we go along. This consists of the following
188data (see struct ``tftf_state_t`` typedef in ``tftf/framework/include/nvm.h``):
189
190- ``test_to_run``
191
192 Reference to the test to run.
193
194- ``test_progress``
195
196 Progress in the execution of ``test_to_run``. This is used to implement the
197 following state machine:
198
199::
200
201 +-> TEST_READY (initial state of the test) <--------------+
202 | | |
203 | | Test framework prepares the test environment. |
204 | | |
205 | v |
206 | TEST_IN_PROGRESS |
207 | | |
208 | | Hand over to the test function. |
209 | | If the test wants to reboot the platform ---> TEST_REBOOTING |
210 | | | |
211 | | Test function returns into framework. | Reboot |
212 | | | |
213 | | +---------+
214 | v
215 | TEST_COMPLETE
216 | |
217 | | Do some framework management.
218 | | Move to next test.
219 +--------+
220
221- ``testcase_buffer``
222
223 A buffer that the test can use as a scratch area for whatever it is doing.
224
225- ``testcase_results``
226
227- ``result_buffer_size``
228
229- ``result_buffer``
230
231 Buffer holding the tests output. Tests output are concatenated.
232
233Interrupts management
234---------------------
235
236The TF-A tests expect SGIs #0 to #7 to be available for their own usage. In
237particular, this means that Trusted World software must configure them as
238non-secure interrupts.
239
240SGI #7 has a special status. It is the SGI that the timer management framework
241sends to all CPUs when the system timer fires off (see the definition of the
242constant ``IRQ_WAKE_SGI`` in the header file ``include/lib/irq.h``). Although
243test cases can use this specific SGI - e.g. they can register an IRQ handler for
244it and use it as an inter-CPU communication mechanism - they have to be aware of
245the underlying consequences. Some tests, like the PSCI ``CPU_SUSPEND`` tests,
246rely on this SGI to be enabled in order to wake up CPUs from their suspend
247state. If it is disabled, these tests will leave the system in an unresponsive
248state.
249
250--------------
251
252*Copyright (c) 2018, Arm Limited. All rights reserved.*
253
John Tsichritzis4586e0d2018-10-18 10:00:28 +0100254.. _Summary of build options: user-guide.rst#summary-of-build-options
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200255.. _Firmware Update: https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/firmware-update.rst