| Antonio Nino Diaz | 7e1e5e8 | 2018-12-05 14:38:15 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2018, Arm Limited. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <sp_res_desc_def.h> |
| 8 | |
| 9 | #include "cactus_def.h" |
| 10 | |
| 11 | /* 4 KiB pages */ |
| 12 | #define PAGE_SIZE U(0x1000) |
| 13 | |
| 14 | /* |
| 15 | * FVP platform layout. The defines are hardcoded here because including the |
| 16 | * platform headers have too many dependencies. |
| 17 | * TODO: Move this to the platform layer. |
| 18 | */ |
| 19 | #define V2M_IOFPGA_BASE ULL(0x1c000000) |
| 20 | #define V2M_IOFPGA_SIZE ULL(0x03000000) |
| 21 | |
| 22 | /* Aggregate of all devices in the first GB. */ |
| 23 | #define DEVICE0_BASE ULL(0x20000000) |
| 24 | #define DEVICE0_SIZE ULL(0x0c200000) |
| 25 | |
| 26 | /dts-v1/; |
| 27 | |
| 28 | / { |
| 29 | compatible = "arm,sp_rd"; |
| 30 | |
| 31 | attribute { |
| 32 | version = <0x00000001>; |
| 33 | sp_type = <RD_ATTR_TYPE_UP_MIGRATABLE>; |
| 34 | pe_mpidr = <0>; /* Unused */ |
| 35 | runtime_el = <RD_ATTR_RUNTIME_SEL0>; |
| 36 | exec_type = <RD_ATTR_RUNTIME>; |
| 37 | panic_policy = <RD_ATTR_PANIC_ONESHOT>; |
| 38 | xlat_granule = <RD_ATTR_XLAT_GRANULE_4KB>; |
| 39 | binary_size = <CACTUS_IMAGE_SIZE>; |
| 40 | load_address = <0x00000000 CACTUS_IMAGE_BASE>; |
| 41 | entrypoint = <0x00000000 CACTUS_IMAGE_BASE>; |
| 42 | }; |
| 43 | |
| 44 | memory_regions { |
| 45 | v2m_iofpga { |
| 46 | str = "V2M IOFPGA"; |
| 47 | base = <0x00000000 V2M_IOFPGA_BASE>; |
| 48 | size = <0x00000000 V2M_IOFPGA_SIZE>; |
| 49 | attr = <RD_MEM_DEVICE>; |
| 50 | }; |
| 51 | |
| 52 | device0 { |
| 53 | str = "Device 0"; |
| 54 | base = <0x00000000 DEVICE0_BASE>; |
| 55 | size = <0x00000000 DEVICE0_SIZE>; |
| 56 | attr = <RD_MEM_DEVICE>; |
| 57 | }; |
| 58 | |
| 59 | spm_buffer { |
| 60 | str = "SPM buffer"; |
| 61 | base = <0x00000000 CACTUS_SPM_BUF_BASE>; |
| 62 | size = <0x00000000 CACTUS_SPM_BUF_SIZE>; |
| 63 | attr = <RD_MEM_NORMAL_SPM_SP_SHARED_MEM>; |
| 64 | }; |
| 65 | |
| 66 | ns_buffer { |
| 67 | str = "NS buffer"; |
| 68 | base = <0x00000000 CACTUS_NS_BUF_BASE>; |
| 69 | size = <0x00000000 CACTUS_NS_BUF_SIZE>; |
| 70 | attr = <RD_MEM_NORMAL_CLIENT_SHARED_MEM>; |
| 71 | }; |
| 72 | |
| 73 | test_memory { |
| 74 | str = "Test memory"; |
| 75 | base = <0x00000000 CACTUS_TEST_MEM_BASE>; |
| 76 | size = <0x00000000 CACTUS_TEST_MEM_SIZE>; |
| 77 | attr = <RD_MEM_NORMAL_MISCELLANEOUS>; |
| 78 | }; |
| 79 | }; |
| 80 | |
| 81 | notifications { |
| 82 | notification_0 { |
| 83 | attr = <0>; |
| 84 | pe = <0>; |
| 85 | }; |
| 86 | }; |
| 87 | |
| 88 | services { |
| 89 | test_service_1 { |
| 90 | uuid = <CACTUS_SERVICE1_UUID_RD>; |
| 91 | |
| 92 | accessibility = <(RD_SERV_ACCESS_SECURE | |
| 93 | RD_SERV_ACCESS_EL3 | |
| 94 | RD_SERV_ACCESS_NORMAL)>; |
| 95 | request_type = <(RD_SERV_SUPPORT_BLOCKING | |
| 96 | RD_SERV_SUPPORT_NON_BLOCKING)>; |
| 97 | connection_quota = <10>; |
| 98 | sec_mem_size = <0>; |
| 99 | interrupt_num = <0>; |
| 100 | |
| 101 | required_uuids { |
| 102 | uuid_0 = <CACTUS_SERVICE2_UUID_RD>; |
| 103 | }; |
| 104 | }; |
| 105 | |
| 106 | test_service_2 { |
| 107 | uuid = <CACTUS_SERVICE2_UUID_RD>; |
| 108 | |
| 109 | accessibility = <(RD_SERV_ACCESS_SECURE | |
| 110 | RD_SERV_ACCESS_EL3 | |
| 111 | RD_SERV_ACCESS_NORMAL)>; |
| 112 | request_type = <(RD_SERV_SUPPORT_BLOCKING | |
| 113 | RD_SERV_SUPPORT_NON_BLOCKING)>; |
| 114 | connection_quota = <10>; |
| 115 | sec_mem_size = <0>; |
| 116 | interrupt_num = <0>; |
| 117 | }; |
| 118 | }; |
| 119 | }; |