Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2018, Arm Limited. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
Antonio Nino Diaz | 09a00ef | 2019-01-11 13:12:58 +0000 | [diff] [blame^] | 9 | #include <drivers/arm/pl011.h> |
Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame] | 10 | #include "../fvp_def.h" |
| 11 | |
| 12 | .globl platform_get_core_pos |
Antonio Nino Diaz | 1cf45c9 | 2018-10-15 09:03:43 +0100 | [diff] [blame] | 13 | .globl plat_crash_console_init |
| 14 | .globl plat_crash_console_putc |
| 15 | .globl plat_crash_console_flush |
Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame] | 16 | |
| 17 | /*---------------------------------------------------------------------- |
| 18 | * unsigned int platform_get_core_pos(unsigned long mpid) |
| 19 | * |
| 20 | * Function to calculate the core position on FVP. |
| 21 | * |
| 22 | * (ClusterId * FVP_MAX_CPUS_PER_CLUSTER * FVP_MAX_PE_PER_CPU) + |
| 23 | * (CPUId * FVP_MAX_PE_PER_CPU) + |
| 24 | * ThreadId |
| 25 | * |
| 26 | * which can be simplified as: |
| 27 | * |
| 28 | * ((ClusterId * FVP_MAX_CPUS_PER_CLUSTER + CPUId) * FVP_MAX_PE_PER_CPU) |
| 29 | * + ThreadId |
| 30 | * --------------------------------------------------------------------- |
| 31 | */ |
| 32 | func platform_get_core_pos |
| 33 | /* |
| 34 | * Check for MT bit in MPIDR. If not set, shift MPIDR to left to make it |
| 35 | * look as if in a multi-threaded implementation |
| 36 | */ |
| 37 | tst r0, #MPIDR_MT_MASK |
| 38 | mov r3, r0 |
| 39 | lsleq r3, r0, #MPIDR_AFFINITY_BITS |
| 40 | |
| 41 | /* Extract individual affinity fields from MPIDR */ |
| 42 | ubfx r0, r3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS |
| 43 | ubfx r1, r3, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS |
| 44 | ubfx r2, r3, #MPIDR_AFF2_SHIFT, #MPIDR_AFFINITY_BITS |
| 45 | |
| 46 | /* Compute linear position */ |
| 47 | mov r3, #FVP_MAX_CPUS_PER_CLUSTER |
| 48 | mla r1, r2, r3, r1 |
| 49 | mov r3, #FVP_MAX_PE_PER_CPU |
| 50 | mla r0, r1, r3, r0 |
| 51 | |
| 52 | bx lr |
| 53 | endfunc platform_get_core_pos |
Antonio Nino Diaz | 1cf45c9 | 2018-10-15 09:03:43 +0100 | [diff] [blame] | 54 | |
| 55 | /* --------------------------------------------- |
| 56 | * int plat_crash_console_init(void) |
| 57 | * Function to initialize the crash console |
| 58 | * without a C Runtime to print crash report. |
| 59 | * Clobber list : x0 - x4 |
| 60 | * --------------------------------------------- |
| 61 | */ |
| 62 | func plat_crash_console_init |
| 63 | ldr r0, =PLAT_ARM_UART_BASE |
| 64 | ldr r1, =PLAT_ARM_UART_CLK_IN_HZ |
| 65 | ldr r2, =PL011_BAUDRATE |
| 66 | b console_core_init |
| 67 | endfunc plat_crash_console_init |
| 68 | |
| 69 | /* --------------------------------------------- |
| 70 | * int plat_crash_console_putc(int c) |
| 71 | * Function to print a character on the crash |
| 72 | * console without a C Runtime. |
| 73 | * Clobber list : x1, x2 |
| 74 | * --------------------------------------------- |
| 75 | */ |
| 76 | func plat_crash_console_putc |
| 77 | ldr r1, =PLAT_ARM_UART_BASE |
| 78 | b console_core_putc |
| 79 | endfunc plat_crash_console_putc |
| 80 | |
| 81 | /* --------------------------------------------- |
| 82 | * int plat_crash_console_flush() |
| 83 | * Function to force a write of all buffered |
| 84 | * data that hasn't been output. |
| 85 | * Out : return -1 on error else return 0. |
| 86 | * Clobber list : r0 - r1 |
| 87 | * --------------------------------------------- |
| 88 | */ |
| 89 | func plat_crash_console_flush |
| 90 | ldr r1, =PLAT_ARM_UART_BASE |
| 91 | b console_core_flush |
| 92 | endfunc plat_crash_console_flush |