Almir Okato | e8cbc0d | 2022-06-13 10:45:39 -0300 | [diff] [blame^] | 1 | /* |
| 2 | * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD |
| 3 | * |
| 4 | * SPDX-License-Identifier: Apache-2.0 |
| 5 | */ |
| 6 | |
| 7 | #include <bootutil/bootutil_log.h> |
| 8 | |
| 9 | #include <esp_rom_uart.h> |
| 10 | #include <esp_rom_gpio.h> |
| 11 | #include <esp_rom_sys.h> |
| 12 | #include <soc/uart_periph.h> |
| 13 | #include <soc/gpio_struct.h> |
| 14 | #include <hal/gpio_types.h> |
| 15 | #include <hal/gpio_ll.h> |
| 16 | #include <hal/uart_ll.h> |
| 17 | |
| 18 | #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT |
| 19 | #define SERIAL_BOOT_GPIO_DETECT CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT |
| 20 | #else |
| 21 | #define SERIAL_BOOT_GPIO_DETECT GPIO_NUM_5 |
| 22 | #endif |
| 23 | |
| 24 | #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL |
| 25 | #define SERIAL_BOOT_GPIO_DETECT_VAL CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL |
| 26 | #else |
| 27 | #define SERIAL_BOOT_GPIO_DETECT_VAL 1 |
| 28 | #endif |
| 29 | |
| 30 | #ifdef CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S |
| 31 | #define SERIAL_BOOT_DETECT_DELAY_S CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S |
| 32 | #else |
| 33 | #define SERIAL_BOOT_DETECT_DELAY_S 5 |
| 34 | #endif |
| 35 | |
| 36 | #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE |
| 37 | #define SERIAL_BOOT_GPIO_INPUT_TYPE CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE |
| 38 | #else |
| 39 | // pull-down |
| 40 | #define SERIAL_BOOT_GPIO_INPUT_TYPE 0 |
| 41 | #endif |
| 42 | |
| 43 | #ifdef CONFIG_ESP_SERIAL_BOOT_UART_NUM |
| 44 | #define SERIAL_BOOT_UART_NUM CONFIG_ESP_SERIAL_BOOT_UART_NUM |
| 45 | #else |
| 46 | #define SERIAL_BOOT_UART_NUM ESP_ROM_UART_1 |
| 47 | #endif |
| 48 | |
| 49 | #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_RX |
| 50 | #define SERIAL_BOOT_GPIO_RX CONFIG_ESP_SERIAL_BOOT_GPIO_RX |
| 51 | #else |
| 52 | #define SERIAL_BOOT_GPIO_RX GPIO_NUM_8 |
| 53 | #endif |
| 54 | |
| 55 | #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_TX |
| 56 | #define SERIAL_BOOT_GPIO_TX CONFIG_ESP_SERIAL_BOOT_GPIO_TX |
| 57 | #else |
| 58 | #define SERIAL_BOOT_GPIO_TX GPIO_NUM_9 |
| 59 | #endif |
| 60 | |
| 61 | static uart_dev_t *serial_boot_uart_dev = (SERIAL_BOOT_UART_NUM == 0) ? |
| 62 | &UART0 : |
| 63 | &UART1; |
| 64 | |
| 65 | void console_write(const char *str, int cnt) |
| 66 | { |
| 67 | uint32_t tx_len; |
| 68 | |
| 69 | do { |
| 70 | tx_len = uart_ll_get_txfifo_len(serial_boot_uart_dev); |
| 71 | } while (tx_len < cnt); |
| 72 | |
| 73 | uart_ll_write_txfifo(serial_boot_uart_dev, (const uint8_t *)str, cnt); |
| 74 | } |
| 75 | |
| 76 | int console_read(char *str, int cnt, int *newline) |
| 77 | { |
| 78 | volatile uint32_t len = 0; |
| 79 | volatile uint32_t read_len = 0; |
| 80 | volatile bool stop = false; |
| 81 | do { |
| 82 | len = uart_ll_get_rxfifo_len(serial_boot_uart_dev); |
| 83 | |
| 84 | if (len) { |
| 85 | for (uint32_t i = 0; i < len; i++) { |
| 86 | /* Read the character from the RX FIFO */ |
| 87 | uart_ll_read_rxfifo(serial_boot_uart_dev, (uint8_t *)&str[read_len], 1); |
| 88 | read_len++; |
| 89 | if (read_len == cnt || str[read_len - 1] == '\n') { |
| 90 | stop = true; |
| 91 | } |
| 92 | } |
| 93 | } |
| 94 | MCUBOOT_WATCHDOG_FEED(); |
| 95 | esp_rom_delay_us(1000); |
| 96 | } while (!stop); |
| 97 | |
| 98 | *newline = (str[read_len - 1] == '\n') ? 1 : 0; |
| 99 | return read_len; |
| 100 | } |
| 101 | |
| 102 | int boot_console_init(void) |
| 103 | { |
| 104 | BOOT_LOG_INF("Initializing serial boot pins"); |
| 105 | |
| 106 | /* Enable GPIO for UART RX */ |
| 107 | esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_RX); |
| 108 | esp_rom_gpio_connect_in_signal(SERIAL_BOOT_GPIO_RX, |
| 109 | UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_RX_PIN_IDX), |
| 110 | 0); |
| 111 | gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_RX); |
| 112 | |
| 113 | /* Enable GPIO for UART TX */ |
| 114 | esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_TX); |
| 115 | esp_rom_gpio_connect_out_signal(SERIAL_BOOT_GPIO_TX, |
| 116 | UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_TX_PIN_IDX), |
| 117 | 0, 0); |
| 118 | gpio_ll_output_enable(&GPIO, SERIAL_BOOT_GPIO_TX); |
| 119 | |
| 120 | uart_ll_set_mode_normal(serial_boot_uart_dev); |
| 121 | uart_ll_set_baudrate(serial_boot_uart_dev, 115200 ); |
| 122 | uart_ll_set_stop_bits(serial_boot_uart_dev, 1u ); |
| 123 | uart_ll_set_parity(serial_boot_uart_dev, UART_PARITY_DISABLE ); |
| 124 | uart_ll_set_rx_tout(serial_boot_uart_dev, 16 ); |
| 125 | |
| 126 | uart_ll_txfifo_rst(serial_boot_uart_dev); |
| 127 | uart_ll_rxfifo_rst(serial_boot_uart_dev); |
| 128 | esp_rom_delay_us(50000); |
| 129 | |
| 130 | return 0; |
| 131 | } |
| 132 | |
| 133 | bool boot_serial_detect_pin(void) |
| 134 | { |
| 135 | bool detected = false; |
| 136 | int pin_value = 0; |
| 137 | |
| 138 | esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_DETECT); |
| 139 | gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_DETECT); |
| 140 | switch (SERIAL_BOOT_GPIO_INPUT_TYPE) { |
| 141 | // Pull-down |
| 142 | case 0: |
| 143 | gpio_ll_pulldown_en(&GPIO, SERIAL_BOOT_GPIO_DETECT); |
| 144 | break; |
| 145 | // Pull-up |
| 146 | case 1: |
| 147 | gpio_ll_pullup_en(&GPIO, SERIAL_BOOT_GPIO_DETECT); |
| 148 | break; |
| 149 | } |
| 150 | esp_rom_delay_us(50000); |
| 151 | |
| 152 | pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT); |
| 153 | detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL); |
| 154 | esp_rom_delay_us(50000); |
| 155 | |
| 156 | if(detected) { |
| 157 | if(SERIAL_BOOT_DETECT_DELAY_S > 0) { |
| 158 | /* The delay time is an approximation */ |
| 159 | for(int i = 0; i < (SERIAL_BOOT_DETECT_DELAY_S * 100); i++) { |
| 160 | esp_rom_delay_us(10000); |
| 161 | pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT); |
| 162 | detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL); |
| 163 | if(!detected) { |
| 164 | break; |
| 165 | } |
| 166 | } |
| 167 | } |
| 168 | } |
| 169 | return detected; |
| 170 | } |