Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 1 | ### Support of secondary slot in external memory for PSoC™ 6 devices |
| 2 | |
Roman Okhrimenko | 883cb5b | 2024-03-28 17:22:33 +0200 | [diff] [blame] | 3 | * For the CYW20829/CYW89829 external memory support, see the [CYW20829.md](../platforms/CYW20829.md) file. |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 4 | |
Roman Okhrimenko | 13f79ed | 2021-03-11 19:05:41 +0200 | [diff] [blame] | 5 | #### Description |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 6 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 7 | This document describes the use of the external memory module as a secondary (upgrade) slot with Cypress PSoC™ 6 devices. |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 8 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 9 | The demonstration device is the `CY8CPROTO-062-4343W` board, which is a PSoC™ 6 device with 2M-flash, but other kits with 1M (CY8CKIT-062-WIFI-BT) or 512K (CY8CPROTO-062S3-4343W) chips can be used as well. |
| 10 | The memory module on boards is S25FL512SAGMFI010 512-Mbit external Quad SPI NOR flash. |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 11 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 12 | Using external memory for secondary slots allows nearly doubling the Boot Image size. |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 13 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 14 | #### Operation design and flow |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 15 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 16 | The design is based on using the SFDP command's auto-discovery functionality of memory module IC and Cypress SMIF PDL driver. |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 17 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 18 | A user's design example: |
| 19 | * The memory-module is SFDP-compliant. |
| 20 | * Only one module is used for the secondary slot. |
| 21 | * The address for the secondary slot starts from 0x18000000. |
| 22 | This corresponds to PSoC™ 6 SMIF (Serial Memory InterFace) IP block mapping. |
| 23 | * The slot size and start address for the upgrade slot meet the requirements, when using swap upgrade. |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 24 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 25 | The default flash map can be found in the [MCUBootApp.md](MCUBootApp.md) file. |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 26 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 27 | MCUBootApp's `main.c` contains the call to Init-SFDP API, which performs the required GPIO configurations, SMIF IP block configuration, SFDP protocol read and memory-config structure initialization. |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 28 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 29 | Now, MCUBootApp is ready to accept an upgrade image from the external memory module. |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 30 | |
Roman Okhrimenko | 13f79ed | 2021-03-11 19:05:41 +0200 | [diff] [blame] | 31 | Upgrades from external memory are supported for both `overwrite only` and `swap with status partition` modes of MCUBootApp. |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 32 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 33 | ##### Requirements to size and start address of upgrade slot when using Swap mode |
Roman Okhrimenko | 13f79ed | 2021-03-11 19:05:41 +0200 | [diff] [blame] | 34 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 35 | Due to the MCUboot image structure, some restrictions apply when using upgrades from external flash. The main requirement: |
Roman Okhrimenko | 13f79ed | 2021-03-11 19:05:41 +0200 | [diff] [blame] | 36 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 37 | **The trailer portion of an upgrade image can be erased separately.** |
Roman Okhrimenko | 13f79ed | 2021-03-11 19:05:41 +0200 | [diff] [blame] | 38 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 39 | To meet this requirement, the image trailer is placed separately on a full flash page, which equals 0x40200 for S25FL512SAGMFI010. |
| 40 | Considering the default slot size for the external memory case described in the [MCUBootApp.md](MCUBootApp.md) file, occupied external flash looks as follows: |
Roman Okhrimenko | 13f79ed | 2021-03-11 19:05:41 +0200 | [diff] [blame] | 41 | |
| 42 | 0x18000000 [xxxxxxxxxxxxxxxx][ttfffffffffffff][fffffffffffffff] |
| 43 | |
| 44 | Here: |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 45 | `0x18000000` - The start address of external memory. |
| 46 | `[xxxxxxxxxxxxxxxx]` - The first flash page of minimum erase size 0x40000 occupied by the firmware. |
| 47 | `[tt]` - The trailer portion (last 0x200 of image) of the upgrade slot placed on a separate flash page. |
| 48 | `[fffff]` - The remained portion of the flash page, used to store the image trailer - this area cannot be used for anything else. |
Roman Okhrimenko | 13f79ed | 2021-03-11 19:05:41 +0200 | [diff] [blame] | 49 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 50 | When using slots sizes other than default, consider the above-described `0x40200`. |
Roman Okhrimenko | 13f79ed | 2021-03-11 19:05:41 +0200 | [diff] [blame] | 51 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 52 | When the slot size is not aligned to `0x40200`, the start address of the upgrade image in the external flash is calculated starting from the image trailer location. Consider the following example: |
Roman Okhrimenko | 13f79ed | 2021-03-11 19:05:41 +0200 | [diff] [blame] | 53 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 54 | The primary slot size required is 590336 bytes (576k + 512b). |
Roman Okhrimenko | 13f79ed | 2021-03-11 19:05:41 +0200 | [diff] [blame] | 55 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 56 | Four flash pages are required to fit the secondary slot (P1-P4): |
Roman Okhrimenko | 13f79ed | 2021-03-11 19:05:41 +0200 | [diff] [blame] | 57 | |
| 58 | 0x1800 0000 - 0x1804 0000 - P1 |
| 59 | 0x1804 0000 - 0x1808 0000 - P2 |
| 60 | 0x1808 0000 - 0x180C 0000 - P3 |
| 61 | 0x1808 0000 - 0x180C 0000 - P4 |
| 62 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 63 | The primary slot consists of 512 bytes of the image trailer, it goes to P4, 2 full sectors of 256k goes in P3 and P2, the remainder of 64k is resided in P1. |
Roman Okhrimenko | 13f79ed | 2021-03-11 19:05:41 +0200 | [diff] [blame] | 64 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 65 | Thus, the start address of the secondary slot is: 0x1804 0000 - 0x10000 (64k) = 0x1803 0000. The size occupied is 4 * 256k = 786k |
Roman Okhrimenko | 13f79ed | 2021-03-11 19:05:41 +0200 | [diff] [blame] | 66 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 67 | #### Execute in place (XIP) mode |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 68 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 69 | In the XIP mode firmware image can be placed in the external memory and executed from there directly. This mode is useful for devices with small internal flash or when one wishes to reserve internal flash for other purposes. |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 70 | |
Roman Okhrimenko | 883cb5b | 2024-03-28 17:22:33 +0200 | [diff] [blame] | 71 | On CYW20829/CYW89829 platforms XIP mode is always used due to absence of internal memory. |
Bohdan Kovalchuk | a333a45 | 2020-07-09 16:55:58 +0300 | [diff] [blame] | 72 | |
Roman Okhrimenko | dc0ca08 | 2023-06-21 20:49:51 +0300 | [diff] [blame] | 73 | This is optional for PSoC™ 6 devices. The JSON flash map should contain `"mode": "XIP"` in the `"external_flash" section`. `USE_XIP` flag is added to auto-generated `memorymap.mk` on pre-build action. |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 74 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 75 | When XIP mode is used primary slot of an image can be placed in external memory. |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 76 | |
Roman Okhrimenko | dc0ca08 | 2023-06-21 20:49:51 +0300 | [diff] [blame] | 77 | This repository provides default flash map files with suffix _xip_ to be used for XIP mode in `platforms/memory/flash_%platform_name%/flashmap`. |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 78 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 79 | #### How to enable external memory support |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 80 | |
Roman Okhrimenko | dc0ca08 | 2023-06-21 20:49:51 +0300 | [diff] [blame] | 81 | External memory is enabled when `make` flag `USE_EXTERNAL_FLASH` is set to `1`. Value of this flag is set in auto-generated `memorymap.mk` files when field `"external_flash"` is present in JSON file. |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 82 | |
Roman Okhrimenko | dc0ca08 | 2023-06-21 20:49:51 +0300 | [diff] [blame] | 83 | Default flash maps with suffix _smif_ are provided in `platforms/memory/PSOC6/flashmap` folder for PSoC™ 6 devices, where presense of external memory in system is optional. |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 84 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 85 | Build MCUBootApp as described in the [MCUBootApp.md](MCUBootApp.md) file. |
| 86 | |
| 87 | **Building an upgrade image for external memory:** |
| 88 | |
Roman Okhrimenko | dc0ca08 | 2023-06-21 20:49:51 +0300 | [diff] [blame] | 89 | make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE ERASED_VALUE=0xff FLASH_MAP=platforms/memory/PSOC6/flashmap/psoc6_swap_single_smif.json IMG_ID=1 |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 90 | |
| 91 | `ERASED_VALUE` - Defines the memory cell contents in the erased state. It is `0x00` for PSoC™ 6 internal flash and `0xff` for S25FL512S. |
| 92 | |
| 93 | **Programming external memory** |
| 94 | |
| 95 | Programming tools require configuration of SMIF block to debug/program external memory. When `MCUBootApp` is built with `BUILDCFG=Debug` flag SMIF configuration structures are added to the `MCUBootApp.hex` image. Additional sections: |
| 96 | |
| 97 | At SFlash address `0x16000800` address of SMIF configuration structure is placed. |
| 98 | |
| 99 | At SFlash address `0x16007c00` updated content of TOC2 structure is placed. |
| 100 | |
| 101 | The MCUBootApp can be programmed similarly to described in the [MCUBootApp.md](MCUBootApp.md) file: |
| 102 | |
Roman Okhrimenko | 883cb5b | 2024-03-28 17:22:33 +0200 | [diff] [blame] | 103 | export OPENOCD=/Applications/ModusToolbox/tools_3.2/openocd |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 104 | |
| 105 | ${OPENOCD}/bin/openocd -s ${OPENOCD}/scripts \ |
| 106 | -f ${OPENOCD}/scripts/interface/kitprog3.cfg \ |
| 107 | -f ${OPENOCD}/scripts/target/psoc6_2m.cfg \ |
| 108 | -c "init; psoc6 sflash_restrictions 1" \ |
| 109 | -c "init; reset init; program PATH_TO_APPLICATION.hex" \ |
| 110 | -c "resume; reset; exit" |
| 111 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 112 | There is a NULL-pointer placed for the SMIF configuration pointer in TOC2 (Table Of Contents, `cy_serial_flash_prog.c`). |
| 113 | This is done to force the CY8PROTO-062-4343W DAP Link firmware to program external memory with hardcoded values. |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 114 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 115 | 1. Click the SW3 Mode button on the board to switch the board to DAP Link mode. |
| 116 | 2. Once DAP Link removable disk displays, drop (copy) the upgrade image HEX file to it. |
| 117 | This will invoke the firmware to program external memory. |
Bohdan Kovalchuk | 0324f1b | 2020-05-26 08:04:24 -0500 | [diff] [blame] | 118 | |
Roman Okhrimenko | 977b375 | 2022-03-31 14:40:48 +0300 | [diff] [blame] | 119 | **Note :** the programming of external memory is limited to S25FL512S p/n only at this moment. |