Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * sleep.c - x86-specific ACPI sleep support. |
| 4 | * |
| 5 | * Copyright (C) 2001-2003 Patrick Mochel |
| 6 | * Copyright (C) 2001-2003 Pavel Machek <pavel@ucw.cz> |
| 7 | */ |
| 8 | |
| 9 | #include <linux/acpi.h> |
| 10 | #include <linux/bootmem.h> |
| 11 | #include <linux/memblock.h> |
| 12 | #include <linux/dmi.h> |
| 13 | #include <linux/cpumask.h> |
| 14 | #include <asm/segment.h> |
| 15 | #include <asm/desc.h> |
| 16 | #include <asm/pgtable.h> |
| 17 | #include <asm/cacheflush.h> |
| 18 | #include <asm/realmode.h> |
| 19 | |
| 20 | #include <linux/ftrace.h> |
| 21 | #include "../../realmode/rm/wakeup.h" |
| 22 | #include "sleep.h" |
| 23 | |
| 24 | unsigned long acpi_realmode_flags; |
| 25 | |
| 26 | #if defined(CONFIG_SMP) && defined(CONFIG_64BIT) |
| 27 | static char temp_stack[4096]; |
| 28 | #endif |
| 29 | |
| 30 | /** |
| 31 | * x86_acpi_enter_sleep_state - enter sleep state |
| 32 | * @state: Sleep state to enter. |
| 33 | * |
| 34 | * Wrapper around acpi_enter_sleep_state() to be called by assmebly. |
| 35 | */ |
| 36 | acpi_status asmlinkage __visible x86_acpi_enter_sleep_state(u8 state) |
| 37 | { |
| 38 | return acpi_enter_sleep_state(state); |
| 39 | } |
| 40 | |
| 41 | /** |
| 42 | * x86_acpi_suspend_lowlevel - save kernel state |
| 43 | * |
| 44 | * Create an identity mapped page table and copy the wakeup routine to |
| 45 | * low memory. |
| 46 | */ |
| 47 | int x86_acpi_suspend_lowlevel(void) |
| 48 | { |
| 49 | struct wakeup_header *header = |
| 50 | (struct wakeup_header *) __va(real_mode_header->wakeup_header); |
| 51 | |
| 52 | if (header->signature != WAKEUP_HEADER_SIGNATURE) { |
| 53 | printk(KERN_ERR "wakeup header does not match\n"); |
| 54 | return -EINVAL; |
| 55 | } |
| 56 | |
| 57 | header->video_mode = saved_video_mode; |
| 58 | |
| 59 | header->pmode_behavior = 0; |
| 60 | |
| 61 | #ifndef CONFIG_64BIT |
| 62 | native_store_gdt((struct desc_ptr *)&header->pmode_gdt); |
| 63 | |
| 64 | /* |
| 65 | * We have to check that we can write back the value, and not |
| 66 | * just read it. At least on 90 nm Pentium M (Family 6, Model |
| 67 | * 13), reading an invalid MSR is not guaranteed to trap, see |
| 68 | * Erratum X4 in "Intel Pentium M Processor on 90 nm Process |
| 69 | * with 2-MB L2 Cache and IntelĀ® Processor A100 and A110 on 90 |
| 70 | * nm process with 512-KB L2 Cache Specification Update". |
| 71 | */ |
| 72 | if (!rdmsr_safe(MSR_EFER, |
| 73 | &header->pmode_efer_low, |
| 74 | &header->pmode_efer_high) && |
| 75 | !wrmsr_safe(MSR_EFER, |
| 76 | header->pmode_efer_low, |
| 77 | header->pmode_efer_high)) |
| 78 | header->pmode_behavior |= (1 << WAKEUP_BEHAVIOR_RESTORE_EFER); |
| 79 | #endif /* !CONFIG_64BIT */ |
| 80 | |
| 81 | header->pmode_cr0 = read_cr0(); |
| 82 | if (__this_cpu_read(cpu_info.cpuid_level) >= 0) { |
| 83 | header->pmode_cr4 = __read_cr4(); |
| 84 | header->pmode_behavior |= (1 << WAKEUP_BEHAVIOR_RESTORE_CR4); |
| 85 | } |
| 86 | if (!rdmsr_safe(MSR_IA32_MISC_ENABLE, |
| 87 | &header->pmode_misc_en_low, |
| 88 | &header->pmode_misc_en_high) && |
| 89 | !wrmsr_safe(MSR_IA32_MISC_ENABLE, |
| 90 | header->pmode_misc_en_low, |
| 91 | header->pmode_misc_en_high)) |
| 92 | header->pmode_behavior |= |
| 93 | (1 << WAKEUP_BEHAVIOR_RESTORE_MISC_ENABLE); |
| 94 | header->realmode_flags = acpi_realmode_flags; |
| 95 | header->real_magic = 0x12345678; |
| 96 | |
| 97 | #ifndef CONFIG_64BIT |
| 98 | header->pmode_entry = (u32)&wakeup_pmode_return; |
| 99 | header->pmode_cr3 = (u32)__pa_symbol(initial_page_table); |
| 100 | saved_magic = 0x12345678; |
| 101 | #else /* CONFIG_64BIT */ |
| 102 | #ifdef CONFIG_SMP |
| 103 | initial_stack = (unsigned long)temp_stack + sizeof(temp_stack); |
| 104 | early_gdt_descr.address = |
| 105 | (unsigned long)get_cpu_gdt_rw(smp_processor_id()); |
| 106 | initial_gs = per_cpu_offset(smp_processor_id()); |
| 107 | #endif |
| 108 | initial_code = (unsigned long)wakeup_long64; |
| 109 | saved_magic = 0x123456789abcdef0L; |
| 110 | #endif /* CONFIG_64BIT */ |
| 111 | |
| 112 | /* |
| 113 | * Pause/unpause graph tracing around do_suspend_lowlevel as it has |
| 114 | * inconsistent call/return info after it jumps to the wakeup vector. |
| 115 | */ |
| 116 | pause_graph_tracing(); |
| 117 | do_suspend_lowlevel(); |
| 118 | unpause_graph_tracing(); |
| 119 | return 0; |
| 120 | } |
| 121 | |
| 122 | static int __init acpi_sleep_setup(char *str) |
| 123 | { |
| 124 | while ((str != NULL) && (*str != '\0')) { |
| 125 | if (strncmp(str, "s3_bios", 7) == 0) |
| 126 | acpi_realmode_flags |= 1; |
| 127 | if (strncmp(str, "s3_mode", 7) == 0) |
| 128 | acpi_realmode_flags |= 2; |
| 129 | if (strncmp(str, "s3_beep", 7) == 0) |
| 130 | acpi_realmode_flags |= 4; |
| 131 | #ifdef CONFIG_HIBERNATION |
| 132 | if (strncmp(str, "s4_nohwsig", 10) == 0) |
| 133 | acpi_no_s4_hw_signature(); |
| 134 | #endif |
| 135 | if (strncmp(str, "nonvs", 5) == 0) |
| 136 | acpi_nvs_nosave(); |
| 137 | if (strncmp(str, "nonvs_s3", 8) == 0) |
| 138 | acpi_nvs_nosave_s3(); |
| 139 | if (strncmp(str, "old_ordering", 12) == 0) |
| 140 | acpi_old_suspend_ordering(); |
| 141 | if (strncmp(str, "nobl", 4) == 0) |
| 142 | acpi_sleep_no_blacklist(); |
| 143 | str = strchr(str, ','); |
| 144 | if (str != NULL) |
| 145 | str += strspn(str, ", \t"); |
| 146 | } |
| 147 | return 1; |
| 148 | } |
| 149 | |
| 150 | __setup("acpi_sleep=", acpi_sleep_setup); |