Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | #ifndef _PARISC_DMA_MAPPING_H |
| 3 | #define _PARISC_DMA_MAPPING_H |
| 4 | |
| 5 | #include <asm/cacheflush.h> |
| 6 | |
| 7 | /* |
| 8 | ** We need to support 4 different coherent dma models with one binary: |
| 9 | ** |
| 10 | ** I/O MMU consistent method dma_sync behavior |
| 11 | ** ============= ====================== ======================= |
| 12 | ** a) PA-7x00LC uncachable host memory flush/purge |
| 13 | ** b) U2/Uturn cachable host memory NOP |
| 14 | ** c) Ike/Astro cachable host memory NOP |
| 15 | ** d) EPIC/SAGA memory on EPIC/SAGA flush/reset DMA channel |
| 16 | ** |
| 17 | ** PA-7[13]00LC processors have a GSC bus interface and no I/O MMU. |
| 18 | ** |
| 19 | ** Systems (eg PCX-T workstations) that don't fall into the above |
| 20 | ** categories will need to modify the needed drivers to perform |
| 21 | ** flush/purge and allocate "regular" cacheable pages for everything. |
| 22 | */ |
| 23 | |
| 24 | extern const struct dma_map_ops *hppa_dma_ops; |
| 25 | |
| 26 | static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus) |
| 27 | { |
| 28 | return hppa_dma_ops; |
| 29 | } |
| 30 | |
| 31 | static inline void * |
| 32 | parisc_walk_tree(struct device *dev) |
| 33 | { |
| 34 | struct device *otherdev; |
| 35 | if(likely(dev->platform_data != NULL)) |
| 36 | return dev->platform_data; |
| 37 | /* OK, just traverse the bus to find it */ |
| 38 | for(otherdev = dev->parent; otherdev; |
| 39 | otherdev = otherdev->parent) { |
| 40 | if(otherdev->platform_data) { |
| 41 | dev->platform_data = otherdev->platform_data; |
| 42 | break; |
| 43 | } |
| 44 | } |
| 45 | return dev->platform_data; |
| 46 | } |
| 47 | |
| 48 | #define GET_IOC(dev) ({ \ |
| 49 | void *__pdata = parisc_walk_tree(dev); \ |
| 50 | __pdata ? HBA_DATA(__pdata)->iommu : NULL; \ |
| 51 | }) |
| 52 | |
| 53 | #ifdef CONFIG_IOMMU_CCIO |
| 54 | struct parisc_device; |
| 55 | struct ioc; |
| 56 | void * ccio_get_iommu(const struct parisc_device *dev); |
| 57 | int ccio_request_resource(const struct parisc_device *dev, |
| 58 | struct resource *res); |
| 59 | int ccio_allocate_resource(const struct parisc_device *dev, |
| 60 | struct resource *res, unsigned long size, |
| 61 | unsigned long min, unsigned long max, unsigned long align); |
| 62 | #else /* !CONFIG_IOMMU_CCIO */ |
| 63 | #define ccio_get_iommu(dev) NULL |
| 64 | #define ccio_request_resource(dev, res) insert_resource(&iomem_resource, res) |
| 65 | #define ccio_allocate_resource(dev, res, size, min, max, align) \ |
| 66 | allocate_resource(&iomem_resource, res, size, min, max, \ |
| 67 | align, NULL, NULL) |
| 68 | #endif /* !CONFIG_IOMMU_CCIO */ |
| 69 | |
| 70 | #ifdef CONFIG_IOMMU_SBA |
| 71 | struct parisc_device; |
| 72 | void * sba_get_iommu(struct parisc_device *dev); |
| 73 | #endif |
| 74 | |
| 75 | #endif |