David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * NVMe over Fabrics RDMA host code. |
| 4 | * Copyright (c) 2015-2016 HGST, a Western Digital Company. |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 5 | */ |
| 6 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 7 | #include <linux/module.h> |
| 8 | #include <linux/init.h> |
| 9 | #include <linux/slab.h> |
| 10 | #include <rdma/mr_pool.h> |
| 11 | #include <linux/err.h> |
| 12 | #include <linux/string.h> |
| 13 | #include <linux/atomic.h> |
| 14 | #include <linux/blk-mq.h> |
| 15 | #include <linux/blk-mq-rdma.h> |
| 16 | #include <linux/types.h> |
| 17 | #include <linux/list.h> |
| 18 | #include <linux/mutex.h> |
| 19 | #include <linux/scatterlist.h> |
| 20 | #include <linux/nvme.h> |
| 21 | #include <asm/unaligned.h> |
| 22 | |
| 23 | #include <rdma/ib_verbs.h> |
| 24 | #include <rdma/rdma_cm.h> |
| 25 | #include <linux/nvme-rdma.h> |
| 26 | |
| 27 | #include "nvme.h" |
| 28 | #include "fabrics.h" |
| 29 | |
| 30 | |
| 31 | #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */ |
| 32 | |
| 33 | #define NVME_RDMA_MAX_SEGMENTS 256 |
| 34 | |
| 35 | #define NVME_RDMA_MAX_INLINE_SEGMENTS 4 |
| 36 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 37 | #define NVME_RDMA_DATA_SGL_SIZE \ |
| 38 | (sizeof(struct scatterlist) * NVME_INLINE_SG_CNT) |
| 39 | #define NVME_RDMA_METADATA_SGL_SIZE \ |
| 40 | (sizeof(struct scatterlist) * NVME_INLINE_METADATA_SG_CNT) |
| 41 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 42 | struct nvme_rdma_device { |
| 43 | struct ib_device *dev; |
| 44 | struct ib_pd *pd; |
| 45 | struct kref ref; |
| 46 | struct list_head entry; |
| 47 | unsigned int num_inline_segments; |
| 48 | }; |
| 49 | |
| 50 | struct nvme_rdma_qe { |
| 51 | struct ib_cqe cqe; |
| 52 | void *data; |
| 53 | u64 dma; |
| 54 | }; |
| 55 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 56 | struct nvme_rdma_sgl { |
| 57 | int nents; |
| 58 | struct sg_table sg_table; |
| 59 | }; |
| 60 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 61 | struct nvme_rdma_queue; |
| 62 | struct nvme_rdma_request { |
| 63 | struct nvme_request req; |
| 64 | struct ib_mr *mr; |
| 65 | struct nvme_rdma_qe sqe; |
| 66 | union nvme_result result; |
| 67 | __le16 status; |
| 68 | refcount_t ref; |
| 69 | struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS]; |
| 70 | u32 num_sge; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 71 | struct ib_reg_wr reg_wr; |
| 72 | struct ib_cqe reg_cqe; |
| 73 | struct nvme_rdma_queue *queue; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 74 | struct nvme_rdma_sgl data_sgl; |
| 75 | struct nvme_rdma_sgl *metadata_sgl; |
| 76 | bool use_sig_mr; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 77 | }; |
| 78 | |
| 79 | enum nvme_rdma_queue_flags { |
| 80 | NVME_RDMA_Q_ALLOCATED = 0, |
| 81 | NVME_RDMA_Q_LIVE = 1, |
| 82 | NVME_RDMA_Q_TR_READY = 2, |
| 83 | }; |
| 84 | |
| 85 | struct nvme_rdma_queue { |
| 86 | struct nvme_rdma_qe *rsp_ring; |
| 87 | int queue_size; |
| 88 | size_t cmnd_capsule_len; |
| 89 | struct nvme_rdma_ctrl *ctrl; |
| 90 | struct nvme_rdma_device *device; |
| 91 | struct ib_cq *ib_cq; |
| 92 | struct ib_qp *qp; |
| 93 | |
| 94 | unsigned long flags; |
| 95 | struct rdma_cm_id *cm_id; |
| 96 | int cm_error; |
| 97 | struct completion cm_done; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 98 | bool pi_support; |
| 99 | int cq_size; |
| 100 | struct mutex queue_lock; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 101 | }; |
| 102 | |
| 103 | struct nvme_rdma_ctrl { |
| 104 | /* read only in the hot path */ |
| 105 | struct nvme_rdma_queue *queues; |
| 106 | |
| 107 | /* other member variables */ |
| 108 | struct blk_mq_tag_set tag_set; |
| 109 | struct work_struct err_work; |
| 110 | |
| 111 | struct nvme_rdma_qe async_event_sqe; |
| 112 | |
| 113 | struct delayed_work reconnect_work; |
| 114 | |
| 115 | struct list_head list; |
| 116 | |
| 117 | struct blk_mq_tag_set admin_tag_set; |
| 118 | struct nvme_rdma_device *device; |
| 119 | |
| 120 | u32 max_fr_pages; |
| 121 | |
| 122 | struct sockaddr_storage addr; |
| 123 | struct sockaddr_storage src_addr; |
| 124 | |
| 125 | struct nvme_ctrl ctrl; |
| 126 | bool use_inline_data; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 127 | u32 io_queues[HCTX_MAX_TYPES]; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 128 | }; |
| 129 | |
| 130 | static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) |
| 131 | { |
| 132 | return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); |
| 133 | } |
| 134 | |
| 135 | static LIST_HEAD(device_list); |
| 136 | static DEFINE_MUTEX(device_list_mutex); |
| 137 | |
| 138 | static LIST_HEAD(nvme_rdma_ctrl_list); |
| 139 | static DEFINE_MUTEX(nvme_rdma_ctrl_mutex); |
| 140 | |
| 141 | /* |
| 142 | * Disabling this option makes small I/O goes faster, but is fundamentally |
| 143 | * unsafe. With it turned off we will have to register a global rkey that |
| 144 | * allows read and write access to all physical memory. |
| 145 | */ |
| 146 | static bool register_always = true; |
| 147 | module_param(register_always, bool, 0444); |
| 148 | MODULE_PARM_DESC(register_always, |
| 149 | "Use memory registration even for contiguous memory regions"); |
| 150 | |
| 151 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, |
| 152 | struct rdma_cm_event *event); |
| 153 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 154 | static void nvme_rdma_complete_rq(struct request *rq); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 155 | |
| 156 | static const struct blk_mq_ops nvme_rdma_mq_ops; |
| 157 | static const struct blk_mq_ops nvme_rdma_admin_mq_ops; |
| 158 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 159 | static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue) |
| 160 | { |
| 161 | return queue - queue->ctrl->queues; |
| 162 | } |
| 163 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 164 | static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue) |
| 165 | { |
| 166 | return nvme_rdma_queue_idx(queue) > |
| 167 | queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] + |
| 168 | queue->ctrl->io_queues[HCTX_TYPE_READ]; |
| 169 | } |
| 170 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 171 | static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue) |
| 172 | { |
| 173 | return queue->cmnd_capsule_len - sizeof(struct nvme_command); |
| 174 | } |
| 175 | |
| 176 | static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, |
| 177 | size_t capsule_size, enum dma_data_direction dir) |
| 178 | { |
| 179 | ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir); |
| 180 | kfree(qe->data); |
| 181 | } |
| 182 | |
| 183 | static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, |
| 184 | size_t capsule_size, enum dma_data_direction dir) |
| 185 | { |
| 186 | qe->data = kzalloc(capsule_size, GFP_KERNEL); |
| 187 | if (!qe->data) |
| 188 | return -ENOMEM; |
| 189 | |
| 190 | qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir); |
| 191 | if (ib_dma_mapping_error(ibdev, qe->dma)) { |
| 192 | kfree(qe->data); |
| 193 | qe->data = NULL; |
| 194 | return -ENOMEM; |
| 195 | } |
| 196 | |
| 197 | return 0; |
| 198 | } |
| 199 | |
| 200 | static void nvme_rdma_free_ring(struct ib_device *ibdev, |
| 201 | struct nvme_rdma_qe *ring, size_t ib_queue_size, |
| 202 | size_t capsule_size, enum dma_data_direction dir) |
| 203 | { |
| 204 | int i; |
| 205 | |
| 206 | for (i = 0; i < ib_queue_size; i++) |
| 207 | nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir); |
| 208 | kfree(ring); |
| 209 | } |
| 210 | |
| 211 | static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev, |
| 212 | size_t ib_queue_size, size_t capsule_size, |
| 213 | enum dma_data_direction dir) |
| 214 | { |
| 215 | struct nvme_rdma_qe *ring; |
| 216 | int i; |
| 217 | |
| 218 | ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL); |
| 219 | if (!ring) |
| 220 | return NULL; |
| 221 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 222 | /* |
| 223 | * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue |
| 224 | * lifetime. It's safe, since any chage in the underlying RDMA device |
| 225 | * will issue error recovery and queue re-creation. |
| 226 | */ |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 227 | for (i = 0; i < ib_queue_size; i++) { |
| 228 | if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir)) |
| 229 | goto out_free_ring; |
| 230 | } |
| 231 | |
| 232 | return ring; |
| 233 | |
| 234 | out_free_ring: |
| 235 | nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir); |
| 236 | return NULL; |
| 237 | } |
| 238 | |
| 239 | static void nvme_rdma_qp_event(struct ib_event *event, void *context) |
| 240 | { |
| 241 | pr_debug("QP event %s (%d)\n", |
| 242 | ib_event_msg(event->event), event->event); |
| 243 | |
| 244 | } |
| 245 | |
| 246 | static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue) |
| 247 | { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 248 | int ret; |
| 249 | |
| 250 | ret = wait_for_completion_interruptible_timeout(&queue->cm_done, |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 251 | msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 252 | if (ret < 0) |
| 253 | return ret; |
| 254 | if (ret == 0) |
| 255 | return -ETIMEDOUT; |
| 256 | WARN_ON_ONCE(queue->cm_error > 0); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 257 | return queue->cm_error; |
| 258 | } |
| 259 | |
| 260 | static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor) |
| 261 | { |
| 262 | struct nvme_rdma_device *dev = queue->device; |
| 263 | struct ib_qp_init_attr init_attr; |
| 264 | int ret; |
| 265 | |
| 266 | memset(&init_attr, 0, sizeof(init_attr)); |
| 267 | init_attr.event_handler = nvme_rdma_qp_event; |
| 268 | /* +1 for drain */ |
| 269 | init_attr.cap.max_send_wr = factor * queue->queue_size + 1; |
| 270 | /* +1 for drain */ |
| 271 | init_attr.cap.max_recv_wr = queue->queue_size + 1; |
| 272 | init_attr.cap.max_recv_sge = 1; |
| 273 | init_attr.cap.max_send_sge = 1 + dev->num_inline_segments; |
| 274 | init_attr.sq_sig_type = IB_SIGNAL_REQ_WR; |
| 275 | init_attr.qp_type = IB_QPT_RC; |
| 276 | init_attr.send_cq = queue->ib_cq; |
| 277 | init_attr.recv_cq = queue->ib_cq; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 278 | if (queue->pi_support) |
| 279 | init_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN; |
| 280 | init_attr.qp_context = queue; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 281 | |
| 282 | ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr); |
| 283 | |
| 284 | queue->qp = queue->cm_id->qp; |
| 285 | return ret; |
| 286 | } |
| 287 | |
| 288 | static void nvme_rdma_exit_request(struct blk_mq_tag_set *set, |
| 289 | struct request *rq, unsigned int hctx_idx) |
| 290 | { |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 291 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 292 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 293 | kfree(req->sqe.data); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 294 | } |
| 295 | |
| 296 | static int nvme_rdma_init_request(struct blk_mq_tag_set *set, |
| 297 | struct request *rq, unsigned int hctx_idx, |
| 298 | unsigned int numa_node) |
| 299 | { |
| 300 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
| 301 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
| 302 | int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; |
| 303 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 304 | |
| 305 | nvme_req(rq)->ctrl = &ctrl->ctrl; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 306 | req->sqe.data = kzalloc(sizeof(struct nvme_command), GFP_KERNEL); |
| 307 | if (!req->sqe.data) |
| 308 | return -ENOMEM; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 309 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 310 | /* metadata nvme_rdma_sgl struct is located after command's data SGL */ |
| 311 | if (queue->pi_support) |
| 312 | req->metadata_sgl = (void *)nvme_req(rq) + |
| 313 | sizeof(struct nvme_rdma_request) + |
| 314 | NVME_RDMA_DATA_SGL_SIZE; |
| 315 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 316 | req->queue = queue; |
| 317 | |
| 318 | return 0; |
| 319 | } |
| 320 | |
| 321 | static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, |
| 322 | unsigned int hctx_idx) |
| 323 | { |
| 324 | struct nvme_rdma_ctrl *ctrl = data; |
| 325 | struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1]; |
| 326 | |
| 327 | BUG_ON(hctx_idx >= ctrl->ctrl.queue_count); |
| 328 | |
| 329 | hctx->driver_data = queue; |
| 330 | return 0; |
| 331 | } |
| 332 | |
| 333 | static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data, |
| 334 | unsigned int hctx_idx) |
| 335 | { |
| 336 | struct nvme_rdma_ctrl *ctrl = data; |
| 337 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; |
| 338 | |
| 339 | BUG_ON(hctx_idx != 0); |
| 340 | |
| 341 | hctx->driver_data = queue; |
| 342 | return 0; |
| 343 | } |
| 344 | |
| 345 | static void nvme_rdma_free_dev(struct kref *ref) |
| 346 | { |
| 347 | struct nvme_rdma_device *ndev = |
| 348 | container_of(ref, struct nvme_rdma_device, ref); |
| 349 | |
| 350 | mutex_lock(&device_list_mutex); |
| 351 | list_del(&ndev->entry); |
| 352 | mutex_unlock(&device_list_mutex); |
| 353 | |
| 354 | ib_dealloc_pd(ndev->pd); |
| 355 | kfree(ndev); |
| 356 | } |
| 357 | |
| 358 | static void nvme_rdma_dev_put(struct nvme_rdma_device *dev) |
| 359 | { |
| 360 | kref_put(&dev->ref, nvme_rdma_free_dev); |
| 361 | } |
| 362 | |
| 363 | static int nvme_rdma_dev_get(struct nvme_rdma_device *dev) |
| 364 | { |
| 365 | return kref_get_unless_zero(&dev->ref); |
| 366 | } |
| 367 | |
| 368 | static struct nvme_rdma_device * |
| 369 | nvme_rdma_find_get_device(struct rdma_cm_id *cm_id) |
| 370 | { |
| 371 | struct nvme_rdma_device *ndev; |
| 372 | |
| 373 | mutex_lock(&device_list_mutex); |
| 374 | list_for_each_entry(ndev, &device_list, entry) { |
| 375 | if (ndev->dev->node_guid == cm_id->device->node_guid && |
| 376 | nvme_rdma_dev_get(ndev)) |
| 377 | goto out_unlock; |
| 378 | } |
| 379 | |
| 380 | ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); |
| 381 | if (!ndev) |
| 382 | goto out_err; |
| 383 | |
| 384 | ndev->dev = cm_id->device; |
| 385 | kref_init(&ndev->ref); |
| 386 | |
| 387 | ndev->pd = ib_alloc_pd(ndev->dev, |
| 388 | register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY); |
| 389 | if (IS_ERR(ndev->pd)) |
| 390 | goto out_free_dev; |
| 391 | |
| 392 | if (!(ndev->dev->attrs.device_cap_flags & |
| 393 | IB_DEVICE_MEM_MGT_EXTENSIONS)) { |
| 394 | dev_err(&ndev->dev->dev, |
| 395 | "Memory registrations not supported.\n"); |
| 396 | goto out_free_pd; |
| 397 | } |
| 398 | |
| 399 | ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS, |
| 400 | ndev->dev->attrs.max_send_sge - 1); |
| 401 | list_add(&ndev->entry, &device_list); |
| 402 | out_unlock: |
| 403 | mutex_unlock(&device_list_mutex); |
| 404 | return ndev; |
| 405 | |
| 406 | out_free_pd: |
| 407 | ib_dealloc_pd(ndev->pd); |
| 408 | out_free_dev: |
| 409 | kfree(ndev); |
| 410 | out_err: |
| 411 | mutex_unlock(&device_list_mutex); |
| 412 | return NULL; |
| 413 | } |
| 414 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 415 | static void nvme_rdma_free_cq(struct nvme_rdma_queue *queue) |
| 416 | { |
| 417 | if (nvme_rdma_poll_queue(queue)) |
| 418 | ib_free_cq(queue->ib_cq); |
| 419 | else |
| 420 | ib_cq_pool_put(queue->ib_cq, queue->cq_size); |
| 421 | } |
| 422 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 423 | static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue) |
| 424 | { |
| 425 | struct nvme_rdma_device *dev; |
| 426 | struct ib_device *ibdev; |
| 427 | |
| 428 | if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags)) |
| 429 | return; |
| 430 | |
| 431 | dev = queue->device; |
| 432 | ibdev = dev->dev; |
| 433 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 434 | if (queue->pi_support) |
| 435 | ib_mr_pool_destroy(queue->qp, &queue->qp->sig_mrs); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 436 | ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); |
| 437 | |
| 438 | /* |
| 439 | * The cm_id object might have been destroyed during RDMA connection |
| 440 | * establishment error flow to avoid getting other cma events, thus |
| 441 | * the destruction of the QP shouldn't use rdma_cm API. |
| 442 | */ |
| 443 | ib_destroy_qp(queue->qp); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 444 | nvme_rdma_free_cq(queue); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 445 | |
| 446 | nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, |
| 447 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); |
| 448 | |
| 449 | nvme_rdma_dev_put(dev); |
| 450 | } |
| 451 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 452 | static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev, bool pi_support) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 453 | { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 454 | u32 max_page_list_len; |
| 455 | |
| 456 | if (pi_support) |
| 457 | max_page_list_len = ibdev->attrs.max_pi_fast_reg_page_list_len; |
| 458 | else |
| 459 | max_page_list_len = ibdev->attrs.max_fast_reg_page_list_len; |
| 460 | |
| 461 | return min_t(u32, NVME_RDMA_MAX_SEGMENTS, max_page_list_len - 1); |
| 462 | } |
| 463 | |
| 464 | static int nvme_rdma_create_cq(struct ib_device *ibdev, |
| 465 | struct nvme_rdma_queue *queue) |
| 466 | { |
| 467 | int ret, comp_vector, idx = nvme_rdma_queue_idx(queue); |
| 468 | enum ib_poll_context poll_ctx; |
| 469 | |
| 470 | /* |
| 471 | * Spread I/O queues completion vectors according their queue index. |
| 472 | * Admin queues can always go on completion vector 0. |
| 473 | */ |
| 474 | comp_vector = (idx == 0 ? idx : idx - 1) % ibdev->num_comp_vectors; |
| 475 | |
| 476 | /* Polling queues need direct cq polling context */ |
| 477 | if (nvme_rdma_poll_queue(queue)) { |
| 478 | poll_ctx = IB_POLL_DIRECT; |
| 479 | queue->ib_cq = ib_alloc_cq(ibdev, queue, queue->cq_size, |
| 480 | comp_vector, poll_ctx); |
| 481 | } else { |
| 482 | poll_ctx = IB_POLL_SOFTIRQ; |
| 483 | queue->ib_cq = ib_cq_pool_get(ibdev, queue->cq_size, |
| 484 | comp_vector, poll_ctx); |
| 485 | } |
| 486 | |
| 487 | if (IS_ERR(queue->ib_cq)) { |
| 488 | ret = PTR_ERR(queue->ib_cq); |
| 489 | return ret; |
| 490 | } |
| 491 | |
| 492 | return 0; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 493 | } |
| 494 | |
| 495 | static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) |
| 496 | { |
| 497 | struct ib_device *ibdev; |
| 498 | const int send_wr_factor = 3; /* MR, SEND, INV */ |
| 499 | const int cq_factor = send_wr_factor + 1; /* + RECV */ |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 500 | int ret, pages_per_mr; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 501 | |
| 502 | queue->device = nvme_rdma_find_get_device(queue->cm_id); |
| 503 | if (!queue->device) { |
| 504 | dev_err(queue->cm_id->device->dev.parent, |
| 505 | "no client data found!\n"); |
| 506 | return -ECONNREFUSED; |
| 507 | } |
| 508 | ibdev = queue->device->dev; |
| 509 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 510 | /* +1 for ib_stop_cq */ |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 511 | queue->cq_size = cq_factor * queue->queue_size + 1; |
| 512 | |
| 513 | ret = nvme_rdma_create_cq(ibdev, queue); |
| 514 | if (ret) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 515 | goto out_put_dev; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 516 | |
| 517 | ret = nvme_rdma_create_qp(queue, send_wr_factor); |
| 518 | if (ret) |
| 519 | goto out_destroy_ib_cq; |
| 520 | |
| 521 | queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size, |
| 522 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); |
| 523 | if (!queue->rsp_ring) { |
| 524 | ret = -ENOMEM; |
| 525 | goto out_destroy_qp; |
| 526 | } |
| 527 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 528 | /* |
| 529 | * Currently we don't use SG_GAPS MR's so if the first entry is |
| 530 | * misaligned we'll end up using two entries for a single data page, |
| 531 | * so one additional entry is required. |
| 532 | */ |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 533 | pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev, queue->pi_support) + 1; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 534 | ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs, |
| 535 | queue->queue_size, |
| 536 | IB_MR_TYPE_MEM_REG, |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 537 | pages_per_mr, 0); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 538 | if (ret) { |
| 539 | dev_err(queue->ctrl->ctrl.device, |
| 540 | "failed to initialize MR pool sized %d for QID %d\n", |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 541 | queue->queue_size, nvme_rdma_queue_idx(queue)); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 542 | goto out_destroy_ring; |
| 543 | } |
| 544 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 545 | if (queue->pi_support) { |
| 546 | ret = ib_mr_pool_init(queue->qp, &queue->qp->sig_mrs, |
| 547 | queue->queue_size, IB_MR_TYPE_INTEGRITY, |
| 548 | pages_per_mr, pages_per_mr); |
| 549 | if (ret) { |
| 550 | dev_err(queue->ctrl->ctrl.device, |
| 551 | "failed to initialize PI MR pool sized %d for QID %d\n", |
| 552 | queue->queue_size, nvme_rdma_queue_idx(queue)); |
| 553 | goto out_destroy_mr_pool; |
| 554 | } |
| 555 | } |
| 556 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 557 | set_bit(NVME_RDMA_Q_TR_READY, &queue->flags); |
| 558 | |
| 559 | return 0; |
| 560 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 561 | out_destroy_mr_pool: |
| 562 | ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 563 | out_destroy_ring: |
| 564 | nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, |
| 565 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); |
| 566 | out_destroy_qp: |
| 567 | rdma_destroy_qp(queue->cm_id); |
| 568 | out_destroy_ib_cq: |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 569 | nvme_rdma_free_cq(queue); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 570 | out_put_dev: |
| 571 | nvme_rdma_dev_put(queue->device); |
| 572 | return ret; |
| 573 | } |
| 574 | |
| 575 | static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl, |
| 576 | int idx, size_t queue_size) |
| 577 | { |
| 578 | struct nvme_rdma_queue *queue; |
| 579 | struct sockaddr *src_addr = NULL; |
| 580 | int ret; |
| 581 | |
| 582 | queue = &ctrl->queues[idx]; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 583 | mutex_init(&queue->queue_lock); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 584 | queue->ctrl = ctrl; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 585 | if (idx && ctrl->ctrl.max_integrity_segments) |
| 586 | queue->pi_support = true; |
| 587 | else |
| 588 | queue->pi_support = false; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 589 | init_completion(&queue->cm_done); |
| 590 | |
| 591 | if (idx > 0) |
| 592 | queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16; |
| 593 | else |
| 594 | queue->cmnd_capsule_len = sizeof(struct nvme_command); |
| 595 | |
| 596 | queue->queue_size = queue_size; |
| 597 | |
| 598 | queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue, |
| 599 | RDMA_PS_TCP, IB_QPT_RC); |
| 600 | if (IS_ERR(queue->cm_id)) { |
| 601 | dev_info(ctrl->ctrl.device, |
| 602 | "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id)); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 603 | ret = PTR_ERR(queue->cm_id); |
| 604 | goto out_destroy_mutex; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 605 | } |
| 606 | |
| 607 | if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) |
| 608 | src_addr = (struct sockaddr *)&ctrl->src_addr; |
| 609 | |
| 610 | queue->cm_error = -ETIMEDOUT; |
| 611 | ret = rdma_resolve_addr(queue->cm_id, src_addr, |
| 612 | (struct sockaddr *)&ctrl->addr, |
| 613 | NVME_RDMA_CONNECT_TIMEOUT_MS); |
| 614 | if (ret) { |
| 615 | dev_info(ctrl->ctrl.device, |
| 616 | "rdma_resolve_addr failed (%d).\n", ret); |
| 617 | goto out_destroy_cm_id; |
| 618 | } |
| 619 | |
| 620 | ret = nvme_rdma_wait_for_cm(queue); |
| 621 | if (ret) { |
| 622 | dev_info(ctrl->ctrl.device, |
| 623 | "rdma connection establishment failed (%d)\n", ret); |
| 624 | goto out_destroy_cm_id; |
| 625 | } |
| 626 | |
| 627 | set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags); |
| 628 | |
| 629 | return 0; |
| 630 | |
| 631 | out_destroy_cm_id: |
| 632 | rdma_destroy_id(queue->cm_id); |
| 633 | nvme_rdma_destroy_queue_ib(queue); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 634 | out_destroy_mutex: |
| 635 | mutex_destroy(&queue->queue_lock); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 636 | return ret; |
| 637 | } |
| 638 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 639 | static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) |
| 640 | { |
| 641 | rdma_disconnect(queue->cm_id); |
| 642 | ib_drain_qp(queue->qp); |
| 643 | } |
| 644 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 645 | static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) |
| 646 | { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 647 | mutex_lock(&queue->queue_lock); |
| 648 | if (test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags)) |
| 649 | __nvme_rdma_stop_queue(queue); |
| 650 | mutex_unlock(&queue->queue_lock); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 651 | } |
| 652 | |
| 653 | static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue) |
| 654 | { |
| 655 | if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) |
| 656 | return; |
| 657 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 658 | rdma_destroy_id(queue->cm_id); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 659 | nvme_rdma_destroy_queue_ib(queue); |
| 660 | mutex_destroy(&queue->queue_lock); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 661 | } |
| 662 | |
| 663 | static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl) |
| 664 | { |
| 665 | int i; |
| 666 | |
| 667 | for (i = 1; i < ctrl->ctrl.queue_count; i++) |
| 668 | nvme_rdma_free_queue(&ctrl->queues[i]); |
| 669 | } |
| 670 | |
| 671 | static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl) |
| 672 | { |
| 673 | int i; |
| 674 | |
| 675 | for (i = 1; i < ctrl->ctrl.queue_count; i++) |
| 676 | nvme_rdma_stop_queue(&ctrl->queues[i]); |
| 677 | } |
| 678 | |
| 679 | static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx) |
| 680 | { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 681 | struct nvme_rdma_queue *queue = &ctrl->queues[idx]; |
| 682 | bool poll = nvme_rdma_poll_queue(queue); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 683 | int ret; |
| 684 | |
| 685 | if (idx) |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 686 | ret = nvmf_connect_io_queue(&ctrl->ctrl, idx, poll); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 687 | else |
| 688 | ret = nvmf_connect_admin_queue(&ctrl->ctrl); |
| 689 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 690 | if (!ret) { |
| 691 | set_bit(NVME_RDMA_Q_LIVE, &queue->flags); |
| 692 | } else { |
| 693 | if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) |
| 694 | __nvme_rdma_stop_queue(queue); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 695 | dev_info(ctrl->ctrl.device, |
| 696 | "failed to connect queue: %d ret=%d\n", idx, ret); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 697 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 698 | return ret; |
| 699 | } |
| 700 | |
| 701 | static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl) |
| 702 | { |
| 703 | int i, ret = 0; |
| 704 | |
| 705 | for (i = 1; i < ctrl->ctrl.queue_count; i++) { |
| 706 | ret = nvme_rdma_start_queue(ctrl, i); |
| 707 | if (ret) |
| 708 | goto out_stop_queues; |
| 709 | } |
| 710 | |
| 711 | return 0; |
| 712 | |
| 713 | out_stop_queues: |
| 714 | for (i--; i >= 1; i--) |
| 715 | nvme_rdma_stop_queue(&ctrl->queues[i]); |
| 716 | return ret; |
| 717 | } |
| 718 | |
| 719 | static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl) |
| 720 | { |
| 721 | struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; |
| 722 | struct ib_device *ibdev = ctrl->device->dev; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 723 | unsigned int nr_io_queues, nr_default_queues; |
| 724 | unsigned int nr_read_queues, nr_poll_queues; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 725 | int i, ret; |
| 726 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 727 | nr_read_queues = min_t(unsigned int, ibdev->num_comp_vectors, |
| 728 | min(opts->nr_io_queues, num_online_cpus())); |
| 729 | nr_default_queues = min_t(unsigned int, ibdev->num_comp_vectors, |
| 730 | min(opts->nr_write_queues, num_online_cpus())); |
| 731 | nr_poll_queues = min(opts->nr_poll_queues, num_online_cpus()); |
| 732 | nr_io_queues = nr_read_queues + nr_default_queues + nr_poll_queues; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 733 | |
| 734 | ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); |
| 735 | if (ret) |
| 736 | return ret; |
| 737 | |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 738 | if (nr_io_queues == 0) { |
| 739 | dev_err(ctrl->ctrl.device, |
| 740 | "unable to set any I/O queues\n"); |
| 741 | return -ENOMEM; |
| 742 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 743 | |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 744 | ctrl->ctrl.queue_count = nr_io_queues + 1; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 745 | dev_info(ctrl->ctrl.device, |
| 746 | "creating %d I/O queues.\n", nr_io_queues); |
| 747 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 748 | if (opts->nr_write_queues && nr_read_queues < nr_io_queues) { |
| 749 | /* |
| 750 | * separate read/write queues |
| 751 | * hand out dedicated default queues only after we have |
| 752 | * sufficient read queues. |
| 753 | */ |
| 754 | ctrl->io_queues[HCTX_TYPE_READ] = nr_read_queues; |
| 755 | nr_io_queues -= ctrl->io_queues[HCTX_TYPE_READ]; |
| 756 | ctrl->io_queues[HCTX_TYPE_DEFAULT] = |
| 757 | min(nr_default_queues, nr_io_queues); |
| 758 | nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT]; |
| 759 | } else { |
| 760 | /* |
| 761 | * shared read/write queues |
| 762 | * either no write queues were requested, or we don't have |
| 763 | * sufficient queue count to have dedicated default queues. |
| 764 | */ |
| 765 | ctrl->io_queues[HCTX_TYPE_DEFAULT] = |
| 766 | min(nr_read_queues, nr_io_queues); |
| 767 | nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT]; |
| 768 | } |
| 769 | |
| 770 | if (opts->nr_poll_queues && nr_io_queues) { |
| 771 | /* map dedicated poll queues only if we have queues left */ |
| 772 | ctrl->io_queues[HCTX_TYPE_POLL] = |
| 773 | min(nr_poll_queues, nr_io_queues); |
| 774 | } |
| 775 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 776 | for (i = 1; i < ctrl->ctrl.queue_count; i++) { |
| 777 | ret = nvme_rdma_alloc_queue(ctrl, i, |
| 778 | ctrl->ctrl.sqsize + 1); |
| 779 | if (ret) |
| 780 | goto out_free_queues; |
| 781 | } |
| 782 | |
| 783 | return 0; |
| 784 | |
| 785 | out_free_queues: |
| 786 | for (i--; i >= 1; i--) |
| 787 | nvme_rdma_free_queue(&ctrl->queues[i]); |
| 788 | |
| 789 | return ret; |
| 790 | } |
| 791 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 792 | static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl, |
| 793 | bool admin) |
| 794 | { |
| 795 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); |
| 796 | struct blk_mq_tag_set *set; |
| 797 | int ret; |
| 798 | |
| 799 | if (admin) { |
| 800 | set = &ctrl->admin_tag_set; |
| 801 | memset(set, 0, sizeof(*set)); |
| 802 | set->ops = &nvme_rdma_admin_mq_ops; |
| 803 | set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; |
| 804 | set->reserved_tags = 2; /* connect + keep-alive */ |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 805 | set->numa_node = nctrl->numa_node; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 806 | set->cmd_size = sizeof(struct nvme_rdma_request) + |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 807 | NVME_RDMA_DATA_SGL_SIZE; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 808 | set->driver_data = ctrl; |
| 809 | set->nr_hw_queues = 1; |
| 810 | set->timeout = ADMIN_TIMEOUT; |
| 811 | set->flags = BLK_MQ_F_NO_SCHED; |
| 812 | } else { |
| 813 | set = &ctrl->tag_set; |
| 814 | memset(set, 0, sizeof(*set)); |
| 815 | set->ops = &nvme_rdma_mq_ops; |
| 816 | set->queue_depth = nctrl->sqsize + 1; |
| 817 | set->reserved_tags = 1; /* fabric connect */ |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 818 | set->numa_node = nctrl->numa_node; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 819 | set->flags = BLK_MQ_F_SHOULD_MERGE; |
| 820 | set->cmd_size = sizeof(struct nvme_rdma_request) + |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 821 | NVME_RDMA_DATA_SGL_SIZE; |
| 822 | if (nctrl->max_integrity_segments) |
| 823 | set->cmd_size += sizeof(struct nvme_rdma_sgl) + |
| 824 | NVME_RDMA_METADATA_SGL_SIZE; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 825 | set->driver_data = ctrl; |
| 826 | set->nr_hw_queues = nctrl->queue_count - 1; |
| 827 | set->timeout = NVME_IO_TIMEOUT; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 828 | set->nr_maps = nctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 829 | } |
| 830 | |
| 831 | ret = blk_mq_alloc_tag_set(set); |
| 832 | if (ret) |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 833 | return ERR_PTR(ret); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 834 | |
| 835 | return set; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 836 | } |
| 837 | |
| 838 | static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl, |
| 839 | bool remove) |
| 840 | { |
| 841 | if (remove) { |
| 842 | blk_cleanup_queue(ctrl->ctrl.admin_q); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 843 | blk_cleanup_queue(ctrl->ctrl.fabrics_q); |
| 844 | blk_mq_free_tag_set(ctrl->ctrl.admin_tagset); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 845 | } |
| 846 | if (ctrl->async_event_sqe.data) { |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 847 | cancel_work_sync(&ctrl->ctrl.async_event_work); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 848 | nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, |
| 849 | sizeof(struct nvme_command), DMA_TO_DEVICE); |
| 850 | ctrl->async_event_sqe.data = NULL; |
| 851 | } |
| 852 | nvme_rdma_free_queue(&ctrl->queues[0]); |
| 853 | } |
| 854 | |
| 855 | static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl, |
| 856 | bool new) |
| 857 | { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 858 | bool pi_capable = false; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 859 | int error; |
| 860 | |
| 861 | error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH); |
| 862 | if (error) |
| 863 | return error; |
| 864 | |
| 865 | ctrl->device = ctrl->queues[0].device; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 866 | ctrl->ctrl.numa_node = ibdev_to_node(ctrl->device->dev); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 867 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 868 | /* T10-PI support */ |
| 869 | if (ctrl->device->dev->attrs.device_cap_flags & |
| 870 | IB_DEVICE_INTEGRITY_HANDOVER) |
| 871 | pi_capable = true; |
| 872 | |
| 873 | ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev, |
| 874 | pi_capable); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 875 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 876 | /* |
| 877 | * Bind the async event SQE DMA mapping to the admin queue lifetime. |
| 878 | * It's safe, since any chage in the underlying RDMA device will issue |
| 879 | * error recovery and queue re-creation. |
| 880 | */ |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 881 | error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe, |
| 882 | sizeof(struct nvme_command), DMA_TO_DEVICE); |
| 883 | if (error) |
| 884 | goto out_free_queue; |
| 885 | |
| 886 | if (new) { |
| 887 | ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true); |
| 888 | if (IS_ERR(ctrl->ctrl.admin_tagset)) { |
| 889 | error = PTR_ERR(ctrl->ctrl.admin_tagset); |
| 890 | goto out_free_async_qe; |
| 891 | } |
| 892 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 893 | ctrl->ctrl.fabrics_q = blk_mq_init_queue(&ctrl->admin_tag_set); |
| 894 | if (IS_ERR(ctrl->ctrl.fabrics_q)) { |
| 895 | error = PTR_ERR(ctrl->ctrl.fabrics_q); |
| 896 | goto out_free_tagset; |
| 897 | } |
| 898 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 899 | ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set); |
| 900 | if (IS_ERR(ctrl->ctrl.admin_q)) { |
| 901 | error = PTR_ERR(ctrl->ctrl.admin_q); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 902 | goto out_cleanup_fabrics_q; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 903 | } |
| 904 | } |
| 905 | |
| 906 | error = nvme_rdma_start_queue(ctrl, 0); |
| 907 | if (error) |
| 908 | goto out_cleanup_queue; |
| 909 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 910 | error = nvme_enable_ctrl(&ctrl->ctrl); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 911 | if (error) |
| 912 | goto out_stop_queue; |
| 913 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 914 | ctrl->ctrl.max_segments = ctrl->max_fr_pages; |
| 915 | ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 916 | if (pi_capable) |
| 917 | ctrl->ctrl.max_integrity_segments = ctrl->max_fr_pages; |
| 918 | else |
| 919 | ctrl->ctrl.max_integrity_segments = 0; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 920 | |
| 921 | blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 922 | |
| 923 | error = nvme_init_identify(&ctrl->ctrl); |
| 924 | if (error) |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 925 | goto out_quiesce_queue; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 926 | |
| 927 | return 0; |
| 928 | |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 929 | out_quiesce_queue: |
| 930 | blk_mq_quiesce_queue(ctrl->ctrl.admin_q); |
| 931 | blk_sync_queue(ctrl->ctrl.admin_q); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 932 | out_stop_queue: |
| 933 | nvme_rdma_stop_queue(&ctrl->queues[0]); |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 934 | nvme_cancel_admin_tagset(&ctrl->ctrl); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 935 | out_cleanup_queue: |
| 936 | if (new) |
| 937 | blk_cleanup_queue(ctrl->ctrl.admin_q); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 938 | out_cleanup_fabrics_q: |
| 939 | if (new) |
| 940 | blk_cleanup_queue(ctrl->ctrl.fabrics_q); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 941 | out_free_tagset: |
| 942 | if (new) |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 943 | blk_mq_free_tag_set(ctrl->ctrl.admin_tagset); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 944 | out_free_async_qe: |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 945 | if (ctrl->async_event_sqe.data) { |
| 946 | nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, |
| 947 | sizeof(struct nvme_command), DMA_TO_DEVICE); |
| 948 | ctrl->async_event_sqe.data = NULL; |
| 949 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 950 | out_free_queue: |
| 951 | nvme_rdma_free_queue(&ctrl->queues[0]); |
| 952 | return error; |
| 953 | } |
| 954 | |
| 955 | static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl, |
| 956 | bool remove) |
| 957 | { |
| 958 | if (remove) { |
| 959 | blk_cleanup_queue(ctrl->ctrl.connect_q); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 960 | blk_mq_free_tag_set(ctrl->ctrl.tagset); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 961 | } |
| 962 | nvme_rdma_free_io_queues(ctrl); |
| 963 | } |
| 964 | |
| 965 | static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new) |
| 966 | { |
| 967 | int ret; |
| 968 | |
| 969 | ret = nvme_rdma_alloc_io_queues(ctrl); |
| 970 | if (ret) |
| 971 | return ret; |
| 972 | |
| 973 | if (new) { |
| 974 | ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false); |
| 975 | if (IS_ERR(ctrl->ctrl.tagset)) { |
| 976 | ret = PTR_ERR(ctrl->ctrl.tagset); |
| 977 | goto out_free_io_queues; |
| 978 | } |
| 979 | |
| 980 | ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set); |
| 981 | if (IS_ERR(ctrl->ctrl.connect_q)) { |
| 982 | ret = PTR_ERR(ctrl->ctrl.connect_q); |
| 983 | goto out_free_tag_set; |
| 984 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 985 | } |
| 986 | |
| 987 | ret = nvme_rdma_start_io_queues(ctrl); |
| 988 | if (ret) |
| 989 | goto out_cleanup_connect_q; |
| 990 | |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 991 | if (!new) { |
| 992 | nvme_start_queues(&ctrl->ctrl); |
| 993 | if (!nvme_wait_freeze_timeout(&ctrl->ctrl, NVME_IO_TIMEOUT)) { |
| 994 | /* |
| 995 | * If we timed out waiting for freeze we are likely to |
| 996 | * be stuck. Fail the controller initialization just |
| 997 | * to be safe. |
| 998 | */ |
| 999 | ret = -ENODEV; |
| 1000 | goto out_wait_freeze_timed_out; |
| 1001 | } |
| 1002 | blk_mq_update_nr_hw_queues(ctrl->ctrl.tagset, |
| 1003 | ctrl->ctrl.queue_count - 1); |
| 1004 | nvme_unfreeze(&ctrl->ctrl); |
| 1005 | } |
| 1006 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1007 | return 0; |
| 1008 | |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 1009 | out_wait_freeze_timed_out: |
| 1010 | nvme_stop_queues(&ctrl->ctrl); |
| 1011 | nvme_sync_io_queues(&ctrl->ctrl); |
| 1012 | nvme_rdma_stop_io_queues(ctrl); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1013 | out_cleanup_connect_q: |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 1014 | nvme_cancel_tagset(&ctrl->ctrl); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1015 | if (new) |
| 1016 | blk_cleanup_queue(ctrl->ctrl.connect_q); |
| 1017 | out_free_tag_set: |
| 1018 | if (new) |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1019 | blk_mq_free_tag_set(ctrl->ctrl.tagset); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1020 | out_free_io_queues: |
| 1021 | nvme_rdma_free_io_queues(ctrl); |
| 1022 | return ret; |
| 1023 | } |
| 1024 | |
| 1025 | static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl, |
| 1026 | bool remove) |
| 1027 | { |
| 1028 | blk_mq_quiesce_queue(ctrl->ctrl.admin_q); |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 1029 | blk_sync_queue(ctrl->ctrl.admin_q); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1030 | nvme_rdma_stop_queue(&ctrl->queues[0]); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1031 | if (ctrl->ctrl.admin_tagset) { |
| 1032 | blk_mq_tagset_busy_iter(ctrl->ctrl.admin_tagset, |
| 1033 | nvme_cancel_request, &ctrl->ctrl); |
| 1034 | blk_mq_tagset_wait_completed_request(ctrl->ctrl.admin_tagset); |
| 1035 | } |
| 1036 | if (remove) |
| 1037 | blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1038 | nvme_rdma_destroy_admin_queue(ctrl, remove); |
| 1039 | } |
| 1040 | |
| 1041 | static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl, |
| 1042 | bool remove) |
| 1043 | { |
| 1044 | if (ctrl->ctrl.queue_count > 1) { |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 1045 | nvme_start_freeze(&ctrl->ctrl); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1046 | nvme_stop_queues(&ctrl->ctrl); |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 1047 | nvme_sync_io_queues(&ctrl->ctrl); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1048 | nvme_rdma_stop_io_queues(ctrl); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1049 | if (ctrl->ctrl.tagset) { |
| 1050 | blk_mq_tagset_busy_iter(ctrl->ctrl.tagset, |
| 1051 | nvme_cancel_request, &ctrl->ctrl); |
| 1052 | blk_mq_tagset_wait_completed_request(ctrl->ctrl.tagset); |
| 1053 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1054 | if (remove) |
| 1055 | nvme_start_queues(&ctrl->ctrl); |
| 1056 | nvme_rdma_destroy_io_queues(ctrl, remove); |
| 1057 | } |
| 1058 | } |
| 1059 | |
Olivier Deprez | 92d4c21 | 2022-12-06 15:05:30 +0100 | [diff] [blame^] | 1060 | static void nvme_rdma_stop_ctrl(struct nvme_ctrl *nctrl) |
| 1061 | { |
| 1062 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); |
| 1063 | |
| 1064 | cancel_work_sync(&ctrl->err_work); |
| 1065 | cancel_delayed_work_sync(&ctrl->reconnect_work); |
| 1066 | } |
| 1067 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1068 | static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl) |
| 1069 | { |
| 1070 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); |
| 1071 | |
| 1072 | if (list_empty(&ctrl->list)) |
| 1073 | goto free_ctrl; |
| 1074 | |
| 1075 | mutex_lock(&nvme_rdma_ctrl_mutex); |
| 1076 | list_del(&ctrl->list); |
| 1077 | mutex_unlock(&nvme_rdma_ctrl_mutex); |
| 1078 | |
| 1079 | nvmf_free_options(nctrl->opts); |
| 1080 | free_ctrl: |
| 1081 | kfree(ctrl->queues); |
| 1082 | kfree(ctrl); |
| 1083 | } |
| 1084 | |
| 1085 | static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl) |
| 1086 | { |
| 1087 | /* If we are resetting/deleting then do nothing */ |
| 1088 | if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) { |
| 1089 | WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW || |
| 1090 | ctrl->ctrl.state == NVME_CTRL_LIVE); |
| 1091 | return; |
| 1092 | } |
| 1093 | |
| 1094 | if (nvmf_should_reconnect(&ctrl->ctrl)) { |
| 1095 | dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n", |
| 1096 | ctrl->ctrl.opts->reconnect_delay); |
| 1097 | queue_delayed_work(nvme_wq, &ctrl->reconnect_work, |
| 1098 | ctrl->ctrl.opts->reconnect_delay * HZ); |
| 1099 | } else { |
| 1100 | nvme_delete_ctrl(&ctrl->ctrl); |
| 1101 | } |
| 1102 | } |
| 1103 | |
| 1104 | static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new) |
| 1105 | { |
| 1106 | int ret = -EINVAL; |
| 1107 | bool changed; |
| 1108 | |
| 1109 | ret = nvme_rdma_configure_admin_queue(ctrl, new); |
| 1110 | if (ret) |
| 1111 | return ret; |
| 1112 | |
| 1113 | if (ctrl->ctrl.icdoff) { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1114 | ret = -EOPNOTSUPP; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1115 | dev_err(ctrl->ctrl.device, "icdoff is not supported!\n"); |
| 1116 | goto destroy_admin; |
| 1117 | } |
| 1118 | |
| 1119 | if (!(ctrl->ctrl.sgls & (1 << 2))) { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1120 | ret = -EOPNOTSUPP; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1121 | dev_err(ctrl->ctrl.device, |
| 1122 | "Mandatory keyed sgls are not supported!\n"); |
| 1123 | goto destroy_admin; |
| 1124 | } |
| 1125 | |
| 1126 | if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) { |
| 1127 | dev_warn(ctrl->ctrl.device, |
| 1128 | "queue_size %zu > ctrl sqsize %u, clamping down\n", |
| 1129 | ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1); |
| 1130 | } |
| 1131 | |
| 1132 | if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) { |
| 1133 | dev_warn(ctrl->ctrl.device, |
| 1134 | "sqsize %u > ctrl maxcmd %u, clamping down\n", |
| 1135 | ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd); |
| 1136 | ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1; |
| 1137 | } |
| 1138 | |
| 1139 | if (ctrl->ctrl.sgls & (1 << 20)) |
| 1140 | ctrl->use_inline_data = true; |
| 1141 | |
| 1142 | if (ctrl->ctrl.queue_count > 1) { |
| 1143 | ret = nvme_rdma_configure_io_queues(ctrl, new); |
| 1144 | if (ret) |
| 1145 | goto destroy_admin; |
| 1146 | } |
| 1147 | |
| 1148 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); |
| 1149 | if (!changed) { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1150 | /* |
| 1151 | * state change failure is ok if we started ctrl delete, |
| 1152 | * unless we're during creation of a new controller to |
| 1153 | * avoid races with teardown flow. |
| 1154 | */ |
| 1155 | WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING && |
| 1156 | ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO); |
| 1157 | WARN_ON_ONCE(new); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1158 | ret = -EINVAL; |
| 1159 | goto destroy_io; |
| 1160 | } |
| 1161 | |
| 1162 | nvme_start_ctrl(&ctrl->ctrl); |
| 1163 | return 0; |
| 1164 | |
| 1165 | destroy_io: |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 1166 | if (ctrl->ctrl.queue_count > 1) { |
| 1167 | nvme_stop_queues(&ctrl->ctrl); |
| 1168 | nvme_sync_io_queues(&ctrl->ctrl); |
| 1169 | nvme_rdma_stop_io_queues(ctrl); |
| 1170 | nvme_cancel_tagset(&ctrl->ctrl); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1171 | nvme_rdma_destroy_io_queues(ctrl, new); |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 1172 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1173 | destroy_admin: |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 1174 | blk_mq_quiesce_queue(ctrl->ctrl.admin_q); |
| 1175 | blk_sync_queue(ctrl->ctrl.admin_q); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1176 | nvme_rdma_stop_queue(&ctrl->queues[0]); |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 1177 | nvme_cancel_admin_tagset(&ctrl->ctrl); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1178 | nvme_rdma_destroy_admin_queue(ctrl, new); |
| 1179 | return ret; |
| 1180 | } |
| 1181 | |
| 1182 | static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) |
| 1183 | { |
| 1184 | struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work), |
| 1185 | struct nvme_rdma_ctrl, reconnect_work); |
| 1186 | |
| 1187 | ++ctrl->ctrl.nr_reconnects; |
| 1188 | |
| 1189 | if (nvme_rdma_setup_ctrl(ctrl, false)) |
| 1190 | goto requeue; |
| 1191 | |
| 1192 | dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n", |
| 1193 | ctrl->ctrl.nr_reconnects); |
| 1194 | |
| 1195 | ctrl->ctrl.nr_reconnects = 0; |
| 1196 | |
| 1197 | return; |
| 1198 | |
| 1199 | requeue: |
| 1200 | dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n", |
| 1201 | ctrl->ctrl.nr_reconnects); |
| 1202 | nvme_rdma_reconnect_or_remove(ctrl); |
| 1203 | } |
| 1204 | |
| 1205 | static void nvme_rdma_error_recovery_work(struct work_struct *work) |
| 1206 | { |
| 1207 | struct nvme_rdma_ctrl *ctrl = container_of(work, |
| 1208 | struct nvme_rdma_ctrl, err_work); |
| 1209 | |
| 1210 | nvme_stop_keep_alive(&ctrl->ctrl); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1211 | flush_work(&ctrl->ctrl.async_event_work); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1212 | nvme_rdma_teardown_io_queues(ctrl, false); |
| 1213 | nvme_start_queues(&ctrl->ctrl); |
| 1214 | nvme_rdma_teardown_admin_queue(ctrl, false); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1215 | blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1216 | |
| 1217 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1218 | /* state change failure is ok if we started ctrl delete */ |
| 1219 | WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING && |
| 1220 | ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1221 | return; |
| 1222 | } |
| 1223 | |
| 1224 | nvme_rdma_reconnect_or_remove(ctrl); |
| 1225 | } |
| 1226 | |
| 1227 | static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl) |
| 1228 | { |
| 1229 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING)) |
| 1230 | return; |
| 1231 | |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 1232 | dev_warn(ctrl->ctrl.device, "starting error recovery\n"); |
| 1233 | queue_work(nvme_reset_wq, &ctrl->err_work); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1234 | } |
| 1235 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1236 | static void nvme_rdma_end_request(struct nvme_rdma_request *req) |
| 1237 | { |
| 1238 | struct request *rq = blk_mq_rq_from_pdu(req); |
| 1239 | |
| 1240 | if (!refcount_dec_and_test(&req->ref)) |
| 1241 | return; |
| 1242 | if (!nvme_try_complete_req(rq, req->status, req->result)) |
| 1243 | nvme_rdma_complete_rq(rq); |
| 1244 | } |
| 1245 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1246 | static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc, |
| 1247 | const char *op) |
| 1248 | { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1249 | struct nvme_rdma_queue *queue = wc->qp->qp_context; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1250 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; |
| 1251 | |
| 1252 | if (ctrl->ctrl.state == NVME_CTRL_LIVE) |
| 1253 | dev_info(ctrl->ctrl.device, |
| 1254 | "%s for CQE 0x%p failed with status %s (%d)\n", |
| 1255 | op, wc->wr_cqe, |
| 1256 | ib_wc_status_msg(wc->status), wc->status); |
| 1257 | nvme_rdma_error_recovery(ctrl); |
| 1258 | } |
| 1259 | |
| 1260 | static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc) |
| 1261 | { |
| 1262 | if (unlikely(wc->status != IB_WC_SUCCESS)) |
| 1263 | nvme_rdma_wr_error(cq, wc, "MEMREG"); |
| 1264 | } |
| 1265 | |
| 1266 | static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc) |
| 1267 | { |
| 1268 | struct nvme_rdma_request *req = |
| 1269 | container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1270 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1271 | if (unlikely(wc->status != IB_WC_SUCCESS)) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1272 | nvme_rdma_wr_error(cq, wc, "LOCAL_INV"); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1273 | else |
| 1274 | nvme_rdma_end_request(req); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1275 | } |
| 1276 | |
| 1277 | static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue, |
| 1278 | struct nvme_rdma_request *req) |
| 1279 | { |
| 1280 | struct ib_send_wr wr = { |
| 1281 | .opcode = IB_WR_LOCAL_INV, |
| 1282 | .next = NULL, |
| 1283 | .num_sge = 0, |
| 1284 | .send_flags = IB_SEND_SIGNALED, |
| 1285 | .ex.invalidate_rkey = req->mr->rkey, |
| 1286 | }; |
| 1287 | |
| 1288 | req->reg_cqe.done = nvme_rdma_inv_rkey_done; |
| 1289 | wr.wr_cqe = &req->reg_cqe; |
| 1290 | |
| 1291 | return ib_post_send(queue->qp, &wr, NULL); |
| 1292 | } |
| 1293 | |
| 1294 | static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue, |
| 1295 | struct request *rq) |
| 1296 | { |
| 1297 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
| 1298 | struct nvme_rdma_device *dev = queue->device; |
| 1299 | struct ib_device *ibdev = dev->dev; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1300 | struct list_head *pool = &queue->qp->rdma_mrs; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1301 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1302 | if (!blk_rq_nr_phys_segments(rq)) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1303 | return; |
| 1304 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1305 | if (blk_integrity_rq(rq)) { |
| 1306 | ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl, |
| 1307 | req->metadata_sgl->nents, rq_dma_dir(rq)); |
| 1308 | sg_free_table_chained(&req->metadata_sgl->sg_table, |
| 1309 | NVME_INLINE_METADATA_SG_CNT); |
| 1310 | } |
| 1311 | |
| 1312 | if (req->use_sig_mr) |
| 1313 | pool = &queue->qp->sig_mrs; |
| 1314 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1315 | if (req->mr) { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1316 | ib_mr_pool_put(queue->qp, pool, req->mr); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1317 | req->mr = NULL; |
| 1318 | } |
| 1319 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1320 | ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents, |
| 1321 | rq_dma_dir(rq)); |
| 1322 | sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1323 | } |
| 1324 | |
| 1325 | static int nvme_rdma_set_sg_null(struct nvme_command *c) |
| 1326 | { |
| 1327 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; |
| 1328 | |
| 1329 | sg->addr = 0; |
| 1330 | put_unaligned_le24(0, sg->length); |
| 1331 | put_unaligned_le32(0, sg->key); |
| 1332 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; |
| 1333 | return 0; |
| 1334 | } |
| 1335 | |
| 1336 | static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue, |
| 1337 | struct nvme_rdma_request *req, struct nvme_command *c, |
| 1338 | int count) |
| 1339 | { |
| 1340 | struct nvme_sgl_desc *sg = &c->common.dptr.sgl; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1341 | struct ib_sge *sge = &req->sge[1]; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1342 | struct scatterlist *sgl; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1343 | u32 len = 0; |
| 1344 | int i; |
| 1345 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1346 | for_each_sg(req->data_sgl.sg_table.sgl, sgl, count, i) { |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1347 | sge->addr = sg_dma_address(sgl); |
| 1348 | sge->length = sg_dma_len(sgl); |
| 1349 | sge->lkey = queue->device->pd->local_dma_lkey; |
| 1350 | len += sge->length; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1351 | sge++; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1352 | } |
| 1353 | |
| 1354 | sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff); |
| 1355 | sg->length = cpu_to_le32(len); |
| 1356 | sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET; |
| 1357 | |
| 1358 | req->num_sge += count; |
| 1359 | return 0; |
| 1360 | } |
| 1361 | |
| 1362 | static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue, |
| 1363 | struct nvme_rdma_request *req, struct nvme_command *c) |
| 1364 | { |
| 1365 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; |
| 1366 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1367 | sg->addr = cpu_to_le64(sg_dma_address(req->data_sgl.sg_table.sgl)); |
| 1368 | put_unaligned_le24(sg_dma_len(req->data_sgl.sg_table.sgl), sg->length); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1369 | put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key); |
| 1370 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; |
| 1371 | return 0; |
| 1372 | } |
| 1373 | |
| 1374 | static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue, |
| 1375 | struct nvme_rdma_request *req, struct nvme_command *c, |
| 1376 | int count) |
| 1377 | { |
| 1378 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; |
| 1379 | int nr; |
| 1380 | |
| 1381 | req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs); |
| 1382 | if (WARN_ON_ONCE(!req->mr)) |
| 1383 | return -EAGAIN; |
| 1384 | |
| 1385 | /* |
| 1386 | * Align the MR to a 4K page size to match the ctrl page size and |
| 1387 | * the block virtual boundary. |
| 1388 | */ |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1389 | nr = ib_map_mr_sg(req->mr, req->data_sgl.sg_table.sgl, count, NULL, |
| 1390 | SZ_4K); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1391 | if (unlikely(nr < count)) { |
| 1392 | ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr); |
| 1393 | req->mr = NULL; |
| 1394 | if (nr < 0) |
| 1395 | return nr; |
| 1396 | return -EINVAL; |
| 1397 | } |
| 1398 | |
| 1399 | ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); |
| 1400 | |
| 1401 | req->reg_cqe.done = nvme_rdma_memreg_done; |
| 1402 | memset(&req->reg_wr, 0, sizeof(req->reg_wr)); |
| 1403 | req->reg_wr.wr.opcode = IB_WR_REG_MR; |
| 1404 | req->reg_wr.wr.wr_cqe = &req->reg_cqe; |
| 1405 | req->reg_wr.wr.num_sge = 0; |
| 1406 | req->reg_wr.mr = req->mr; |
| 1407 | req->reg_wr.key = req->mr->rkey; |
| 1408 | req->reg_wr.access = IB_ACCESS_LOCAL_WRITE | |
| 1409 | IB_ACCESS_REMOTE_READ | |
| 1410 | IB_ACCESS_REMOTE_WRITE; |
| 1411 | |
| 1412 | sg->addr = cpu_to_le64(req->mr->iova); |
| 1413 | put_unaligned_le24(req->mr->length, sg->length); |
| 1414 | put_unaligned_le32(req->mr->rkey, sg->key); |
| 1415 | sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) | |
| 1416 | NVME_SGL_FMT_INVALIDATE; |
| 1417 | |
| 1418 | return 0; |
| 1419 | } |
| 1420 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1421 | static void nvme_rdma_set_sig_domain(struct blk_integrity *bi, |
| 1422 | struct nvme_command *cmd, struct ib_sig_domain *domain, |
| 1423 | u16 control, u8 pi_type) |
| 1424 | { |
| 1425 | domain->sig_type = IB_SIG_TYPE_T10_DIF; |
| 1426 | domain->sig.dif.bg_type = IB_T10DIF_CRC; |
| 1427 | domain->sig.dif.pi_interval = 1 << bi->interval_exp; |
| 1428 | domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag); |
| 1429 | if (control & NVME_RW_PRINFO_PRCHK_REF) |
| 1430 | domain->sig.dif.ref_remap = true; |
| 1431 | |
| 1432 | domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.apptag); |
| 1433 | domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.appmask); |
| 1434 | domain->sig.dif.app_escape = true; |
| 1435 | if (pi_type == NVME_NS_DPS_PI_TYPE3) |
| 1436 | domain->sig.dif.ref_escape = true; |
| 1437 | } |
| 1438 | |
| 1439 | static void nvme_rdma_set_sig_attrs(struct blk_integrity *bi, |
| 1440 | struct nvme_command *cmd, struct ib_sig_attrs *sig_attrs, |
| 1441 | u8 pi_type) |
| 1442 | { |
| 1443 | u16 control = le16_to_cpu(cmd->rw.control); |
| 1444 | |
| 1445 | memset(sig_attrs, 0, sizeof(*sig_attrs)); |
| 1446 | if (control & NVME_RW_PRINFO_PRACT) { |
| 1447 | /* for WRITE_INSERT/READ_STRIP no memory domain */ |
| 1448 | sig_attrs->mem.sig_type = IB_SIG_TYPE_NONE; |
| 1449 | nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control, |
| 1450 | pi_type); |
| 1451 | /* Clear the PRACT bit since HCA will generate/verify the PI */ |
| 1452 | control &= ~NVME_RW_PRINFO_PRACT; |
| 1453 | cmd->rw.control = cpu_to_le16(control); |
| 1454 | } else { |
| 1455 | /* for WRITE_PASS/READ_PASS both wire/memory domains exist */ |
| 1456 | nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control, |
| 1457 | pi_type); |
| 1458 | nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control, |
| 1459 | pi_type); |
| 1460 | } |
| 1461 | } |
| 1462 | |
| 1463 | static void nvme_rdma_set_prot_checks(struct nvme_command *cmd, u8 *mask) |
| 1464 | { |
| 1465 | *mask = 0; |
| 1466 | if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_REF) |
| 1467 | *mask |= IB_SIG_CHECK_REFTAG; |
| 1468 | if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_GUARD) |
| 1469 | *mask |= IB_SIG_CHECK_GUARD; |
| 1470 | } |
| 1471 | |
| 1472 | static void nvme_rdma_sig_done(struct ib_cq *cq, struct ib_wc *wc) |
| 1473 | { |
| 1474 | if (unlikely(wc->status != IB_WC_SUCCESS)) |
| 1475 | nvme_rdma_wr_error(cq, wc, "SIG"); |
| 1476 | } |
| 1477 | |
| 1478 | static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue, |
| 1479 | struct nvme_rdma_request *req, struct nvme_command *c, |
| 1480 | int count, int pi_count) |
| 1481 | { |
| 1482 | struct nvme_rdma_sgl *sgl = &req->data_sgl; |
| 1483 | struct ib_reg_wr *wr = &req->reg_wr; |
| 1484 | struct request *rq = blk_mq_rq_from_pdu(req); |
| 1485 | struct nvme_ns *ns = rq->q->queuedata; |
| 1486 | struct bio *bio = rq->bio; |
| 1487 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; |
| 1488 | int nr; |
| 1489 | |
| 1490 | req->mr = ib_mr_pool_get(queue->qp, &queue->qp->sig_mrs); |
| 1491 | if (WARN_ON_ONCE(!req->mr)) |
| 1492 | return -EAGAIN; |
| 1493 | |
| 1494 | nr = ib_map_mr_sg_pi(req->mr, sgl->sg_table.sgl, count, NULL, |
| 1495 | req->metadata_sgl->sg_table.sgl, pi_count, NULL, |
| 1496 | SZ_4K); |
| 1497 | if (unlikely(nr)) |
| 1498 | goto mr_put; |
| 1499 | |
| 1500 | nvme_rdma_set_sig_attrs(blk_get_integrity(bio->bi_disk), c, |
| 1501 | req->mr->sig_attrs, ns->pi_type); |
| 1502 | nvme_rdma_set_prot_checks(c, &req->mr->sig_attrs->check_mask); |
| 1503 | |
| 1504 | ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); |
| 1505 | |
| 1506 | req->reg_cqe.done = nvme_rdma_sig_done; |
| 1507 | memset(wr, 0, sizeof(*wr)); |
| 1508 | wr->wr.opcode = IB_WR_REG_MR_INTEGRITY; |
| 1509 | wr->wr.wr_cqe = &req->reg_cqe; |
| 1510 | wr->wr.num_sge = 0; |
| 1511 | wr->wr.send_flags = 0; |
| 1512 | wr->mr = req->mr; |
| 1513 | wr->key = req->mr->rkey; |
| 1514 | wr->access = IB_ACCESS_LOCAL_WRITE | |
| 1515 | IB_ACCESS_REMOTE_READ | |
| 1516 | IB_ACCESS_REMOTE_WRITE; |
| 1517 | |
| 1518 | sg->addr = cpu_to_le64(req->mr->iova); |
| 1519 | put_unaligned_le24(req->mr->length, sg->length); |
| 1520 | put_unaligned_le32(req->mr->rkey, sg->key); |
| 1521 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; |
| 1522 | |
| 1523 | return 0; |
| 1524 | |
| 1525 | mr_put: |
| 1526 | ib_mr_pool_put(queue->qp, &queue->qp->sig_mrs, req->mr); |
| 1527 | req->mr = NULL; |
| 1528 | if (nr < 0) |
| 1529 | return nr; |
| 1530 | return -EINVAL; |
| 1531 | } |
| 1532 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1533 | static int nvme_rdma_map_data(struct nvme_rdma_queue *queue, |
| 1534 | struct request *rq, struct nvme_command *c) |
| 1535 | { |
| 1536 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
| 1537 | struct nvme_rdma_device *dev = queue->device; |
| 1538 | struct ib_device *ibdev = dev->dev; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1539 | int pi_count = 0; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1540 | int count, ret; |
| 1541 | |
| 1542 | req->num_sge = 1; |
| 1543 | refcount_set(&req->ref, 2); /* send and recv completions */ |
| 1544 | |
| 1545 | c->common.flags |= NVME_CMD_SGL_METABUF; |
| 1546 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1547 | if (!blk_rq_nr_phys_segments(rq)) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1548 | return nvme_rdma_set_sg_null(c); |
| 1549 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1550 | req->data_sgl.sg_table.sgl = (struct scatterlist *)(req + 1); |
| 1551 | ret = sg_alloc_table_chained(&req->data_sgl.sg_table, |
| 1552 | blk_rq_nr_phys_segments(rq), req->data_sgl.sg_table.sgl, |
| 1553 | NVME_INLINE_SG_CNT); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1554 | if (ret) |
| 1555 | return -ENOMEM; |
| 1556 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1557 | req->data_sgl.nents = blk_rq_map_sg(rq->q, rq, |
| 1558 | req->data_sgl.sg_table.sgl); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1559 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1560 | count = ib_dma_map_sg(ibdev, req->data_sgl.sg_table.sgl, |
| 1561 | req->data_sgl.nents, rq_dma_dir(rq)); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1562 | if (unlikely(count <= 0)) { |
| 1563 | ret = -EIO; |
| 1564 | goto out_free_table; |
| 1565 | } |
| 1566 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1567 | if (blk_integrity_rq(rq)) { |
| 1568 | req->metadata_sgl->sg_table.sgl = |
| 1569 | (struct scatterlist *)(req->metadata_sgl + 1); |
| 1570 | ret = sg_alloc_table_chained(&req->metadata_sgl->sg_table, |
| 1571 | blk_rq_count_integrity_sg(rq->q, rq->bio), |
| 1572 | req->metadata_sgl->sg_table.sgl, |
| 1573 | NVME_INLINE_METADATA_SG_CNT); |
| 1574 | if (unlikely(ret)) { |
| 1575 | ret = -ENOMEM; |
| 1576 | goto out_unmap_sg; |
| 1577 | } |
| 1578 | |
| 1579 | req->metadata_sgl->nents = blk_rq_map_integrity_sg(rq->q, |
| 1580 | rq->bio, req->metadata_sgl->sg_table.sgl); |
| 1581 | pi_count = ib_dma_map_sg(ibdev, |
| 1582 | req->metadata_sgl->sg_table.sgl, |
| 1583 | req->metadata_sgl->nents, |
| 1584 | rq_dma_dir(rq)); |
| 1585 | if (unlikely(pi_count <= 0)) { |
| 1586 | ret = -EIO; |
| 1587 | goto out_free_pi_table; |
| 1588 | } |
| 1589 | } |
| 1590 | |
| 1591 | if (req->use_sig_mr) { |
| 1592 | ret = nvme_rdma_map_sg_pi(queue, req, c, count, pi_count); |
| 1593 | goto out; |
| 1594 | } |
| 1595 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1596 | if (count <= dev->num_inline_segments) { |
| 1597 | if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) && |
| 1598 | queue->ctrl->use_inline_data && |
| 1599 | blk_rq_payload_bytes(rq) <= |
| 1600 | nvme_rdma_inline_data_size(queue)) { |
| 1601 | ret = nvme_rdma_map_sg_inline(queue, req, c, count); |
| 1602 | goto out; |
| 1603 | } |
| 1604 | |
| 1605 | if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) { |
| 1606 | ret = nvme_rdma_map_sg_single(queue, req, c); |
| 1607 | goto out; |
| 1608 | } |
| 1609 | } |
| 1610 | |
| 1611 | ret = nvme_rdma_map_sg_fr(queue, req, c, count); |
| 1612 | out: |
| 1613 | if (unlikely(ret)) |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1614 | goto out_unmap_pi_sg; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1615 | |
| 1616 | return 0; |
| 1617 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1618 | out_unmap_pi_sg: |
| 1619 | if (blk_integrity_rq(rq)) |
| 1620 | ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl, |
| 1621 | req->metadata_sgl->nents, rq_dma_dir(rq)); |
| 1622 | out_free_pi_table: |
| 1623 | if (blk_integrity_rq(rq)) |
| 1624 | sg_free_table_chained(&req->metadata_sgl->sg_table, |
| 1625 | NVME_INLINE_METADATA_SG_CNT); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1626 | out_unmap_sg: |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1627 | ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents, |
| 1628 | rq_dma_dir(rq)); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1629 | out_free_table: |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1630 | sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1631 | return ret; |
| 1632 | } |
| 1633 | |
| 1634 | static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) |
| 1635 | { |
| 1636 | struct nvme_rdma_qe *qe = |
| 1637 | container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); |
| 1638 | struct nvme_rdma_request *req = |
| 1639 | container_of(qe, struct nvme_rdma_request, sqe); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1640 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1641 | if (unlikely(wc->status != IB_WC_SUCCESS)) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1642 | nvme_rdma_wr_error(cq, wc, "SEND"); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1643 | else |
| 1644 | nvme_rdma_end_request(req); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1645 | } |
| 1646 | |
| 1647 | static int nvme_rdma_post_send(struct nvme_rdma_queue *queue, |
| 1648 | struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge, |
| 1649 | struct ib_send_wr *first) |
| 1650 | { |
| 1651 | struct ib_send_wr wr; |
| 1652 | int ret; |
| 1653 | |
| 1654 | sge->addr = qe->dma; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1655 | sge->length = sizeof(struct nvme_command); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1656 | sge->lkey = queue->device->pd->local_dma_lkey; |
| 1657 | |
| 1658 | wr.next = NULL; |
| 1659 | wr.wr_cqe = &qe->cqe; |
| 1660 | wr.sg_list = sge; |
| 1661 | wr.num_sge = num_sge; |
| 1662 | wr.opcode = IB_WR_SEND; |
| 1663 | wr.send_flags = IB_SEND_SIGNALED; |
| 1664 | |
| 1665 | if (first) |
| 1666 | first->next = ≀ |
| 1667 | else |
| 1668 | first = ≀ |
| 1669 | |
| 1670 | ret = ib_post_send(queue->qp, first, NULL); |
| 1671 | if (unlikely(ret)) { |
| 1672 | dev_err(queue->ctrl->ctrl.device, |
| 1673 | "%s failed with error code %d\n", __func__, ret); |
| 1674 | } |
| 1675 | return ret; |
| 1676 | } |
| 1677 | |
| 1678 | static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue, |
| 1679 | struct nvme_rdma_qe *qe) |
| 1680 | { |
| 1681 | struct ib_recv_wr wr; |
| 1682 | struct ib_sge list; |
| 1683 | int ret; |
| 1684 | |
| 1685 | list.addr = qe->dma; |
| 1686 | list.length = sizeof(struct nvme_completion); |
| 1687 | list.lkey = queue->device->pd->local_dma_lkey; |
| 1688 | |
| 1689 | qe->cqe.done = nvme_rdma_recv_done; |
| 1690 | |
| 1691 | wr.next = NULL; |
| 1692 | wr.wr_cqe = &qe->cqe; |
| 1693 | wr.sg_list = &list; |
| 1694 | wr.num_sge = 1; |
| 1695 | |
| 1696 | ret = ib_post_recv(queue->qp, &wr, NULL); |
| 1697 | if (unlikely(ret)) { |
| 1698 | dev_err(queue->ctrl->ctrl.device, |
| 1699 | "%s failed with error code %d\n", __func__, ret); |
| 1700 | } |
| 1701 | return ret; |
| 1702 | } |
| 1703 | |
| 1704 | static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue) |
| 1705 | { |
| 1706 | u32 queue_idx = nvme_rdma_queue_idx(queue); |
| 1707 | |
| 1708 | if (queue_idx == 0) |
| 1709 | return queue->ctrl->admin_tag_set.tags[queue_idx]; |
| 1710 | return queue->ctrl->tag_set.tags[queue_idx - 1]; |
| 1711 | } |
| 1712 | |
| 1713 | static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc) |
| 1714 | { |
| 1715 | if (unlikely(wc->status != IB_WC_SUCCESS)) |
| 1716 | nvme_rdma_wr_error(cq, wc, "ASYNC"); |
| 1717 | } |
| 1718 | |
| 1719 | static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg) |
| 1720 | { |
| 1721 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg); |
| 1722 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; |
| 1723 | struct ib_device *dev = queue->device->dev; |
| 1724 | struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe; |
| 1725 | struct nvme_command *cmd = sqe->data; |
| 1726 | struct ib_sge sge; |
| 1727 | int ret; |
| 1728 | |
| 1729 | ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE); |
| 1730 | |
| 1731 | memset(cmd, 0, sizeof(*cmd)); |
| 1732 | cmd->common.opcode = nvme_admin_async_event; |
| 1733 | cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH; |
| 1734 | cmd->common.flags |= NVME_CMD_SGL_METABUF; |
| 1735 | nvme_rdma_set_sg_null(cmd); |
| 1736 | |
| 1737 | sqe->cqe.done = nvme_rdma_async_done; |
| 1738 | |
| 1739 | ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd), |
| 1740 | DMA_TO_DEVICE); |
| 1741 | |
| 1742 | ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL); |
| 1743 | WARN_ON_ONCE(ret); |
| 1744 | } |
| 1745 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1746 | static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue, |
| 1747 | struct nvme_completion *cqe, struct ib_wc *wc) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1748 | { |
| 1749 | struct request *rq; |
| 1750 | struct nvme_rdma_request *req; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1751 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1752 | rq = nvme_find_rq(nvme_rdma_tagset(queue), cqe->command_id); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1753 | if (!rq) { |
| 1754 | dev_err(queue->ctrl->ctrl.device, |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1755 | "got bad command_id %#x on QP %#x\n", |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1756 | cqe->command_id, queue->qp->qp_num); |
| 1757 | nvme_rdma_error_recovery(queue->ctrl); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1758 | return; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1759 | } |
| 1760 | req = blk_mq_rq_to_pdu(rq); |
| 1761 | |
| 1762 | req->status = cqe->status; |
| 1763 | req->result = cqe->result; |
| 1764 | |
| 1765 | if (wc->wc_flags & IB_WC_WITH_INVALIDATE) { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1766 | if (unlikely(!req->mr || |
| 1767 | wc->ex.invalidate_rkey != req->mr->rkey)) { |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1768 | dev_err(queue->ctrl->ctrl.device, |
| 1769 | "Bogus remote invalidation for rkey %#x\n", |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1770 | req->mr ? req->mr->rkey : 0); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1771 | nvme_rdma_error_recovery(queue->ctrl); |
| 1772 | } |
| 1773 | } else if (req->mr) { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1774 | int ret; |
| 1775 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1776 | ret = nvme_rdma_inv_rkey(queue, req); |
| 1777 | if (unlikely(ret < 0)) { |
| 1778 | dev_err(queue->ctrl->ctrl.device, |
| 1779 | "Queueing INV WR for rkey %#x failed (%d)\n", |
| 1780 | req->mr->rkey, ret); |
| 1781 | nvme_rdma_error_recovery(queue->ctrl); |
| 1782 | } |
| 1783 | /* the local invalidation completion will end the request */ |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1784 | return; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1785 | } |
| 1786 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1787 | nvme_rdma_end_request(req); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1788 | } |
| 1789 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1790 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1791 | { |
| 1792 | struct nvme_rdma_qe *qe = |
| 1793 | container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1794 | struct nvme_rdma_queue *queue = wc->qp->qp_context; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1795 | struct ib_device *ibdev = queue->device->dev; |
| 1796 | struct nvme_completion *cqe = qe->data; |
| 1797 | const size_t len = sizeof(struct nvme_completion); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1798 | |
| 1799 | if (unlikely(wc->status != IB_WC_SUCCESS)) { |
| 1800 | nvme_rdma_wr_error(cq, wc, "RECV"); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1801 | return; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1802 | } |
| 1803 | |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 1804 | /* sanity checking for received data length */ |
| 1805 | if (unlikely(wc->byte_len < len)) { |
| 1806 | dev_err(queue->ctrl->ctrl.device, |
| 1807 | "Unexpected nvme completion length(%d)\n", wc->byte_len); |
| 1808 | nvme_rdma_error_recovery(queue->ctrl); |
| 1809 | return; |
| 1810 | } |
| 1811 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1812 | ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE); |
| 1813 | /* |
| 1814 | * AEN requests are special as they don't time out and can |
| 1815 | * survive any kind of queue freeze and often don't respond to |
| 1816 | * aborts. We don't even bother to allocate a struct request |
| 1817 | * for them but rather special case them here. |
| 1818 | */ |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1819 | if (unlikely(nvme_is_aen_req(nvme_rdma_queue_idx(queue), |
| 1820 | cqe->command_id))) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1821 | nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status, |
| 1822 | &cqe->result); |
| 1823 | else |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1824 | nvme_rdma_process_nvme_rsp(queue, cqe, wc); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1825 | ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE); |
| 1826 | |
| 1827 | nvme_rdma_post_recv(queue, qe); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1828 | } |
| 1829 | |
| 1830 | static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue) |
| 1831 | { |
| 1832 | int ret, i; |
| 1833 | |
| 1834 | for (i = 0; i < queue->queue_size; i++) { |
| 1835 | ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]); |
| 1836 | if (ret) |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1837 | return ret; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1838 | } |
| 1839 | |
| 1840 | return 0; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1841 | } |
| 1842 | |
| 1843 | static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue, |
| 1844 | struct rdma_cm_event *ev) |
| 1845 | { |
| 1846 | struct rdma_cm_id *cm_id = queue->cm_id; |
| 1847 | int status = ev->status; |
| 1848 | const char *rej_msg; |
| 1849 | const struct nvme_rdma_cm_rej *rej_data; |
| 1850 | u8 rej_data_len; |
| 1851 | |
| 1852 | rej_msg = rdma_reject_msg(cm_id, status); |
| 1853 | rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len); |
| 1854 | |
| 1855 | if (rej_data && rej_data_len >= sizeof(u16)) { |
| 1856 | u16 sts = le16_to_cpu(rej_data->sts); |
| 1857 | |
| 1858 | dev_err(queue->ctrl->ctrl.device, |
| 1859 | "Connect rejected: status %d (%s) nvme status %d (%s).\n", |
| 1860 | status, rej_msg, sts, nvme_rdma_cm_msg(sts)); |
| 1861 | } else { |
| 1862 | dev_err(queue->ctrl->ctrl.device, |
| 1863 | "Connect rejected: status %d (%s).\n", status, rej_msg); |
| 1864 | } |
| 1865 | |
| 1866 | return -ECONNRESET; |
| 1867 | } |
| 1868 | |
| 1869 | static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue) |
| 1870 | { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1871 | struct nvme_ctrl *ctrl = &queue->ctrl->ctrl; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1872 | int ret; |
| 1873 | |
| 1874 | ret = nvme_rdma_create_queue_ib(queue); |
| 1875 | if (ret) |
| 1876 | return ret; |
| 1877 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1878 | if (ctrl->opts->tos >= 0) |
| 1879 | rdma_set_service_type(queue->cm_id, ctrl->opts->tos); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1880 | ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS); |
| 1881 | if (ret) { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1882 | dev_err(ctrl->device, "rdma_resolve_route failed (%d).\n", |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1883 | queue->cm_error); |
| 1884 | goto out_destroy_queue; |
| 1885 | } |
| 1886 | |
| 1887 | return 0; |
| 1888 | |
| 1889 | out_destroy_queue: |
| 1890 | nvme_rdma_destroy_queue_ib(queue); |
| 1891 | return ret; |
| 1892 | } |
| 1893 | |
| 1894 | static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue) |
| 1895 | { |
| 1896 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; |
| 1897 | struct rdma_conn_param param = { }; |
| 1898 | struct nvme_rdma_cm_req priv = { }; |
| 1899 | int ret; |
| 1900 | |
| 1901 | param.qp_num = queue->qp->qp_num; |
| 1902 | param.flow_control = 1; |
| 1903 | |
| 1904 | param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom; |
| 1905 | /* maximum retry count */ |
| 1906 | param.retry_count = 7; |
| 1907 | param.rnr_retry_count = 7; |
| 1908 | param.private_data = &priv; |
| 1909 | param.private_data_len = sizeof(priv); |
| 1910 | |
| 1911 | priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); |
| 1912 | priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue)); |
| 1913 | /* |
| 1914 | * set the admin queue depth to the minimum size |
| 1915 | * specified by the Fabrics standard. |
| 1916 | */ |
| 1917 | if (priv.qid == 0) { |
| 1918 | priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH); |
| 1919 | priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1); |
| 1920 | } else { |
| 1921 | /* |
| 1922 | * current interpretation of the fabrics spec |
| 1923 | * is at minimum you make hrqsize sqsize+1, or a |
| 1924 | * 1's based representation of sqsize. |
| 1925 | */ |
| 1926 | priv.hrqsize = cpu_to_le16(queue->queue_size); |
| 1927 | priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize); |
| 1928 | } |
| 1929 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1930 | ret = rdma_connect_locked(queue->cm_id, ¶m); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1931 | if (ret) { |
| 1932 | dev_err(ctrl->ctrl.device, |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1933 | "rdma_connect_locked failed (%d).\n", ret); |
| 1934 | return ret; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1935 | } |
| 1936 | |
| 1937 | return 0; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1938 | } |
| 1939 | |
| 1940 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, |
| 1941 | struct rdma_cm_event *ev) |
| 1942 | { |
| 1943 | struct nvme_rdma_queue *queue = cm_id->context; |
| 1944 | int cm_error = 0; |
| 1945 | |
| 1946 | dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n", |
| 1947 | rdma_event_msg(ev->event), ev->event, |
| 1948 | ev->status, cm_id); |
| 1949 | |
| 1950 | switch (ev->event) { |
| 1951 | case RDMA_CM_EVENT_ADDR_RESOLVED: |
| 1952 | cm_error = nvme_rdma_addr_resolved(queue); |
| 1953 | break; |
| 1954 | case RDMA_CM_EVENT_ROUTE_RESOLVED: |
| 1955 | cm_error = nvme_rdma_route_resolved(queue); |
| 1956 | break; |
| 1957 | case RDMA_CM_EVENT_ESTABLISHED: |
| 1958 | queue->cm_error = nvme_rdma_conn_established(queue); |
| 1959 | /* complete cm_done regardless of success/failure */ |
| 1960 | complete(&queue->cm_done); |
| 1961 | return 0; |
| 1962 | case RDMA_CM_EVENT_REJECTED: |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1963 | cm_error = nvme_rdma_conn_rejected(queue, ev); |
| 1964 | break; |
| 1965 | case RDMA_CM_EVENT_ROUTE_ERROR: |
| 1966 | case RDMA_CM_EVENT_CONNECT_ERROR: |
| 1967 | case RDMA_CM_EVENT_UNREACHABLE: |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1968 | case RDMA_CM_EVENT_ADDR_ERROR: |
| 1969 | dev_dbg(queue->ctrl->ctrl.device, |
| 1970 | "CM error event %d\n", ev->event); |
| 1971 | cm_error = -ECONNRESET; |
| 1972 | break; |
| 1973 | case RDMA_CM_EVENT_DISCONNECTED: |
| 1974 | case RDMA_CM_EVENT_ADDR_CHANGE: |
| 1975 | case RDMA_CM_EVENT_TIMEWAIT_EXIT: |
| 1976 | dev_dbg(queue->ctrl->ctrl.device, |
| 1977 | "disconnect received - connection closed\n"); |
| 1978 | nvme_rdma_error_recovery(queue->ctrl); |
| 1979 | break; |
| 1980 | case RDMA_CM_EVENT_DEVICE_REMOVAL: |
| 1981 | /* device removal is handled via the ib_client API */ |
| 1982 | break; |
| 1983 | default: |
| 1984 | dev_err(queue->ctrl->ctrl.device, |
| 1985 | "Unexpected RDMA CM event (%d)\n", ev->event); |
| 1986 | nvme_rdma_error_recovery(queue->ctrl); |
| 1987 | break; |
| 1988 | } |
| 1989 | |
| 1990 | if (cm_error) { |
| 1991 | queue->cm_error = cm_error; |
| 1992 | complete(&queue->cm_done); |
| 1993 | } |
| 1994 | |
| 1995 | return 0; |
| 1996 | } |
| 1997 | |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 1998 | static void nvme_rdma_complete_timed_out(struct request *rq) |
| 1999 | { |
| 2000 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
| 2001 | struct nvme_rdma_queue *queue = req->queue; |
| 2002 | |
| 2003 | nvme_rdma_stop_queue(queue); |
| 2004 | if (blk_mq_request_started(rq) && !blk_mq_request_completed(rq)) { |
| 2005 | nvme_req(rq)->status = NVME_SC_HOST_ABORTED_CMD; |
| 2006 | blk_mq_complete_request(rq); |
| 2007 | } |
| 2008 | } |
| 2009 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2010 | static enum blk_eh_timer_return |
| 2011 | nvme_rdma_timeout(struct request *rq, bool reserved) |
| 2012 | { |
| 2013 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2014 | struct nvme_rdma_queue *queue = req->queue; |
| 2015 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2016 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2017 | dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n", |
| 2018 | rq->tag, nvme_rdma_queue_idx(queue)); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2019 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2020 | if (ctrl->ctrl.state != NVME_CTRL_LIVE) { |
| 2021 | /* |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 2022 | * If we are resetting, connecting or deleting we should |
| 2023 | * complete immediately because we may block controller |
| 2024 | * teardown or setup sequence |
| 2025 | * - ctrl disable/shutdown fabrics requests |
| 2026 | * - connect requests |
| 2027 | * - initialization admin requests |
| 2028 | * - I/O requests that entered after unquiescing and |
| 2029 | * the controller stopped responding |
| 2030 | * |
| 2031 | * All other requests should be cancelled by the error |
| 2032 | * recovery work, so it's fine that we fail it here. |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2033 | */ |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 2034 | nvme_rdma_complete_timed_out(rq); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2035 | return BLK_EH_DONE; |
| 2036 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2037 | |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 2038 | /* |
| 2039 | * LIVE state should trigger the normal error recovery which will |
| 2040 | * handle completing this request. |
| 2041 | */ |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2042 | nvme_rdma_error_recovery(ctrl); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2043 | return BLK_EH_RESET_TIMER; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2044 | } |
| 2045 | |
| 2046 | static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, |
| 2047 | const struct blk_mq_queue_data *bd) |
| 2048 | { |
| 2049 | struct nvme_ns *ns = hctx->queue->queuedata; |
| 2050 | struct nvme_rdma_queue *queue = hctx->driver_data; |
| 2051 | struct request *rq = bd->rq; |
| 2052 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
| 2053 | struct nvme_rdma_qe *sqe = &req->sqe; |
| 2054 | struct nvme_command *c = sqe->data; |
| 2055 | struct ib_device *dev; |
| 2056 | bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags); |
| 2057 | blk_status_t ret; |
| 2058 | int err; |
| 2059 | |
| 2060 | WARN_ON_ONCE(rq->tag < 0); |
| 2061 | |
| 2062 | if (!nvmf_check_ready(&queue->ctrl->ctrl, rq, queue_ready)) |
| 2063 | return nvmf_fail_nonready_command(&queue->ctrl->ctrl, rq); |
| 2064 | |
| 2065 | dev = queue->device->dev; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2066 | |
| 2067 | req->sqe.dma = ib_dma_map_single(dev, req->sqe.data, |
| 2068 | sizeof(struct nvme_command), |
| 2069 | DMA_TO_DEVICE); |
| 2070 | err = ib_dma_mapping_error(dev, req->sqe.dma); |
| 2071 | if (unlikely(err)) |
| 2072 | return BLK_STS_RESOURCE; |
| 2073 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2074 | ib_dma_sync_single_for_cpu(dev, sqe->dma, |
| 2075 | sizeof(struct nvme_command), DMA_TO_DEVICE); |
| 2076 | |
| 2077 | ret = nvme_setup_cmd(ns, rq, c); |
| 2078 | if (ret) |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2079 | goto unmap_qe; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2080 | |
| 2081 | blk_mq_start_request(rq); |
| 2082 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2083 | if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && |
| 2084 | queue->pi_support && |
| 2085 | (c->common.opcode == nvme_cmd_write || |
| 2086 | c->common.opcode == nvme_cmd_read) && |
| 2087 | nvme_ns_has_pi(ns)) |
| 2088 | req->use_sig_mr = true; |
| 2089 | else |
| 2090 | req->use_sig_mr = false; |
| 2091 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2092 | err = nvme_rdma_map_data(queue, rq, c); |
| 2093 | if (unlikely(err < 0)) { |
| 2094 | dev_err(queue->ctrl->ctrl.device, |
| 2095 | "Failed to map data (%d)\n", err); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2096 | goto err; |
| 2097 | } |
| 2098 | |
| 2099 | sqe->cqe.done = nvme_rdma_send_done; |
| 2100 | |
| 2101 | ib_dma_sync_single_for_device(dev, sqe->dma, |
| 2102 | sizeof(struct nvme_command), DMA_TO_DEVICE); |
| 2103 | |
| 2104 | err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge, |
| 2105 | req->mr ? &req->reg_wr.wr : NULL); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2106 | if (unlikely(err)) |
| 2107 | goto err_unmap; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2108 | |
| 2109 | return BLK_STS_OK; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2110 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2111 | err_unmap: |
| 2112 | nvme_rdma_unmap_data(queue, rq); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2113 | err: |
| 2114 | if (err == -ENOMEM || err == -EAGAIN) |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2115 | ret = BLK_STS_RESOURCE; |
| 2116 | else |
| 2117 | ret = BLK_STS_IOERR; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2118 | nvme_cleanup_cmd(rq); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2119 | unmap_qe: |
| 2120 | ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command), |
| 2121 | DMA_TO_DEVICE); |
| 2122 | return ret; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2123 | } |
| 2124 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2125 | static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2126 | { |
| 2127 | struct nvme_rdma_queue *queue = hctx->driver_data; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2128 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2129 | return ib_process_cq_direct(queue->ib_cq, -1); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2130 | } |
| 2131 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2132 | static void nvme_rdma_check_pi_status(struct nvme_rdma_request *req) |
| 2133 | { |
| 2134 | struct request *rq = blk_mq_rq_from_pdu(req); |
| 2135 | struct ib_mr_status mr_status; |
| 2136 | int ret; |
| 2137 | |
| 2138 | ret = ib_check_mr_status(req->mr, IB_MR_CHECK_SIG_STATUS, &mr_status); |
| 2139 | if (ret) { |
| 2140 | pr_err("ib_check_mr_status failed, ret %d\n", ret); |
| 2141 | nvme_req(rq)->status = NVME_SC_INVALID_PI; |
| 2142 | return; |
| 2143 | } |
| 2144 | |
| 2145 | if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) { |
| 2146 | switch (mr_status.sig_err.err_type) { |
| 2147 | case IB_SIG_BAD_GUARD: |
| 2148 | nvme_req(rq)->status = NVME_SC_GUARD_CHECK; |
| 2149 | break; |
| 2150 | case IB_SIG_BAD_REFTAG: |
| 2151 | nvme_req(rq)->status = NVME_SC_REFTAG_CHECK; |
| 2152 | break; |
| 2153 | case IB_SIG_BAD_APPTAG: |
| 2154 | nvme_req(rq)->status = NVME_SC_APPTAG_CHECK; |
| 2155 | break; |
| 2156 | } |
| 2157 | pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n", |
| 2158 | mr_status.sig_err.err_type, mr_status.sig_err.expected, |
| 2159 | mr_status.sig_err.actual); |
| 2160 | } |
| 2161 | } |
| 2162 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2163 | static void nvme_rdma_complete_rq(struct request *rq) |
| 2164 | { |
| 2165 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2166 | struct nvme_rdma_queue *queue = req->queue; |
| 2167 | struct ib_device *ibdev = queue->device->dev; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2168 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2169 | if (req->use_sig_mr) |
| 2170 | nvme_rdma_check_pi_status(req); |
| 2171 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2172 | nvme_rdma_unmap_data(queue, rq); |
| 2173 | ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command), |
| 2174 | DMA_TO_DEVICE); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2175 | nvme_complete_rq(rq); |
| 2176 | } |
| 2177 | |
| 2178 | static int nvme_rdma_map_queues(struct blk_mq_tag_set *set) |
| 2179 | { |
| 2180 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2181 | struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2182 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2183 | if (opts->nr_write_queues && ctrl->io_queues[HCTX_TYPE_READ]) { |
| 2184 | /* separate read/write queues */ |
| 2185 | set->map[HCTX_TYPE_DEFAULT].nr_queues = |
| 2186 | ctrl->io_queues[HCTX_TYPE_DEFAULT]; |
| 2187 | set->map[HCTX_TYPE_DEFAULT].queue_offset = 0; |
| 2188 | set->map[HCTX_TYPE_READ].nr_queues = |
| 2189 | ctrl->io_queues[HCTX_TYPE_READ]; |
| 2190 | set->map[HCTX_TYPE_READ].queue_offset = |
| 2191 | ctrl->io_queues[HCTX_TYPE_DEFAULT]; |
| 2192 | } else { |
| 2193 | /* shared read/write queues */ |
| 2194 | set->map[HCTX_TYPE_DEFAULT].nr_queues = |
| 2195 | ctrl->io_queues[HCTX_TYPE_DEFAULT]; |
| 2196 | set->map[HCTX_TYPE_DEFAULT].queue_offset = 0; |
| 2197 | set->map[HCTX_TYPE_READ].nr_queues = |
| 2198 | ctrl->io_queues[HCTX_TYPE_DEFAULT]; |
| 2199 | set->map[HCTX_TYPE_READ].queue_offset = 0; |
| 2200 | } |
| 2201 | blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT], |
| 2202 | ctrl->device->dev, 0); |
| 2203 | blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ], |
| 2204 | ctrl->device->dev, 0); |
| 2205 | |
| 2206 | if (opts->nr_poll_queues && ctrl->io_queues[HCTX_TYPE_POLL]) { |
| 2207 | /* map dedicated poll queues only if we have queues left */ |
| 2208 | set->map[HCTX_TYPE_POLL].nr_queues = |
| 2209 | ctrl->io_queues[HCTX_TYPE_POLL]; |
| 2210 | set->map[HCTX_TYPE_POLL].queue_offset = |
| 2211 | ctrl->io_queues[HCTX_TYPE_DEFAULT] + |
| 2212 | ctrl->io_queues[HCTX_TYPE_READ]; |
| 2213 | blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]); |
| 2214 | } |
| 2215 | |
| 2216 | dev_info(ctrl->ctrl.device, |
| 2217 | "mapped %d/%d/%d default/read/poll queues.\n", |
| 2218 | ctrl->io_queues[HCTX_TYPE_DEFAULT], |
| 2219 | ctrl->io_queues[HCTX_TYPE_READ], |
| 2220 | ctrl->io_queues[HCTX_TYPE_POLL]); |
| 2221 | |
| 2222 | return 0; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2223 | } |
| 2224 | |
| 2225 | static const struct blk_mq_ops nvme_rdma_mq_ops = { |
| 2226 | .queue_rq = nvme_rdma_queue_rq, |
| 2227 | .complete = nvme_rdma_complete_rq, |
| 2228 | .init_request = nvme_rdma_init_request, |
| 2229 | .exit_request = nvme_rdma_exit_request, |
| 2230 | .init_hctx = nvme_rdma_init_hctx, |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2231 | .timeout = nvme_rdma_timeout, |
| 2232 | .map_queues = nvme_rdma_map_queues, |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2233 | .poll = nvme_rdma_poll, |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2234 | }; |
| 2235 | |
| 2236 | static const struct blk_mq_ops nvme_rdma_admin_mq_ops = { |
| 2237 | .queue_rq = nvme_rdma_queue_rq, |
| 2238 | .complete = nvme_rdma_complete_rq, |
| 2239 | .init_request = nvme_rdma_init_request, |
| 2240 | .exit_request = nvme_rdma_exit_request, |
| 2241 | .init_hctx = nvme_rdma_init_admin_hctx, |
| 2242 | .timeout = nvme_rdma_timeout, |
| 2243 | }; |
| 2244 | |
| 2245 | static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown) |
| 2246 | { |
| 2247 | nvme_rdma_teardown_io_queues(ctrl, shutdown); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2248 | blk_mq_quiesce_queue(ctrl->ctrl.admin_q); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2249 | if (shutdown) |
| 2250 | nvme_shutdown_ctrl(&ctrl->ctrl); |
| 2251 | else |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2252 | nvme_disable_ctrl(&ctrl->ctrl); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2253 | nvme_rdma_teardown_admin_queue(ctrl, shutdown); |
| 2254 | } |
| 2255 | |
| 2256 | static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl) |
| 2257 | { |
| 2258 | nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true); |
| 2259 | } |
| 2260 | |
| 2261 | static void nvme_rdma_reset_ctrl_work(struct work_struct *work) |
| 2262 | { |
| 2263 | struct nvme_rdma_ctrl *ctrl = |
| 2264 | container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work); |
| 2265 | |
| 2266 | nvme_stop_ctrl(&ctrl->ctrl); |
| 2267 | nvme_rdma_shutdown_ctrl(ctrl, false); |
| 2268 | |
| 2269 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { |
| 2270 | /* state change failure should never happen */ |
| 2271 | WARN_ON_ONCE(1); |
| 2272 | return; |
| 2273 | } |
| 2274 | |
| 2275 | if (nvme_rdma_setup_ctrl(ctrl, false)) |
| 2276 | goto out_fail; |
| 2277 | |
| 2278 | return; |
| 2279 | |
| 2280 | out_fail: |
| 2281 | ++ctrl->ctrl.nr_reconnects; |
| 2282 | nvme_rdma_reconnect_or_remove(ctrl); |
| 2283 | } |
| 2284 | |
| 2285 | static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = { |
| 2286 | .name = "rdma", |
| 2287 | .module = THIS_MODULE, |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2288 | .flags = NVME_F_FABRICS | NVME_F_METADATA_SUPPORTED, |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2289 | .reg_read32 = nvmf_reg_read32, |
| 2290 | .reg_read64 = nvmf_reg_read64, |
| 2291 | .reg_write32 = nvmf_reg_write32, |
| 2292 | .free_ctrl = nvme_rdma_free_ctrl, |
| 2293 | .submit_async_event = nvme_rdma_submit_async_event, |
| 2294 | .delete_ctrl = nvme_rdma_delete_ctrl, |
| 2295 | .get_address = nvmf_get_address, |
Olivier Deprez | 92d4c21 | 2022-12-06 15:05:30 +0100 | [diff] [blame^] | 2296 | .stop_ctrl = nvme_rdma_stop_ctrl, |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2297 | }; |
| 2298 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2299 | /* |
| 2300 | * Fails a connection request if it matches an existing controller |
| 2301 | * (association) with the same tuple: |
| 2302 | * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN> |
| 2303 | * |
| 2304 | * if local address is not specified in the request, it will match an |
| 2305 | * existing controller with all the other parameters the same and no |
| 2306 | * local port address specified as well. |
| 2307 | * |
| 2308 | * The ports don't need to be compared as they are intrinsically |
| 2309 | * already matched by the port pointers supplied. |
| 2310 | */ |
| 2311 | static bool |
| 2312 | nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts) |
| 2313 | { |
| 2314 | struct nvme_rdma_ctrl *ctrl; |
| 2315 | bool found = false; |
| 2316 | |
| 2317 | mutex_lock(&nvme_rdma_ctrl_mutex); |
| 2318 | list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2319 | found = nvmf_ip_options_match(&ctrl->ctrl, opts); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2320 | if (found) |
| 2321 | break; |
| 2322 | } |
| 2323 | mutex_unlock(&nvme_rdma_ctrl_mutex); |
| 2324 | |
| 2325 | return found; |
| 2326 | } |
| 2327 | |
| 2328 | static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev, |
| 2329 | struct nvmf_ctrl_options *opts) |
| 2330 | { |
| 2331 | struct nvme_rdma_ctrl *ctrl; |
| 2332 | int ret; |
| 2333 | bool changed; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2334 | |
| 2335 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); |
| 2336 | if (!ctrl) |
| 2337 | return ERR_PTR(-ENOMEM); |
| 2338 | ctrl->ctrl.opts = opts; |
| 2339 | INIT_LIST_HEAD(&ctrl->list); |
| 2340 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2341 | if (!(opts->mask & NVMF_OPT_TRSVCID)) { |
| 2342 | opts->trsvcid = |
| 2343 | kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL); |
| 2344 | if (!opts->trsvcid) { |
| 2345 | ret = -ENOMEM; |
| 2346 | goto out_free_ctrl; |
| 2347 | } |
| 2348 | opts->mask |= NVMF_OPT_TRSVCID; |
| 2349 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2350 | |
| 2351 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2352 | opts->traddr, opts->trsvcid, &ctrl->addr); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2353 | if (ret) { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2354 | pr_err("malformed address passed: %s:%s\n", |
| 2355 | opts->traddr, opts->trsvcid); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2356 | goto out_free_ctrl; |
| 2357 | } |
| 2358 | |
| 2359 | if (opts->mask & NVMF_OPT_HOST_TRADDR) { |
| 2360 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, |
| 2361 | opts->host_traddr, NULL, &ctrl->src_addr); |
| 2362 | if (ret) { |
| 2363 | pr_err("malformed src address passed: %s\n", |
| 2364 | opts->host_traddr); |
| 2365 | goto out_free_ctrl; |
| 2366 | } |
| 2367 | } |
| 2368 | |
| 2369 | if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) { |
| 2370 | ret = -EALREADY; |
| 2371 | goto out_free_ctrl; |
| 2372 | } |
| 2373 | |
| 2374 | INIT_DELAYED_WORK(&ctrl->reconnect_work, |
| 2375 | nvme_rdma_reconnect_ctrl_work); |
| 2376 | INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work); |
| 2377 | INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work); |
| 2378 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2379 | ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues + |
| 2380 | opts->nr_poll_queues + 1; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2381 | ctrl->ctrl.sqsize = opts->queue_size - 1; |
| 2382 | ctrl->ctrl.kato = opts->kato; |
| 2383 | |
| 2384 | ret = -ENOMEM; |
| 2385 | ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues), |
| 2386 | GFP_KERNEL); |
| 2387 | if (!ctrl->queues) |
| 2388 | goto out_free_ctrl; |
| 2389 | |
| 2390 | ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops, |
| 2391 | 0 /* no quirks, we're perfect! */); |
| 2392 | if (ret) |
| 2393 | goto out_kfree_queues; |
| 2394 | |
| 2395 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING); |
| 2396 | WARN_ON_ONCE(!changed); |
| 2397 | |
| 2398 | ret = nvme_rdma_setup_ctrl(ctrl, true); |
| 2399 | if (ret) |
| 2400 | goto out_uninit_ctrl; |
| 2401 | |
| 2402 | dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n", |
| 2403 | ctrl->ctrl.opts->subsysnqn, &ctrl->addr); |
| 2404 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2405 | mutex_lock(&nvme_rdma_ctrl_mutex); |
| 2406 | list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list); |
| 2407 | mutex_unlock(&nvme_rdma_ctrl_mutex); |
| 2408 | |
| 2409 | return &ctrl->ctrl; |
| 2410 | |
| 2411 | out_uninit_ctrl: |
| 2412 | nvme_uninit_ctrl(&ctrl->ctrl); |
| 2413 | nvme_put_ctrl(&ctrl->ctrl); |
| 2414 | if (ret > 0) |
| 2415 | ret = -EIO; |
| 2416 | return ERR_PTR(ret); |
| 2417 | out_kfree_queues: |
| 2418 | kfree(ctrl->queues); |
| 2419 | out_free_ctrl: |
| 2420 | kfree(ctrl); |
| 2421 | return ERR_PTR(ret); |
| 2422 | } |
| 2423 | |
| 2424 | static struct nvmf_transport_ops nvme_rdma_transport = { |
| 2425 | .name = "rdma", |
| 2426 | .module = THIS_MODULE, |
| 2427 | .required_opts = NVMF_OPT_TRADDR, |
| 2428 | .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2429 | NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO | |
| 2430 | NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES | |
| 2431 | NVMF_OPT_TOS, |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2432 | .create_ctrl = nvme_rdma_create_ctrl, |
| 2433 | }; |
| 2434 | |
| 2435 | static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data) |
| 2436 | { |
| 2437 | struct nvme_rdma_ctrl *ctrl; |
| 2438 | struct nvme_rdma_device *ndev; |
| 2439 | bool found = false; |
| 2440 | |
| 2441 | mutex_lock(&device_list_mutex); |
| 2442 | list_for_each_entry(ndev, &device_list, entry) { |
| 2443 | if (ndev->dev == ib_device) { |
| 2444 | found = true; |
| 2445 | break; |
| 2446 | } |
| 2447 | } |
| 2448 | mutex_unlock(&device_list_mutex); |
| 2449 | |
| 2450 | if (!found) |
| 2451 | return; |
| 2452 | |
| 2453 | /* Delete all controllers using this device */ |
| 2454 | mutex_lock(&nvme_rdma_ctrl_mutex); |
| 2455 | list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { |
| 2456 | if (ctrl->device->dev != ib_device) |
| 2457 | continue; |
| 2458 | nvme_delete_ctrl(&ctrl->ctrl); |
| 2459 | } |
| 2460 | mutex_unlock(&nvme_rdma_ctrl_mutex); |
| 2461 | |
| 2462 | flush_workqueue(nvme_delete_wq); |
| 2463 | } |
| 2464 | |
| 2465 | static struct ib_client nvme_rdma_ib_client = { |
| 2466 | .name = "nvme_rdma", |
| 2467 | .remove = nvme_rdma_remove_one |
| 2468 | }; |
| 2469 | |
| 2470 | static int __init nvme_rdma_init_module(void) |
| 2471 | { |
| 2472 | int ret; |
| 2473 | |
| 2474 | ret = ib_register_client(&nvme_rdma_ib_client); |
| 2475 | if (ret) |
| 2476 | return ret; |
| 2477 | |
| 2478 | ret = nvmf_register_transport(&nvme_rdma_transport); |
| 2479 | if (ret) |
| 2480 | goto err_unreg_client; |
| 2481 | |
| 2482 | return 0; |
| 2483 | |
| 2484 | err_unreg_client: |
| 2485 | ib_unregister_client(&nvme_rdma_ib_client); |
| 2486 | return ret; |
| 2487 | } |
| 2488 | |
| 2489 | static void __exit nvme_rdma_cleanup_module(void) |
| 2490 | { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2491 | struct nvme_rdma_ctrl *ctrl; |
| 2492 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2493 | nvmf_unregister_transport(&nvme_rdma_transport); |
| 2494 | ib_unregister_client(&nvme_rdma_ib_client); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2495 | |
| 2496 | mutex_lock(&nvme_rdma_ctrl_mutex); |
| 2497 | list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) |
| 2498 | nvme_delete_ctrl(&ctrl->ctrl); |
| 2499 | mutex_unlock(&nvme_rdma_ctrl_mutex); |
| 2500 | flush_workqueue(nvme_delete_wq); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2501 | } |
| 2502 | |
| 2503 | module_init(nvme_rdma_init_module); |
| 2504 | module_exit(nvme_rdma_cleanup_module); |
| 2505 | |
| 2506 | MODULE_LICENSE("GPL v2"); |