David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Bluetooth Software UART Qualcomm protocol |
| 4 | * |
| 5 | * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management |
| 6 | * protocol extension to H4. |
| 7 | * |
| 8 | * Copyright (C) 2007 Texas Instruments, Inc. |
| 9 | * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved. |
| 10 | * |
| 11 | * Acknowledgements: |
| 12 | * This file is based on hci_ll.c, which was... |
| 13 | * Written by Ohad Ben-Cohen <ohad@bencohen.org> |
| 14 | * which was in turn based on hci_h4.c, which was written |
| 15 | * by Maxim Krasnyansky and Marcel Holtmann. |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 16 | */ |
| 17 | |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/clk.h> |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 20 | #include <linux/completion.h> |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 21 | #include <linux/debugfs.h> |
| 22 | #include <linux/delay.h> |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 23 | #include <linux/devcoredump.h> |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 24 | #include <linux/device.h> |
| 25 | #include <linux/gpio/consumer.h> |
| 26 | #include <linux/mod_devicetable.h> |
| 27 | #include <linux/module.h> |
| 28 | #include <linux/of_device.h> |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 29 | #include <linux/acpi.h> |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 30 | #include <linux/platform_device.h> |
| 31 | #include <linux/regulator/consumer.h> |
| 32 | #include <linux/serdev.h> |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 33 | #include <linux/mutex.h> |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 34 | #include <asm/unaligned.h> |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 35 | |
| 36 | #include <net/bluetooth/bluetooth.h> |
| 37 | #include <net/bluetooth/hci_core.h> |
| 38 | |
| 39 | #include "hci_uart.h" |
| 40 | #include "btqca.h" |
| 41 | |
| 42 | /* HCI_IBS protocol messages */ |
| 43 | #define HCI_IBS_SLEEP_IND 0xFE |
| 44 | #define HCI_IBS_WAKE_IND 0xFD |
| 45 | #define HCI_IBS_WAKE_ACK 0xFC |
| 46 | #define HCI_MAX_IBS_SIZE 10 |
| 47 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 48 | #define IBS_WAKE_RETRANS_TIMEOUT_MS 100 |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 49 | #define IBS_BTSOC_TX_IDLE_TIMEOUT_MS 200 |
| 50 | #define IBS_HOST_TX_IDLE_TIMEOUT_MS 2000 |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 51 | #define CMD_TRANS_TIMEOUT_MS 100 |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 52 | #define MEMDUMP_TIMEOUT_MS 8000 |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 53 | |
| 54 | /* susclk rate */ |
| 55 | #define SUSCLK_RATE_32KHZ 32768 |
| 56 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 57 | /* Controller debug log header */ |
| 58 | #define QCA_DEBUG_HANDLE 0x2EDC |
| 59 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 60 | /* max retry count when init fails */ |
| 61 | #define MAX_INIT_RETRIES 3 |
| 62 | |
| 63 | /* Controller dump header */ |
| 64 | #define QCA_SSR_DUMP_HANDLE 0x0108 |
| 65 | #define QCA_DUMP_PACKET_SIZE 255 |
| 66 | #define QCA_LAST_SEQUENCE_NUM 0xFFFF |
| 67 | #define QCA_CRASHBYTE_PACKET_LEN 1096 |
| 68 | #define QCA_MEMDUMP_BYTE 0xFB |
| 69 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 70 | enum qca_flags { |
| 71 | QCA_IBS_ENABLED, |
| 72 | QCA_DROP_VENDOR_EVENT, |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 73 | QCA_SUSPENDING, |
| 74 | QCA_MEMDUMP_COLLECTION, |
| 75 | QCA_HW_ERROR_EVENT, |
| 76 | QCA_SSR_TRIGGERED |
| 77 | }; |
| 78 | |
| 79 | enum qca_capabilities { |
| 80 | QCA_CAP_WIDEBAND_SPEECH = BIT(0), |
| 81 | QCA_CAP_VALID_LE_STATES = BIT(1), |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 82 | }; |
| 83 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 84 | /* HCI_IBS transmit side sleep protocol states */ |
| 85 | enum tx_ibs_states { |
| 86 | HCI_IBS_TX_ASLEEP, |
| 87 | HCI_IBS_TX_WAKING, |
| 88 | HCI_IBS_TX_AWAKE, |
| 89 | }; |
| 90 | |
| 91 | /* HCI_IBS receive side sleep protocol states */ |
| 92 | enum rx_states { |
| 93 | HCI_IBS_RX_ASLEEP, |
| 94 | HCI_IBS_RX_AWAKE, |
| 95 | }; |
| 96 | |
| 97 | /* HCI_IBS transmit and receive side clock state vote */ |
| 98 | enum hci_ibs_clock_state_vote { |
| 99 | HCI_IBS_VOTE_STATS_UPDATE, |
| 100 | HCI_IBS_TX_VOTE_CLOCK_ON, |
| 101 | HCI_IBS_TX_VOTE_CLOCK_OFF, |
| 102 | HCI_IBS_RX_VOTE_CLOCK_ON, |
| 103 | HCI_IBS_RX_VOTE_CLOCK_OFF, |
| 104 | }; |
| 105 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 106 | /* Controller memory dump states */ |
| 107 | enum qca_memdump_states { |
| 108 | QCA_MEMDUMP_IDLE, |
| 109 | QCA_MEMDUMP_COLLECTING, |
| 110 | QCA_MEMDUMP_COLLECTED, |
| 111 | QCA_MEMDUMP_TIMEOUT, |
| 112 | }; |
| 113 | |
| 114 | struct qca_memdump_data { |
| 115 | char *memdump_buf_head; |
| 116 | char *memdump_buf_tail; |
| 117 | u32 current_seq_no; |
| 118 | u32 received_dump; |
| 119 | u32 ram_dump_size; |
| 120 | }; |
| 121 | |
| 122 | struct qca_memdump_event_hdr { |
| 123 | __u8 evt; |
| 124 | __u8 plen; |
| 125 | __u16 opcode; |
| 126 | __u16 seq_no; |
| 127 | __u8 reserved; |
| 128 | } __packed; |
| 129 | |
| 130 | |
| 131 | struct qca_dump_size { |
| 132 | u32 dump_size; |
| 133 | } __packed; |
| 134 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 135 | struct qca_data { |
| 136 | struct hci_uart *hu; |
| 137 | struct sk_buff *rx_skb; |
| 138 | struct sk_buff_head txq; |
| 139 | struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */ |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 140 | struct sk_buff_head rx_memdump_q; /* Memdump wait queue */ |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 141 | spinlock_t hci_ibs_lock; /* HCI_IBS state lock */ |
| 142 | u8 tx_ibs_state; /* HCI_IBS transmit side power state*/ |
| 143 | u8 rx_ibs_state; /* HCI_IBS receive side power state */ |
| 144 | bool tx_vote; /* Clock must be on for TX */ |
| 145 | bool rx_vote; /* Clock must be on for RX */ |
| 146 | struct timer_list tx_idle_timer; |
| 147 | u32 tx_idle_delay; |
| 148 | struct timer_list wake_retrans_timer; |
| 149 | u32 wake_retrans; |
| 150 | struct workqueue_struct *workqueue; |
| 151 | struct work_struct ws_awake_rx; |
| 152 | struct work_struct ws_awake_device; |
| 153 | struct work_struct ws_rx_vote_off; |
| 154 | struct work_struct ws_tx_vote_off; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 155 | struct work_struct ctrl_memdump_evt; |
| 156 | struct delayed_work ctrl_memdump_timeout; |
| 157 | struct qca_memdump_data *qca_memdump; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 158 | unsigned long flags; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 159 | struct completion drop_ev_comp; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 160 | wait_queue_head_t suspend_wait_q; |
| 161 | enum qca_memdump_states memdump_state; |
| 162 | struct mutex hci_memdump_lock; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 163 | |
| 164 | /* For debugging purpose */ |
| 165 | u64 ibs_sent_wacks; |
| 166 | u64 ibs_sent_slps; |
| 167 | u64 ibs_sent_wakes; |
| 168 | u64 ibs_recv_wacks; |
| 169 | u64 ibs_recv_slps; |
| 170 | u64 ibs_recv_wakes; |
| 171 | u64 vote_last_jif; |
| 172 | u32 vote_on_ms; |
| 173 | u32 vote_off_ms; |
| 174 | u64 tx_votes_on; |
| 175 | u64 rx_votes_on; |
| 176 | u64 tx_votes_off; |
| 177 | u64 rx_votes_off; |
| 178 | u64 votes_on; |
| 179 | u64 votes_off; |
| 180 | }; |
| 181 | |
| 182 | enum qca_speed_type { |
| 183 | QCA_INIT_SPEED = 1, |
| 184 | QCA_OPER_SPEED |
| 185 | }; |
| 186 | |
| 187 | /* |
| 188 | * Voltage regulator information required for configuring the |
| 189 | * QCA Bluetooth chipset |
| 190 | */ |
| 191 | struct qca_vreg { |
| 192 | const char *name; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 193 | unsigned int load_uA; |
| 194 | }; |
| 195 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 196 | struct qca_device_data { |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 197 | enum qca_btsoc_type soc_type; |
| 198 | struct qca_vreg *vregs; |
| 199 | size_t num_vregs; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 200 | uint32_t capabilities; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 201 | }; |
| 202 | |
| 203 | /* |
| 204 | * Platform data for the QCA Bluetooth power driver. |
| 205 | */ |
| 206 | struct qca_power { |
| 207 | struct device *dev; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 208 | struct regulator_bulk_data *vreg_bulk; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 209 | int num_vregs; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 210 | bool vregs_on; |
| 211 | }; |
| 212 | |
| 213 | struct qca_serdev { |
| 214 | struct hci_uart serdev_hu; |
| 215 | struct gpio_desc *bt_en; |
| 216 | struct clk *susclk; |
| 217 | enum qca_btsoc_type btsoc_type; |
| 218 | struct qca_power *bt_power; |
| 219 | u32 init_speed; |
| 220 | u32 oper_speed; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 221 | const char *firmware_name; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 222 | }; |
| 223 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 224 | static int qca_regulator_enable(struct qca_serdev *qcadev); |
| 225 | static void qca_regulator_disable(struct qca_serdev *qcadev); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 226 | static void qca_power_shutdown(struct hci_uart *hu); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 227 | static int qca_power_off(struct hci_dev *hdev); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 228 | static void qca_controller_memdump(struct work_struct *work); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 229 | |
| 230 | static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu) |
| 231 | { |
| 232 | enum qca_btsoc_type soc_type; |
| 233 | |
| 234 | if (hu->serdev) { |
| 235 | struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); |
| 236 | |
| 237 | soc_type = qsd->btsoc_type; |
| 238 | } else { |
| 239 | soc_type = QCA_ROME; |
| 240 | } |
| 241 | |
| 242 | return soc_type; |
| 243 | } |
| 244 | |
| 245 | static const char *qca_get_firmware_name(struct hci_uart *hu) |
| 246 | { |
| 247 | if (hu->serdev) { |
| 248 | struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); |
| 249 | |
| 250 | return qsd->firmware_name; |
| 251 | } else { |
| 252 | return NULL; |
| 253 | } |
| 254 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 255 | |
| 256 | static void __serial_clock_on(struct tty_struct *tty) |
| 257 | { |
| 258 | /* TODO: Some chipset requires to enable UART clock on client |
| 259 | * side to save power consumption or manual work is required. |
| 260 | * Please put your code to control UART clock here if needed |
| 261 | */ |
| 262 | } |
| 263 | |
| 264 | static void __serial_clock_off(struct tty_struct *tty) |
| 265 | { |
| 266 | /* TODO: Some chipset requires to disable UART clock on client |
| 267 | * side to save power consumption or manual work is required. |
| 268 | * Please put your code to control UART clock off here if needed |
| 269 | */ |
| 270 | } |
| 271 | |
| 272 | /* serial_clock_vote needs to be called with the ibs lock held */ |
| 273 | static void serial_clock_vote(unsigned long vote, struct hci_uart *hu) |
| 274 | { |
| 275 | struct qca_data *qca = hu->priv; |
| 276 | unsigned int diff; |
| 277 | |
| 278 | bool old_vote = (qca->tx_vote | qca->rx_vote); |
| 279 | bool new_vote; |
| 280 | |
| 281 | switch (vote) { |
| 282 | case HCI_IBS_VOTE_STATS_UPDATE: |
| 283 | diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); |
| 284 | |
| 285 | if (old_vote) |
| 286 | qca->vote_off_ms += diff; |
| 287 | else |
| 288 | qca->vote_on_ms += diff; |
| 289 | return; |
| 290 | |
| 291 | case HCI_IBS_TX_VOTE_CLOCK_ON: |
| 292 | qca->tx_vote = true; |
| 293 | qca->tx_votes_on++; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 294 | break; |
| 295 | |
| 296 | case HCI_IBS_RX_VOTE_CLOCK_ON: |
| 297 | qca->rx_vote = true; |
| 298 | qca->rx_votes_on++; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 299 | break; |
| 300 | |
| 301 | case HCI_IBS_TX_VOTE_CLOCK_OFF: |
| 302 | qca->tx_vote = false; |
| 303 | qca->tx_votes_off++; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 304 | break; |
| 305 | |
| 306 | case HCI_IBS_RX_VOTE_CLOCK_OFF: |
| 307 | qca->rx_vote = false; |
| 308 | qca->rx_votes_off++; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 309 | break; |
| 310 | |
| 311 | default: |
| 312 | BT_ERR("Voting irregularity"); |
| 313 | return; |
| 314 | } |
| 315 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 316 | new_vote = qca->rx_vote | qca->tx_vote; |
| 317 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 318 | if (new_vote != old_vote) { |
| 319 | if (new_vote) |
| 320 | __serial_clock_on(hu->tty); |
| 321 | else |
| 322 | __serial_clock_off(hu->tty); |
| 323 | |
| 324 | BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false", |
| 325 | vote ? "true" : "false"); |
| 326 | |
| 327 | diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); |
| 328 | |
| 329 | if (new_vote) { |
| 330 | qca->votes_on++; |
| 331 | qca->vote_off_ms += diff; |
| 332 | } else { |
| 333 | qca->votes_off++; |
| 334 | qca->vote_on_ms += diff; |
| 335 | } |
| 336 | qca->vote_last_jif = jiffies; |
| 337 | } |
| 338 | } |
| 339 | |
| 340 | /* Builds and sends an HCI_IBS command packet. |
| 341 | * These are very simple packets with only 1 cmd byte. |
| 342 | */ |
| 343 | static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu) |
| 344 | { |
| 345 | int err = 0; |
| 346 | struct sk_buff *skb = NULL; |
| 347 | struct qca_data *qca = hu->priv; |
| 348 | |
| 349 | BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd); |
| 350 | |
| 351 | skb = bt_skb_alloc(1, GFP_ATOMIC); |
| 352 | if (!skb) { |
| 353 | BT_ERR("Failed to allocate memory for HCI_IBS packet"); |
| 354 | return -ENOMEM; |
| 355 | } |
| 356 | |
| 357 | /* Assign HCI_IBS type */ |
| 358 | skb_put_u8(skb, cmd); |
| 359 | |
| 360 | skb_queue_tail(&qca->txq, skb); |
| 361 | |
| 362 | return err; |
| 363 | } |
| 364 | |
| 365 | static void qca_wq_awake_device(struct work_struct *work) |
| 366 | { |
| 367 | struct qca_data *qca = container_of(work, struct qca_data, |
| 368 | ws_awake_device); |
| 369 | struct hci_uart *hu = qca->hu; |
| 370 | unsigned long retrans_delay; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 371 | unsigned long flags; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 372 | |
| 373 | BT_DBG("hu %p wq awake device", hu); |
| 374 | |
| 375 | /* Vote for serial clock */ |
| 376 | serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu); |
| 377 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 378 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 379 | |
| 380 | /* Send wake indication to device */ |
| 381 | if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) |
| 382 | BT_ERR("Failed to send WAKE to device"); |
| 383 | |
| 384 | qca->ibs_sent_wakes++; |
| 385 | |
| 386 | /* Start retransmit timer */ |
| 387 | retrans_delay = msecs_to_jiffies(qca->wake_retrans); |
| 388 | mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); |
| 389 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 390 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 391 | |
| 392 | /* Actually send the packets */ |
| 393 | hci_uart_tx_wakeup(hu); |
| 394 | } |
| 395 | |
| 396 | static void qca_wq_awake_rx(struct work_struct *work) |
| 397 | { |
| 398 | struct qca_data *qca = container_of(work, struct qca_data, |
| 399 | ws_awake_rx); |
| 400 | struct hci_uart *hu = qca->hu; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 401 | unsigned long flags; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 402 | |
| 403 | BT_DBG("hu %p wq awake rx", hu); |
| 404 | |
| 405 | serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu); |
| 406 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 407 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 408 | qca->rx_ibs_state = HCI_IBS_RX_AWAKE; |
| 409 | |
| 410 | /* Always acknowledge device wake up, |
| 411 | * sending IBS message doesn't count as TX ON. |
| 412 | */ |
| 413 | if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) |
| 414 | BT_ERR("Failed to acknowledge device wake up"); |
| 415 | |
| 416 | qca->ibs_sent_wacks++; |
| 417 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 418 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 419 | |
| 420 | /* Actually send the packets */ |
| 421 | hci_uart_tx_wakeup(hu); |
| 422 | } |
| 423 | |
| 424 | static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work) |
| 425 | { |
| 426 | struct qca_data *qca = container_of(work, struct qca_data, |
| 427 | ws_rx_vote_off); |
| 428 | struct hci_uart *hu = qca->hu; |
| 429 | |
| 430 | BT_DBG("hu %p rx clock vote off", hu); |
| 431 | |
| 432 | serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu); |
| 433 | } |
| 434 | |
| 435 | static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work) |
| 436 | { |
| 437 | struct qca_data *qca = container_of(work, struct qca_data, |
| 438 | ws_tx_vote_off); |
| 439 | struct hci_uart *hu = qca->hu; |
| 440 | |
| 441 | BT_DBG("hu %p tx clock vote off", hu); |
| 442 | |
| 443 | /* Run HCI tx handling unlocked */ |
| 444 | hci_uart_tx_wakeup(hu); |
| 445 | |
| 446 | /* Now that message queued to tty driver, vote for tty clocks off. |
| 447 | * It is up to the tty driver to pend the clocks off until tx done. |
| 448 | */ |
| 449 | serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); |
| 450 | } |
| 451 | |
| 452 | static void hci_ibs_tx_idle_timeout(struct timer_list *t) |
| 453 | { |
| 454 | struct qca_data *qca = from_timer(qca, t, tx_idle_timer); |
| 455 | struct hci_uart *hu = qca->hu; |
| 456 | unsigned long flags; |
| 457 | |
| 458 | BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state); |
| 459 | |
| 460 | spin_lock_irqsave_nested(&qca->hci_ibs_lock, |
| 461 | flags, SINGLE_DEPTH_NESTING); |
| 462 | |
| 463 | switch (qca->tx_ibs_state) { |
| 464 | case HCI_IBS_TX_AWAKE: |
| 465 | /* TX_IDLE, go to SLEEP */ |
| 466 | if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) { |
| 467 | BT_ERR("Failed to send SLEEP to device"); |
| 468 | break; |
| 469 | } |
| 470 | qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; |
| 471 | qca->ibs_sent_slps++; |
| 472 | queue_work(qca->workqueue, &qca->ws_tx_vote_off); |
| 473 | break; |
| 474 | |
| 475 | case HCI_IBS_TX_ASLEEP: |
| 476 | case HCI_IBS_TX_WAKING: |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 477 | default: |
| 478 | BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); |
| 479 | break; |
| 480 | } |
| 481 | |
| 482 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
| 483 | } |
| 484 | |
| 485 | static void hci_ibs_wake_retrans_timeout(struct timer_list *t) |
| 486 | { |
| 487 | struct qca_data *qca = from_timer(qca, t, wake_retrans_timer); |
| 488 | struct hci_uart *hu = qca->hu; |
| 489 | unsigned long flags, retrans_delay; |
| 490 | bool retransmit = false; |
| 491 | |
| 492 | BT_DBG("hu %p wake retransmit timeout in %d state", |
| 493 | hu, qca->tx_ibs_state); |
| 494 | |
| 495 | spin_lock_irqsave_nested(&qca->hci_ibs_lock, |
| 496 | flags, SINGLE_DEPTH_NESTING); |
| 497 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 498 | /* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */ |
| 499 | if (test_bit(QCA_SUSPENDING, &qca->flags)) { |
| 500 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
| 501 | return; |
| 502 | } |
| 503 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 504 | switch (qca->tx_ibs_state) { |
| 505 | case HCI_IBS_TX_WAKING: |
| 506 | /* No WAKE_ACK, retransmit WAKE */ |
| 507 | retransmit = true; |
| 508 | if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) { |
| 509 | BT_ERR("Failed to acknowledge device wake up"); |
| 510 | break; |
| 511 | } |
| 512 | qca->ibs_sent_wakes++; |
| 513 | retrans_delay = msecs_to_jiffies(qca->wake_retrans); |
| 514 | mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); |
| 515 | break; |
| 516 | |
| 517 | case HCI_IBS_TX_ASLEEP: |
| 518 | case HCI_IBS_TX_AWAKE: |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 519 | default: |
| 520 | BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); |
| 521 | break; |
| 522 | } |
| 523 | |
| 524 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
| 525 | |
| 526 | if (retransmit) |
| 527 | hci_uart_tx_wakeup(hu); |
| 528 | } |
| 529 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 530 | |
| 531 | static void qca_controller_memdump_timeout(struct work_struct *work) |
| 532 | { |
| 533 | struct qca_data *qca = container_of(work, struct qca_data, |
| 534 | ctrl_memdump_timeout.work); |
| 535 | struct hci_uart *hu = qca->hu; |
| 536 | |
| 537 | mutex_lock(&qca->hci_memdump_lock); |
| 538 | if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) { |
| 539 | qca->memdump_state = QCA_MEMDUMP_TIMEOUT; |
| 540 | if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) { |
| 541 | /* Inject hw error event to reset the device |
| 542 | * and driver. |
| 543 | */ |
| 544 | hci_reset_dev(hu->hdev); |
| 545 | } |
| 546 | } |
| 547 | |
| 548 | mutex_unlock(&qca->hci_memdump_lock); |
| 549 | } |
| 550 | |
| 551 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 552 | /* Initialize protocol */ |
| 553 | static int qca_open(struct hci_uart *hu) |
| 554 | { |
| 555 | struct qca_serdev *qcadev; |
| 556 | struct qca_data *qca; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 557 | |
| 558 | BT_DBG("hu %p qca_open", hu); |
| 559 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 560 | if (!hci_uart_has_flow_control(hu)) |
| 561 | return -EOPNOTSUPP; |
| 562 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 563 | qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL); |
| 564 | if (!qca) |
| 565 | return -ENOMEM; |
| 566 | |
| 567 | skb_queue_head_init(&qca->txq); |
| 568 | skb_queue_head_init(&qca->tx_wait_q); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 569 | skb_queue_head_init(&qca->rx_memdump_q); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 570 | spin_lock_init(&qca->hci_ibs_lock); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 571 | mutex_init(&qca->hci_memdump_lock); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 572 | qca->workqueue = alloc_ordered_workqueue("qca_wq", 0); |
| 573 | if (!qca->workqueue) { |
| 574 | BT_ERR("QCA Workqueue not initialized properly"); |
| 575 | kfree(qca); |
| 576 | return -ENOMEM; |
| 577 | } |
| 578 | |
| 579 | INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx); |
| 580 | INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device); |
| 581 | INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off); |
| 582 | INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 583 | INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump); |
| 584 | INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout, |
| 585 | qca_controller_memdump_timeout); |
| 586 | init_waitqueue_head(&qca->suspend_wait_q); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 587 | |
| 588 | qca->hu = hu; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 589 | init_completion(&qca->drop_ev_comp); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 590 | |
| 591 | /* Assume we start with both sides asleep -- extra wakes OK */ |
| 592 | qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; |
| 593 | qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; |
| 594 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 595 | qca->vote_last_jif = jiffies; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 596 | |
| 597 | hu->priv = qca; |
| 598 | |
| 599 | if (hu->serdev) { |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 600 | qcadev = serdev_device_get_drvdata(hu->serdev); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 601 | |
| 602 | if (qca_is_wcn399x(qcadev->btsoc_type)) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 603 | hu->init_speed = qcadev->init_speed; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 604 | |
| 605 | if (qcadev->oper_speed) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 606 | hu->oper_speed = qcadev->oper_speed; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 607 | } |
| 608 | |
| 609 | timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0); |
| 610 | qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS; |
| 611 | |
| 612 | timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 613 | qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 614 | |
| 615 | BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u", |
| 616 | qca->tx_idle_delay, qca->wake_retrans); |
| 617 | |
| 618 | return 0; |
| 619 | } |
| 620 | |
| 621 | static void qca_debugfs_init(struct hci_dev *hdev) |
| 622 | { |
| 623 | struct hci_uart *hu = hci_get_drvdata(hdev); |
| 624 | struct qca_data *qca = hu->priv; |
| 625 | struct dentry *ibs_dir; |
| 626 | umode_t mode; |
| 627 | |
| 628 | if (!hdev->debugfs) |
| 629 | return; |
| 630 | |
| 631 | ibs_dir = debugfs_create_dir("ibs", hdev->debugfs); |
| 632 | |
| 633 | /* read only */ |
| 634 | mode = S_IRUGO; |
| 635 | debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state); |
| 636 | debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state); |
| 637 | debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir, |
| 638 | &qca->ibs_sent_slps); |
| 639 | debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir, |
| 640 | &qca->ibs_sent_wakes); |
| 641 | debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir, |
| 642 | &qca->ibs_sent_wacks); |
| 643 | debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir, |
| 644 | &qca->ibs_recv_slps); |
| 645 | debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir, |
| 646 | &qca->ibs_recv_wakes); |
| 647 | debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir, |
| 648 | &qca->ibs_recv_wacks); |
| 649 | debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote); |
| 650 | debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on); |
| 651 | debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off); |
| 652 | debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote); |
| 653 | debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on); |
| 654 | debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off); |
| 655 | debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on); |
| 656 | debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off); |
| 657 | debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms); |
| 658 | debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms); |
| 659 | |
| 660 | /* read/write */ |
| 661 | mode = S_IRUGO | S_IWUSR; |
| 662 | debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans); |
| 663 | debugfs_create_u32("tx_idle_delay", mode, ibs_dir, |
| 664 | &qca->tx_idle_delay); |
| 665 | } |
| 666 | |
| 667 | /* Flush protocol data */ |
| 668 | static int qca_flush(struct hci_uart *hu) |
| 669 | { |
| 670 | struct qca_data *qca = hu->priv; |
| 671 | |
| 672 | BT_DBG("hu %p qca flush", hu); |
| 673 | |
| 674 | skb_queue_purge(&qca->tx_wait_q); |
| 675 | skb_queue_purge(&qca->txq); |
| 676 | |
| 677 | return 0; |
| 678 | } |
| 679 | |
| 680 | /* Close protocol */ |
| 681 | static int qca_close(struct hci_uart *hu) |
| 682 | { |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 683 | struct qca_data *qca = hu->priv; |
| 684 | |
| 685 | BT_DBG("hu %p qca close", hu); |
| 686 | |
| 687 | serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu); |
| 688 | |
| 689 | skb_queue_purge(&qca->tx_wait_q); |
| 690 | skb_queue_purge(&qca->txq); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 691 | skb_queue_purge(&qca->rx_memdump_q); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 692 | destroy_workqueue(qca->workqueue); |
Olivier Deprez | 92d4c21 | 2022-12-06 15:05:30 +0100 | [diff] [blame^] | 693 | del_timer_sync(&qca->tx_idle_timer); |
| 694 | del_timer_sync(&qca->wake_retrans_timer); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 695 | qca->hu = NULL; |
| 696 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 697 | kfree_skb(qca->rx_skb); |
| 698 | |
| 699 | hu->priv = NULL; |
| 700 | |
| 701 | kfree(qca); |
| 702 | |
| 703 | return 0; |
| 704 | } |
| 705 | |
| 706 | /* Called upon a wake-up-indication from the device. |
| 707 | */ |
| 708 | static void device_want_to_wakeup(struct hci_uart *hu) |
| 709 | { |
| 710 | unsigned long flags; |
| 711 | struct qca_data *qca = hu->priv; |
| 712 | |
| 713 | BT_DBG("hu %p want to wake up", hu); |
| 714 | |
| 715 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); |
| 716 | |
| 717 | qca->ibs_recv_wakes++; |
| 718 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 719 | /* Don't wake the rx up when suspending. */ |
| 720 | if (test_bit(QCA_SUSPENDING, &qca->flags)) { |
| 721 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
| 722 | return; |
| 723 | } |
| 724 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 725 | switch (qca->rx_ibs_state) { |
| 726 | case HCI_IBS_RX_ASLEEP: |
| 727 | /* Make sure clock is on - we may have turned clock off since |
| 728 | * receiving the wake up indicator awake rx clock. |
| 729 | */ |
| 730 | queue_work(qca->workqueue, &qca->ws_awake_rx); |
| 731 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
| 732 | return; |
| 733 | |
| 734 | case HCI_IBS_RX_AWAKE: |
| 735 | /* Always acknowledge device wake up, |
| 736 | * sending IBS message doesn't count as TX ON. |
| 737 | */ |
| 738 | if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) { |
| 739 | BT_ERR("Failed to acknowledge device wake up"); |
| 740 | break; |
| 741 | } |
| 742 | qca->ibs_sent_wacks++; |
| 743 | break; |
| 744 | |
| 745 | default: |
| 746 | /* Any other state is illegal */ |
| 747 | BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d", |
| 748 | qca->rx_ibs_state); |
| 749 | break; |
| 750 | } |
| 751 | |
| 752 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
| 753 | |
| 754 | /* Actually send the packets */ |
| 755 | hci_uart_tx_wakeup(hu); |
| 756 | } |
| 757 | |
| 758 | /* Called upon a sleep-indication from the device. |
| 759 | */ |
| 760 | static void device_want_to_sleep(struct hci_uart *hu) |
| 761 | { |
| 762 | unsigned long flags; |
| 763 | struct qca_data *qca = hu->priv; |
| 764 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 765 | BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 766 | |
| 767 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); |
| 768 | |
| 769 | qca->ibs_recv_slps++; |
| 770 | |
| 771 | switch (qca->rx_ibs_state) { |
| 772 | case HCI_IBS_RX_AWAKE: |
| 773 | /* Update state */ |
| 774 | qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; |
| 775 | /* Vote off rx clock under workqueue */ |
| 776 | queue_work(qca->workqueue, &qca->ws_rx_vote_off); |
| 777 | break; |
| 778 | |
| 779 | case HCI_IBS_RX_ASLEEP: |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 780 | break; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 781 | |
| 782 | default: |
| 783 | /* Any other state is illegal */ |
| 784 | BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d", |
| 785 | qca->rx_ibs_state); |
| 786 | break; |
| 787 | } |
| 788 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 789 | wake_up_interruptible(&qca->suspend_wait_q); |
| 790 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 791 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
| 792 | } |
| 793 | |
| 794 | /* Called upon wake-up-acknowledgement from the device |
| 795 | */ |
| 796 | static void device_woke_up(struct hci_uart *hu) |
| 797 | { |
| 798 | unsigned long flags, idle_delay; |
| 799 | struct qca_data *qca = hu->priv; |
| 800 | struct sk_buff *skb = NULL; |
| 801 | |
| 802 | BT_DBG("hu %p woke up", hu); |
| 803 | |
| 804 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); |
| 805 | |
| 806 | qca->ibs_recv_wacks++; |
| 807 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 808 | /* Don't react to the wake-up-acknowledgment when suspending. */ |
| 809 | if (test_bit(QCA_SUSPENDING, &qca->flags)) { |
| 810 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
| 811 | return; |
| 812 | } |
| 813 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 814 | switch (qca->tx_ibs_state) { |
| 815 | case HCI_IBS_TX_AWAKE: |
| 816 | /* Expect one if we send 2 WAKEs */ |
| 817 | BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d", |
| 818 | qca->tx_ibs_state); |
| 819 | break; |
| 820 | |
| 821 | case HCI_IBS_TX_WAKING: |
| 822 | /* Send pending packets */ |
| 823 | while ((skb = skb_dequeue(&qca->tx_wait_q))) |
| 824 | skb_queue_tail(&qca->txq, skb); |
| 825 | |
| 826 | /* Switch timers and change state to HCI_IBS_TX_AWAKE */ |
| 827 | del_timer(&qca->wake_retrans_timer); |
| 828 | idle_delay = msecs_to_jiffies(qca->tx_idle_delay); |
| 829 | mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); |
| 830 | qca->tx_ibs_state = HCI_IBS_TX_AWAKE; |
| 831 | break; |
| 832 | |
| 833 | case HCI_IBS_TX_ASLEEP: |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 834 | default: |
| 835 | BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d", |
| 836 | qca->tx_ibs_state); |
| 837 | break; |
| 838 | } |
| 839 | |
| 840 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
| 841 | |
| 842 | /* Actually send the packets */ |
| 843 | hci_uart_tx_wakeup(hu); |
| 844 | } |
| 845 | |
| 846 | /* Enqueue frame for transmittion (padding, crc, etc) may be called from |
| 847 | * two simultaneous tasklets. |
| 848 | */ |
| 849 | static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb) |
| 850 | { |
| 851 | unsigned long flags = 0, idle_delay; |
| 852 | struct qca_data *qca = hu->priv; |
| 853 | |
| 854 | BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb, |
| 855 | qca->tx_ibs_state); |
| 856 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 857 | if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) { |
| 858 | /* As SSR is in progress, ignore the packets */ |
| 859 | bt_dev_dbg(hu->hdev, "SSR is in progress"); |
| 860 | kfree_skb(skb); |
| 861 | return 0; |
| 862 | } |
| 863 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 864 | /* Prepend skb with frame type */ |
| 865 | memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1); |
| 866 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 867 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); |
| 868 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 869 | /* Don't go to sleep in middle of patch download or |
| 870 | * Out-Of-Band(GPIOs control) sleep is selected. |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 871 | * Don't wake the device up when suspending. |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 872 | */ |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 873 | if (!test_bit(QCA_IBS_ENABLED, &qca->flags) || |
| 874 | test_bit(QCA_SUSPENDING, &qca->flags)) { |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 875 | skb_queue_tail(&qca->txq, skb); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 876 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 877 | return 0; |
| 878 | } |
| 879 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 880 | /* Act according to current state */ |
| 881 | switch (qca->tx_ibs_state) { |
| 882 | case HCI_IBS_TX_AWAKE: |
| 883 | BT_DBG("Device awake, sending normally"); |
| 884 | skb_queue_tail(&qca->txq, skb); |
| 885 | idle_delay = msecs_to_jiffies(qca->tx_idle_delay); |
| 886 | mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); |
| 887 | break; |
| 888 | |
| 889 | case HCI_IBS_TX_ASLEEP: |
| 890 | BT_DBG("Device asleep, waking up and queueing packet"); |
| 891 | /* Save packet for later */ |
| 892 | skb_queue_tail(&qca->tx_wait_q, skb); |
| 893 | |
| 894 | qca->tx_ibs_state = HCI_IBS_TX_WAKING; |
| 895 | /* Schedule a work queue to wake up device */ |
| 896 | queue_work(qca->workqueue, &qca->ws_awake_device); |
| 897 | break; |
| 898 | |
| 899 | case HCI_IBS_TX_WAKING: |
| 900 | BT_DBG("Device waking up, queueing packet"); |
| 901 | /* Transient state; just keep packet for later */ |
| 902 | skb_queue_tail(&qca->tx_wait_q, skb); |
| 903 | break; |
| 904 | |
| 905 | default: |
| 906 | BT_ERR("Illegal tx state: %d (losing packet)", |
| 907 | qca->tx_ibs_state); |
| 908 | kfree_skb(skb); |
| 909 | break; |
| 910 | } |
| 911 | |
| 912 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
| 913 | |
| 914 | return 0; |
| 915 | } |
| 916 | |
| 917 | static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb) |
| 918 | { |
| 919 | struct hci_uart *hu = hci_get_drvdata(hdev); |
| 920 | |
| 921 | BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND); |
| 922 | |
| 923 | device_want_to_sleep(hu); |
| 924 | |
| 925 | kfree_skb(skb); |
| 926 | return 0; |
| 927 | } |
| 928 | |
| 929 | static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb) |
| 930 | { |
| 931 | struct hci_uart *hu = hci_get_drvdata(hdev); |
| 932 | |
| 933 | BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND); |
| 934 | |
| 935 | device_want_to_wakeup(hu); |
| 936 | |
| 937 | kfree_skb(skb); |
| 938 | return 0; |
| 939 | } |
| 940 | |
| 941 | static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb) |
| 942 | { |
| 943 | struct hci_uart *hu = hci_get_drvdata(hdev); |
| 944 | |
| 945 | BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK); |
| 946 | |
| 947 | device_woke_up(hu); |
| 948 | |
| 949 | kfree_skb(skb); |
| 950 | return 0; |
| 951 | } |
| 952 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 953 | static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb) |
| 954 | { |
| 955 | /* We receive debug logs from chip as an ACL packets. |
| 956 | * Instead of sending the data to ACL to decode the |
| 957 | * received data, we are pushing them to the above layers |
| 958 | * as a diagnostic packet. |
| 959 | */ |
| 960 | if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE) |
| 961 | return hci_recv_diag(hdev, skb); |
| 962 | |
| 963 | return hci_recv_frame(hdev, skb); |
| 964 | } |
| 965 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 966 | static void qca_controller_memdump(struct work_struct *work) |
| 967 | { |
| 968 | struct qca_data *qca = container_of(work, struct qca_data, |
| 969 | ctrl_memdump_evt); |
| 970 | struct hci_uart *hu = qca->hu; |
| 971 | struct sk_buff *skb; |
| 972 | struct qca_memdump_event_hdr *cmd_hdr; |
| 973 | struct qca_memdump_data *qca_memdump = qca->qca_memdump; |
| 974 | struct qca_dump_size *dump; |
| 975 | char *memdump_buf; |
| 976 | char nullBuff[QCA_DUMP_PACKET_SIZE] = { 0 }; |
| 977 | u16 seq_no; |
| 978 | u32 dump_size; |
| 979 | u32 rx_size; |
| 980 | enum qca_btsoc_type soc_type = qca_soc_type(hu); |
| 981 | |
| 982 | while ((skb = skb_dequeue(&qca->rx_memdump_q))) { |
| 983 | |
| 984 | mutex_lock(&qca->hci_memdump_lock); |
| 985 | /* Skip processing the received packets if timeout detected |
| 986 | * or memdump collection completed. |
| 987 | */ |
| 988 | if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT || |
| 989 | qca->memdump_state == QCA_MEMDUMP_COLLECTED) { |
| 990 | mutex_unlock(&qca->hci_memdump_lock); |
| 991 | return; |
| 992 | } |
| 993 | |
| 994 | if (!qca_memdump) { |
| 995 | qca_memdump = kzalloc(sizeof(struct qca_memdump_data), |
| 996 | GFP_ATOMIC); |
| 997 | if (!qca_memdump) { |
| 998 | mutex_unlock(&qca->hci_memdump_lock); |
| 999 | return; |
| 1000 | } |
| 1001 | |
| 1002 | qca->qca_memdump = qca_memdump; |
| 1003 | } |
| 1004 | |
| 1005 | qca->memdump_state = QCA_MEMDUMP_COLLECTING; |
| 1006 | cmd_hdr = (void *) skb->data; |
| 1007 | seq_no = __le16_to_cpu(cmd_hdr->seq_no); |
| 1008 | skb_pull(skb, sizeof(struct qca_memdump_event_hdr)); |
| 1009 | |
| 1010 | if (!seq_no) { |
| 1011 | |
| 1012 | /* This is the first frame of memdump packet from |
| 1013 | * the controller, Disable IBS to recevie dump |
| 1014 | * with out any interruption, ideally time required for |
| 1015 | * the controller to send the dump is 8 seconds. let us |
| 1016 | * start timer to handle this asynchronous activity. |
| 1017 | */ |
| 1018 | clear_bit(QCA_IBS_ENABLED, &qca->flags); |
| 1019 | set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); |
| 1020 | dump = (void *) skb->data; |
| 1021 | dump_size = __le32_to_cpu(dump->dump_size); |
| 1022 | if (!(dump_size)) { |
| 1023 | bt_dev_err(hu->hdev, "Rx invalid memdump size"); |
| 1024 | kfree(qca_memdump); |
| 1025 | kfree_skb(skb); |
| 1026 | qca->qca_memdump = NULL; |
| 1027 | mutex_unlock(&qca->hci_memdump_lock); |
| 1028 | return; |
| 1029 | } |
| 1030 | |
| 1031 | bt_dev_info(hu->hdev, "QCA collecting dump of size:%u", |
| 1032 | dump_size); |
| 1033 | queue_delayed_work(qca->workqueue, |
| 1034 | &qca->ctrl_memdump_timeout, |
| 1035 | msecs_to_jiffies(MEMDUMP_TIMEOUT_MS) |
| 1036 | ); |
| 1037 | |
| 1038 | skb_pull(skb, sizeof(dump_size)); |
| 1039 | memdump_buf = vmalloc(dump_size); |
| 1040 | qca_memdump->ram_dump_size = dump_size; |
| 1041 | qca_memdump->memdump_buf_head = memdump_buf; |
| 1042 | qca_memdump->memdump_buf_tail = memdump_buf; |
| 1043 | } |
| 1044 | |
| 1045 | memdump_buf = qca_memdump->memdump_buf_tail; |
| 1046 | |
| 1047 | /* If sequence no 0 is missed then there is no point in |
| 1048 | * accepting the other sequences. |
| 1049 | */ |
| 1050 | if (!memdump_buf) { |
| 1051 | bt_dev_err(hu->hdev, "QCA: Discarding other packets"); |
| 1052 | kfree(qca_memdump); |
| 1053 | kfree_skb(skb); |
| 1054 | qca->qca_memdump = NULL; |
| 1055 | mutex_unlock(&qca->hci_memdump_lock); |
| 1056 | return; |
| 1057 | } |
| 1058 | |
| 1059 | /* There could be chance of missing some packets from |
| 1060 | * the controller. In such cases let us store the dummy |
| 1061 | * packets in the buffer. |
| 1062 | */ |
| 1063 | /* For QCA6390, controller does not lost packets but |
| 1064 | * sequence number field of packat sometimes has error |
| 1065 | * bits, so skip this checking for missing packet. |
| 1066 | */ |
| 1067 | while ((seq_no > qca_memdump->current_seq_no + 1) && |
| 1068 | (soc_type != QCA_QCA6390) && |
| 1069 | seq_no != QCA_LAST_SEQUENCE_NUM) { |
| 1070 | bt_dev_err(hu->hdev, "QCA controller missed packet:%d", |
| 1071 | qca_memdump->current_seq_no); |
| 1072 | rx_size = qca_memdump->received_dump; |
| 1073 | rx_size += QCA_DUMP_PACKET_SIZE; |
| 1074 | if (rx_size > qca_memdump->ram_dump_size) { |
| 1075 | bt_dev_err(hu->hdev, |
| 1076 | "QCA memdump received %d, no space for missed packet", |
| 1077 | qca_memdump->received_dump); |
| 1078 | break; |
| 1079 | } |
| 1080 | memcpy(memdump_buf, nullBuff, QCA_DUMP_PACKET_SIZE); |
| 1081 | memdump_buf = memdump_buf + QCA_DUMP_PACKET_SIZE; |
| 1082 | qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE; |
| 1083 | qca_memdump->current_seq_no++; |
| 1084 | } |
| 1085 | |
| 1086 | rx_size = qca_memdump->received_dump + skb->len; |
| 1087 | if (rx_size <= qca_memdump->ram_dump_size) { |
| 1088 | if ((seq_no != QCA_LAST_SEQUENCE_NUM) && |
| 1089 | (seq_no != qca_memdump->current_seq_no)) |
| 1090 | bt_dev_err(hu->hdev, |
| 1091 | "QCA memdump unexpected packet %d", |
| 1092 | seq_no); |
| 1093 | bt_dev_dbg(hu->hdev, |
| 1094 | "QCA memdump packet %d with length %d", |
| 1095 | seq_no, skb->len); |
| 1096 | memcpy(memdump_buf, (unsigned char *)skb->data, |
| 1097 | skb->len); |
| 1098 | memdump_buf = memdump_buf + skb->len; |
| 1099 | qca_memdump->memdump_buf_tail = memdump_buf; |
| 1100 | qca_memdump->current_seq_no = seq_no + 1; |
| 1101 | qca_memdump->received_dump += skb->len; |
| 1102 | } else { |
| 1103 | bt_dev_err(hu->hdev, |
| 1104 | "QCA memdump received %d, no space for packet %d", |
| 1105 | qca_memdump->received_dump, seq_no); |
| 1106 | } |
| 1107 | qca->qca_memdump = qca_memdump; |
| 1108 | kfree_skb(skb); |
| 1109 | if (seq_no == QCA_LAST_SEQUENCE_NUM) { |
| 1110 | bt_dev_info(hu->hdev, |
| 1111 | "QCA memdump Done, received %d, total %d", |
| 1112 | qca_memdump->received_dump, |
| 1113 | qca_memdump->ram_dump_size); |
| 1114 | memdump_buf = qca_memdump->memdump_buf_head; |
| 1115 | dev_coredumpv(&hu->serdev->dev, memdump_buf, |
| 1116 | qca_memdump->received_dump, GFP_KERNEL); |
| 1117 | cancel_delayed_work(&qca->ctrl_memdump_timeout); |
| 1118 | kfree(qca->qca_memdump); |
| 1119 | qca->qca_memdump = NULL; |
| 1120 | qca->memdump_state = QCA_MEMDUMP_COLLECTED; |
| 1121 | clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); |
| 1122 | } |
| 1123 | |
| 1124 | mutex_unlock(&qca->hci_memdump_lock); |
| 1125 | } |
| 1126 | |
| 1127 | } |
| 1128 | |
| 1129 | static int qca_controller_memdump_event(struct hci_dev *hdev, |
| 1130 | struct sk_buff *skb) |
| 1131 | { |
| 1132 | struct hci_uart *hu = hci_get_drvdata(hdev); |
| 1133 | struct qca_data *qca = hu->priv; |
| 1134 | |
| 1135 | set_bit(QCA_SSR_TRIGGERED, &qca->flags); |
| 1136 | skb_queue_tail(&qca->rx_memdump_q, skb); |
| 1137 | queue_work(qca->workqueue, &qca->ctrl_memdump_evt); |
| 1138 | |
| 1139 | return 0; |
| 1140 | } |
| 1141 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1142 | static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb) |
| 1143 | { |
| 1144 | struct hci_uart *hu = hci_get_drvdata(hdev); |
| 1145 | struct qca_data *qca = hu->priv; |
| 1146 | |
| 1147 | if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) { |
| 1148 | struct hci_event_hdr *hdr = (void *)skb->data; |
| 1149 | |
| 1150 | /* For the WCN3990 the vendor command for a baudrate change |
| 1151 | * isn't sent as synchronous HCI command, because the |
| 1152 | * controller sends the corresponding vendor event with the |
| 1153 | * new baudrate. The event is received and properly decoded |
| 1154 | * after changing the baudrate of the host port. It needs to |
| 1155 | * be dropped, otherwise it can be misinterpreted as |
| 1156 | * response to a later firmware download command (also a |
| 1157 | * vendor command). |
| 1158 | */ |
| 1159 | |
| 1160 | if (hdr->evt == HCI_EV_VENDOR) |
| 1161 | complete(&qca->drop_ev_comp); |
| 1162 | |
| 1163 | kfree_skb(skb); |
| 1164 | |
| 1165 | return 0; |
| 1166 | } |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1167 | /* We receive chip memory dump as an event packet, With a dedicated |
| 1168 | * handler followed by a hardware error event. When this event is |
| 1169 | * received we store dump into a file before closing hci. This |
| 1170 | * dump will help in triaging the issues. |
| 1171 | */ |
| 1172 | if ((skb->data[0] == HCI_VENDOR_PKT) && |
| 1173 | (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE)) |
| 1174 | return qca_controller_memdump_event(hdev, skb); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1175 | |
| 1176 | return hci_recv_frame(hdev, skb); |
| 1177 | } |
| 1178 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1179 | #define QCA_IBS_SLEEP_IND_EVENT \ |
| 1180 | .type = HCI_IBS_SLEEP_IND, \ |
| 1181 | .hlen = 0, \ |
| 1182 | .loff = 0, \ |
| 1183 | .lsize = 0, \ |
| 1184 | .maxlen = HCI_MAX_IBS_SIZE |
| 1185 | |
| 1186 | #define QCA_IBS_WAKE_IND_EVENT \ |
| 1187 | .type = HCI_IBS_WAKE_IND, \ |
| 1188 | .hlen = 0, \ |
| 1189 | .loff = 0, \ |
| 1190 | .lsize = 0, \ |
| 1191 | .maxlen = HCI_MAX_IBS_SIZE |
| 1192 | |
| 1193 | #define QCA_IBS_WAKE_ACK_EVENT \ |
| 1194 | .type = HCI_IBS_WAKE_ACK, \ |
| 1195 | .hlen = 0, \ |
| 1196 | .loff = 0, \ |
| 1197 | .lsize = 0, \ |
| 1198 | .maxlen = HCI_MAX_IBS_SIZE |
| 1199 | |
| 1200 | static const struct h4_recv_pkt qca_recv_pkts[] = { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1201 | { H4_RECV_ACL, .recv = qca_recv_acl_data }, |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1202 | { H4_RECV_SCO, .recv = hci_recv_frame }, |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1203 | { H4_RECV_EVENT, .recv = qca_recv_event }, |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1204 | { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind }, |
| 1205 | { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack }, |
| 1206 | { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind }, |
| 1207 | }; |
| 1208 | |
| 1209 | static int qca_recv(struct hci_uart *hu, const void *data, int count) |
| 1210 | { |
| 1211 | struct qca_data *qca = hu->priv; |
| 1212 | |
| 1213 | if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) |
| 1214 | return -EUNATCH; |
| 1215 | |
| 1216 | qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count, |
| 1217 | qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts)); |
| 1218 | if (IS_ERR(qca->rx_skb)) { |
| 1219 | int err = PTR_ERR(qca->rx_skb); |
| 1220 | bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err); |
| 1221 | qca->rx_skb = NULL; |
| 1222 | return err; |
| 1223 | } |
| 1224 | |
| 1225 | return count; |
| 1226 | } |
| 1227 | |
| 1228 | static struct sk_buff *qca_dequeue(struct hci_uart *hu) |
| 1229 | { |
| 1230 | struct qca_data *qca = hu->priv; |
| 1231 | |
| 1232 | return skb_dequeue(&qca->txq); |
| 1233 | } |
| 1234 | |
| 1235 | static uint8_t qca_get_baudrate_value(int speed) |
| 1236 | { |
| 1237 | switch (speed) { |
| 1238 | case 9600: |
| 1239 | return QCA_BAUDRATE_9600; |
| 1240 | case 19200: |
| 1241 | return QCA_BAUDRATE_19200; |
| 1242 | case 38400: |
| 1243 | return QCA_BAUDRATE_38400; |
| 1244 | case 57600: |
| 1245 | return QCA_BAUDRATE_57600; |
| 1246 | case 115200: |
| 1247 | return QCA_BAUDRATE_115200; |
| 1248 | case 230400: |
| 1249 | return QCA_BAUDRATE_230400; |
| 1250 | case 460800: |
| 1251 | return QCA_BAUDRATE_460800; |
| 1252 | case 500000: |
| 1253 | return QCA_BAUDRATE_500000; |
| 1254 | case 921600: |
| 1255 | return QCA_BAUDRATE_921600; |
| 1256 | case 1000000: |
| 1257 | return QCA_BAUDRATE_1000000; |
| 1258 | case 2000000: |
| 1259 | return QCA_BAUDRATE_2000000; |
| 1260 | case 3000000: |
| 1261 | return QCA_BAUDRATE_3000000; |
| 1262 | case 3200000: |
| 1263 | return QCA_BAUDRATE_3200000; |
| 1264 | case 3500000: |
| 1265 | return QCA_BAUDRATE_3500000; |
| 1266 | default: |
| 1267 | return QCA_BAUDRATE_115200; |
| 1268 | } |
| 1269 | } |
| 1270 | |
| 1271 | static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate) |
| 1272 | { |
| 1273 | struct hci_uart *hu = hci_get_drvdata(hdev); |
| 1274 | struct qca_data *qca = hu->priv; |
| 1275 | struct sk_buff *skb; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1276 | u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 }; |
| 1277 | |
| 1278 | if (baudrate > QCA_BAUDRATE_3200000) |
| 1279 | return -EINVAL; |
| 1280 | |
| 1281 | cmd[4] = baudrate; |
| 1282 | |
| 1283 | skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL); |
| 1284 | if (!skb) { |
| 1285 | bt_dev_err(hdev, "Failed to allocate baudrate packet"); |
| 1286 | return -ENOMEM; |
| 1287 | } |
| 1288 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1289 | /* Assign commands to change baudrate and packet type. */ |
| 1290 | skb_put_data(skb, cmd, sizeof(cmd)); |
| 1291 | hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; |
| 1292 | |
| 1293 | skb_queue_tail(&qca->txq, skb); |
| 1294 | hci_uart_tx_wakeup(hu); |
| 1295 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1296 | /* Wait for the baudrate change request to be sent */ |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1297 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1298 | while (!skb_queue_empty(&qca->txq)) |
| 1299 | usleep_range(100, 200); |
| 1300 | |
| 1301 | if (hu->serdev) |
| 1302 | serdev_device_wait_until_sent(hu->serdev, |
| 1303 | msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); |
| 1304 | |
| 1305 | /* Give the controller time to process the request */ |
| 1306 | if (qca_is_wcn399x(qca_soc_type(hu))) |
| 1307 | msleep(10); |
| 1308 | else |
| 1309 | msleep(300); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1310 | |
| 1311 | return 0; |
| 1312 | } |
| 1313 | |
| 1314 | static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed) |
| 1315 | { |
| 1316 | if (hu->serdev) |
| 1317 | serdev_device_set_baudrate(hu->serdev, speed); |
| 1318 | else |
| 1319 | hci_uart_set_baudrate(hu, speed); |
| 1320 | } |
| 1321 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1322 | static int qca_send_power_pulse(struct hci_uart *hu, bool on) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1323 | { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1324 | int ret; |
| 1325 | int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS); |
| 1326 | u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1327 | |
| 1328 | /* These power pulses are single byte command which are sent |
| 1329 | * at required baudrate to wcn3990. On wcn3990, we have an external |
| 1330 | * circuit at Tx pin which decodes the pulse sent at specific baudrate. |
| 1331 | * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT |
| 1332 | * and also we use the same power inputs to turn on and off for |
| 1333 | * Wi-Fi/BT. Powering up the power sources will not enable BT, until |
| 1334 | * we send a power on pulse at 115200 bps. This algorithm will help to |
| 1335 | * save power. Disabling hardware flow control is mandatory while |
| 1336 | * sending power pulses to SoC. |
| 1337 | */ |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1338 | bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1339 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1340 | serdev_device_write_flush(hu->serdev); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1341 | hci_uart_set_flow_control(hu, true); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1342 | ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); |
| 1343 | if (ret < 0) { |
| 1344 | bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd); |
| 1345 | return ret; |
| 1346 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1347 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1348 | serdev_device_wait_until_sent(hu->serdev, timeout); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1349 | hci_uart_set_flow_control(hu, false); |
| 1350 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1351 | /* Give to controller time to boot/shutdown */ |
| 1352 | if (on) |
| 1353 | msleep(100); |
| 1354 | else |
| 1355 | msleep(10); |
| 1356 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1357 | return 0; |
| 1358 | } |
| 1359 | |
| 1360 | static unsigned int qca_get_speed(struct hci_uart *hu, |
| 1361 | enum qca_speed_type speed_type) |
| 1362 | { |
| 1363 | unsigned int speed = 0; |
| 1364 | |
| 1365 | if (speed_type == QCA_INIT_SPEED) { |
| 1366 | if (hu->init_speed) |
| 1367 | speed = hu->init_speed; |
| 1368 | else if (hu->proto->init_speed) |
| 1369 | speed = hu->proto->init_speed; |
| 1370 | } else { |
| 1371 | if (hu->oper_speed) |
| 1372 | speed = hu->oper_speed; |
| 1373 | else if (hu->proto->oper_speed) |
| 1374 | speed = hu->proto->oper_speed; |
| 1375 | } |
| 1376 | |
| 1377 | return speed; |
| 1378 | } |
| 1379 | |
| 1380 | static int qca_check_speeds(struct hci_uart *hu) |
| 1381 | { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1382 | if (qca_is_wcn399x(qca_soc_type(hu))) { |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1383 | if (!qca_get_speed(hu, QCA_INIT_SPEED) && |
| 1384 | !qca_get_speed(hu, QCA_OPER_SPEED)) |
| 1385 | return -EINVAL; |
| 1386 | } else { |
| 1387 | if (!qca_get_speed(hu, QCA_INIT_SPEED) || |
| 1388 | !qca_get_speed(hu, QCA_OPER_SPEED)) |
| 1389 | return -EINVAL; |
| 1390 | } |
| 1391 | |
| 1392 | return 0; |
| 1393 | } |
| 1394 | |
| 1395 | static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type) |
| 1396 | { |
| 1397 | unsigned int speed, qca_baudrate; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1398 | struct qca_data *qca = hu->priv; |
| 1399 | int ret = 0; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1400 | |
| 1401 | if (speed_type == QCA_INIT_SPEED) { |
| 1402 | speed = qca_get_speed(hu, QCA_INIT_SPEED); |
| 1403 | if (speed) |
| 1404 | host_set_baudrate(hu, speed); |
| 1405 | } else { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1406 | enum qca_btsoc_type soc_type = qca_soc_type(hu); |
| 1407 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1408 | speed = qca_get_speed(hu, QCA_OPER_SPEED); |
| 1409 | if (!speed) |
| 1410 | return 0; |
| 1411 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1412 | /* Disable flow control for wcn3990 to deassert RTS while |
| 1413 | * changing the baudrate of chip and host. |
| 1414 | */ |
| 1415 | if (qca_is_wcn399x(soc_type)) |
| 1416 | hci_uart_set_flow_control(hu, true); |
| 1417 | |
| 1418 | if (soc_type == QCA_WCN3990) { |
| 1419 | reinit_completion(&qca->drop_ev_comp); |
| 1420 | set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); |
| 1421 | } |
| 1422 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1423 | qca_baudrate = qca_get_baudrate_value(speed); |
| 1424 | bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed); |
| 1425 | ret = qca_set_baudrate(hu->hdev, qca_baudrate); |
| 1426 | if (ret) |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1427 | goto error; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1428 | |
| 1429 | host_set_baudrate(hu, speed); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1430 | |
| 1431 | error: |
| 1432 | if (qca_is_wcn399x(soc_type)) |
| 1433 | hci_uart_set_flow_control(hu, false); |
| 1434 | |
| 1435 | if (soc_type == QCA_WCN3990) { |
| 1436 | /* Wait for the controller to send the vendor event |
| 1437 | * for the baudrate change command. |
| 1438 | */ |
| 1439 | if (!wait_for_completion_timeout(&qca->drop_ev_comp, |
| 1440 | msecs_to_jiffies(100))) { |
| 1441 | bt_dev_err(hu->hdev, |
| 1442 | "Failed to change controller baudrate\n"); |
| 1443 | ret = -ETIMEDOUT; |
| 1444 | } |
| 1445 | |
| 1446 | clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); |
| 1447 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1448 | } |
| 1449 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1450 | return ret; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1451 | } |
| 1452 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1453 | static int qca_send_crashbuffer(struct hci_uart *hu) |
| 1454 | { |
| 1455 | struct qca_data *qca = hu->priv; |
| 1456 | struct sk_buff *skb; |
| 1457 | |
| 1458 | skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL); |
| 1459 | if (!skb) { |
| 1460 | bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet"); |
| 1461 | return -ENOMEM; |
| 1462 | } |
| 1463 | |
| 1464 | /* We forcefully crash the controller, by sending 0xfb byte for |
| 1465 | * 1024 times. We also might have chance of losing data, To be |
| 1466 | * on safer side we send 1096 bytes to the SoC. |
| 1467 | */ |
| 1468 | memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE, |
| 1469 | QCA_CRASHBYTE_PACKET_LEN); |
| 1470 | hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; |
| 1471 | bt_dev_info(hu->hdev, "crash the soc to collect controller dump"); |
| 1472 | skb_queue_tail(&qca->txq, skb); |
| 1473 | hci_uart_tx_wakeup(hu); |
| 1474 | |
| 1475 | return 0; |
| 1476 | } |
| 1477 | |
| 1478 | static void qca_wait_for_dump_collection(struct hci_dev *hdev) |
| 1479 | { |
| 1480 | struct hci_uart *hu = hci_get_drvdata(hdev); |
| 1481 | struct qca_data *qca = hu->priv; |
| 1482 | |
| 1483 | wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION, |
| 1484 | TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT_MS); |
| 1485 | |
| 1486 | clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); |
| 1487 | } |
| 1488 | |
| 1489 | static void qca_hw_error(struct hci_dev *hdev, u8 code) |
| 1490 | { |
| 1491 | struct hci_uart *hu = hci_get_drvdata(hdev); |
| 1492 | struct qca_data *qca = hu->priv; |
| 1493 | |
| 1494 | set_bit(QCA_SSR_TRIGGERED, &qca->flags); |
| 1495 | set_bit(QCA_HW_ERROR_EVENT, &qca->flags); |
| 1496 | bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state); |
| 1497 | |
| 1498 | if (qca->memdump_state == QCA_MEMDUMP_IDLE) { |
| 1499 | /* If hardware error event received for other than QCA |
| 1500 | * soc memory dump event, then we need to crash the SOC |
| 1501 | * and wait here for 8 seconds to get the dump packets. |
| 1502 | * This will block main thread to be on hold until we |
| 1503 | * collect dump. |
| 1504 | */ |
| 1505 | set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); |
| 1506 | qca_send_crashbuffer(hu); |
| 1507 | qca_wait_for_dump_collection(hdev); |
| 1508 | } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) { |
| 1509 | /* Let us wait here until memory dump collected or |
| 1510 | * memory dump timer expired. |
| 1511 | */ |
| 1512 | bt_dev_info(hdev, "waiting for dump to complete"); |
| 1513 | qca_wait_for_dump_collection(hdev); |
| 1514 | } |
| 1515 | |
| 1516 | mutex_lock(&qca->hci_memdump_lock); |
| 1517 | if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) { |
| 1518 | bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout"); |
| 1519 | if (qca->qca_memdump) { |
| 1520 | vfree(qca->qca_memdump->memdump_buf_head); |
| 1521 | kfree(qca->qca_memdump); |
| 1522 | qca->qca_memdump = NULL; |
| 1523 | } |
| 1524 | qca->memdump_state = QCA_MEMDUMP_TIMEOUT; |
| 1525 | cancel_delayed_work(&qca->ctrl_memdump_timeout); |
| 1526 | } |
| 1527 | mutex_unlock(&qca->hci_memdump_lock); |
| 1528 | |
| 1529 | if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT || |
| 1530 | qca->memdump_state == QCA_MEMDUMP_COLLECTED) { |
| 1531 | cancel_work_sync(&qca->ctrl_memdump_evt); |
| 1532 | skb_queue_purge(&qca->rx_memdump_q); |
| 1533 | } |
| 1534 | |
| 1535 | clear_bit(QCA_HW_ERROR_EVENT, &qca->flags); |
| 1536 | } |
| 1537 | |
| 1538 | static void qca_cmd_timeout(struct hci_dev *hdev) |
| 1539 | { |
| 1540 | struct hci_uart *hu = hci_get_drvdata(hdev); |
| 1541 | struct qca_data *qca = hu->priv; |
| 1542 | |
| 1543 | set_bit(QCA_SSR_TRIGGERED, &qca->flags); |
| 1544 | if (qca->memdump_state == QCA_MEMDUMP_IDLE) { |
| 1545 | set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); |
| 1546 | qca_send_crashbuffer(hu); |
| 1547 | qca_wait_for_dump_collection(hdev); |
| 1548 | } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) { |
| 1549 | /* Let us wait here until memory dump collected or |
| 1550 | * memory dump timer expired. |
| 1551 | */ |
| 1552 | bt_dev_info(hdev, "waiting for dump to complete"); |
| 1553 | qca_wait_for_dump_collection(hdev); |
| 1554 | } |
| 1555 | |
| 1556 | mutex_lock(&qca->hci_memdump_lock); |
| 1557 | if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) { |
| 1558 | qca->memdump_state = QCA_MEMDUMP_TIMEOUT; |
| 1559 | if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) { |
| 1560 | /* Inject hw error event to reset the device |
| 1561 | * and driver. |
| 1562 | */ |
| 1563 | hci_reset_dev(hu->hdev); |
| 1564 | } |
| 1565 | } |
| 1566 | mutex_unlock(&qca->hci_memdump_lock); |
| 1567 | } |
| 1568 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1569 | static int qca_wcn3990_init(struct hci_uart *hu) |
| 1570 | { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1571 | struct qca_serdev *qcadev; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1572 | int ret; |
| 1573 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1574 | /* Check for vregs status, may be hci down has turned |
| 1575 | * off the voltage regulator. |
| 1576 | */ |
| 1577 | qcadev = serdev_device_get_drvdata(hu->serdev); |
| 1578 | if (!qcadev->bt_power->vregs_on) { |
| 1579 | serdev_device_close(hu->serdev); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1580 | ret = qca_regulator_enable(qcadev); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1581 | if (ret) |
| 1582 | return ret; |
| 1583 | |
| 1584 | ret = serdev_device_open(hu->serdev); |
| 1585 | if (ret) { |
| 1586 | bt_dev_err(hu->hdev, "failed to open port"); |
| 1587 | return ret; |
| 1588 | } |
| 1589 | } |
| 1590 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1591 | /* Forcefully enable wcn3990 to enter in to boot mode. */ |
| 1592 | host_set_baudrate(hu, 2400); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1593 | ret = qca_send_power_pulse(hu, false); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1594 | if (ret) |
| 1595 | return ret; |
| 1596 | |
| 1597 | qca_set_speed(hu, QCA_INIT_SPEED); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1598 | ret = qca_send_power_pulse(hu, true); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1599 | if (ret) |
| 1600 | return ret; |
| 1601 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1602 | /* Now the device is in ready state to communicate with host. |
| 1603 | * To sync host with device we need to reopen port. |
| 1604 | * Without this, we will have RTS and CTS synchronization |
| 1605 | * issues. |
| 1606 | */ |
| 1607 | serdev_device_close(hu->serdev); |
| 1608 | ret = serdev_device_open(hu->serdev); |
| 1609 | if (ret) { |
| 1610 | bt_dev_err(hu->hdev, "failed to open port"); |
| 1611 | return ret; |
| 1612 | } |
| 1613 | |
| 1614 | hci_uart_set_flow_control(hu, false); |
| 1615 | |
| 1616 | return 0; |
| 1617 | } |
| 1618 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1619 | static int qca_power_on(struct hci_dev *hdev) |
| 1620 | { |
| 1621 | struct hci_uart *hu = hci_get_drvdata(hdev); |
| 1622 | enum qca_btsoc_type soc_type = qca_soc_type(hu); |
| 1623 | struct qca_serdev *qcadev; |
| 1624 | int ret = 0; |
| 1625 | |
| 1626 | /* Non-serdev device usually is powered by external power |
| 1627 | * and don't need additional action in driver for power on |
| 1628 | */ |
| 1629 | if (!hu->serdev) |
| 1630 | return 0; |
| 1631 | |
| 1632 | if (qca_is_wcn399x(soc_type)) { |
| 1633 | ret = qca_wcn3990_init(hu); |
| 1634 | } else { |
| 1635 | qcadev = serdev_device_get_drvdata(hu->serdev); |
| 1636 | if (qcadev->bt_en) { |
| 1637 | gpiod_set_value_cansleep(qcadev->bt_en, 1); |
| 1638 | /* Controller needs time to bootup. */ |
| 1639 | msleep(150); |
| 1640 | } |
| 1641 | } |
| 1642 | |
| 1643 | return ret; |
| 1644 | } |
| 1645 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1646 | static int qca_setup(struct hci_uart *hu) |
| 1647 | { |
| 1648 | struct hci_dev *hdev = hu->hdev; |
| 1649 | struct qca_data *qca = hu->priv; |
| 1650 | unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1651 | unsigned int retries = 0; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1652 | enum qca_btsoc_type soc_type = qca_soc_type(hu); |
| 1653 | const char *firmware_name = qca_get_firmware_name(hu); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1654 | int ret; |
| 1655 | int soc_ver = 0; |
| 1656 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1657 | ret = qca_check_speeds(hu); |
| 1658 | if (ret) |
| 1659 | return ret; |
| 1660 | |
| 1661 | /* Patch downloading has to be done without IBS mode */ |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1662 | clear_bit(QCA_IBS_ENABLED, &qca->flags); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1663 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1664 | /* Enable controller to do both LE scan and BR/EDR inquiry |
| 1665 | * simultaneously. |
| 1666 | */ |
| 1667 | set_bit(HCI_QUIRK_SIMULTANEOUS_DISCOVERY, &hdev->quirks); |
| 1668 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1669 | bt_dev_info(hdev, "setting up %s", |
| 1670 | qca_is_wcn399x(soc_type) ? "wcn399x" : "ROME/QCA6390"); |
| 1671 | |
| 1672 | qca->memdump_state = QCA_MEMDUMP_IDLE; |
| 1673 | |
| 1674 | retry: |
| 1675 | ret = qca_power_on(hdev); |
| 1676 | if (ret) |
| 1677 | return ret; |
| 1678 | |
| 1679 | clear_bit(QCA_SSR_TRIGGERED, &qca->flags); |
| 1680 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1681 | if (qca_is_wcn399x(soc_type)) { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1682 | set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1683 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1684 | ret = qca_read_soc_version(hdev, &soc_ver, soc_type); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1685 | if (ret) |
| 1686 | return ret; |
| 1687 | } else { |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1688 | qca_set_speed(hu, QCA_INIT_SPEED); |
| 1689 | } |
| 1690 | |
| 1691 | /* Setup user speed if needed */ |
| 1692 | speed = qca_get_speed(hu, QCA_OPER_SPEED); |
| 1693 | if (speed) { |
| 1694 | ret = qca_set_speed(hu, QCA_OPER_SPEED); |
| 1695 | if (ret) |
| 1696 | return ret; |
| 1697 | |
| 1698 | qca_baudrate = qca_get_baudrate_value(speed); |
| 1699 | } |
| 1700 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1701 | if (!qca_is_wcn399x(soc_type)) { |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1702 | /* Get QCA version information */ |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1703 | ret = qca_read_soc_version(hdev, &soc_ver, soc_type); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1704 | if (ret) |
| 1705 | return ret; |
| 1706 | } |
| 1707 | |
| 1708 | bt_dev_info(hdev, "QCA controller version 0x%08x", soc_ver); |
| 1709 | /* Setup patch / NVM configurations */ |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1710 | ret = qca_uart_setup(hdev, qca_baudrate, soc_type, soc_ver, |
| 1711 | firmware_name); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1712 | if (!ret) { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1713 | set_bit(QCA_IBS_ENABLED, &qca->flags); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1714 | qca_debugfs_init(hdev); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1715 | hu->hdev->hw_error = qca_hw_error; |
| 1716 | hu->hdev->cmd_timeout = qca_cmd_timeout; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1717 | } else if (ret == -ENOENT) { |
| 1718 | /* No patch/nvm-config found, run with original fw/config */ |
| 1719 | ret = 0; |
| 1720 | } else if (ret == -EAGAIN) { |
| 1721 | /* |
| 1722 | * Userspace firmware loader will return -EAGAIN in case no |
| 1723 | * patch/nvm-config is found, so run with original fw/config. |
| 1724 | */ |
| 1725 | ret = 0; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1726 | } else { |
| 1727 | if (retries < MAX_INIT_RETRIES) { |
| 1728 | qca_power_shutdown(hu); |
| 1729 | if (hu->serdev) { |
| 1730 | serdev_device_close(hu->serdev); |
| 1731 | ret = serdev_device_open(hu->serdev); |
| 1732 | if (ret) { |
| 1733 | bt_dev_err(hdev, "failed to open port"); |
| 1734 | return ret; |
| 1735 | } |
| 1736 | } |
| 1737 | retries++; |
| 1738 | goto retry; |
| 1739 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1740 | } |
| 1741 | |
| 1742 | /* Setup bdaddr */ |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1743 | if (soc_type == QCA_ROME) |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1744 | hu->hdev->set_bdaddr = qca_set_bdaddr_rome; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1745 | else |
| 1746 | hu->hdev->set_bdaddr = qca_set_bdaddr; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1747 | |
| 1748 | return ret; |
| 1749 | } |
| 1750 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1751 | static const struct hci_uart_proto qca_proto = { |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1752 | .id = HCI_UART_QCA, |
| 1753 | .name = "QCA", |
| 1754 | .manufacturer = 29, |
| 1755 | .init_speed = 115200, |
| 1756 | .oper_speed = 3000000, |
| 1757 | .open = qca_open, |
| 1758 | .close = qca_close, |
| 1759 | .flush = qca_flush, |
| 1760 | .setup = qca_setup, |
| 1761 | .recv = qca_recv, |
| 1762 | .enqueue = qca_enqueue, |
| 1763 | .dequeue = qca_dequeue, |
| 1764 | }; |
| 1765 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1766 | static const struct qca_device_data qca_soc_data_wcn3990 = { |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1767 | .soc_type = QCA_WCN3990, |
| 1768 | .vregs = (struct qca_vreg []) { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1769 | { "vddio", 15000 }, |
| 1770 | { "vddxo", 80000 }, |
| 1771 | { "vddrf", 300000 }, |
| 1772 | { "vddch0", 450000 }, |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1773 | }, |
| 1774 | .num_vregs = 4, |
| 1775 | }; |
| 1776 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1777 | static const struct qca_device_data qca_soc_data_wcn3991 = { |
| 1778 | .soc_type = QCA_WCN3991, |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1779 | .vregs = (struct qca_vreg []) { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1780 | { "vddio", 15000 }, |
| 1781 | { "vddxo", 80000 }, |
| 1782 | { "vddrf", 300000 }, |
| 1783 | { "vddch0", 450000 }, |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1784 | }, |
| 1785 | .num_vregs = 4, |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1786 | .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, |
| 1787 | }; |
| 1788 | |
| 1789 | static const struct qca_device_data qca_soc_data_wcn3998 = { |
| 1790 | .soc_type = QCA_WCN3998, |
| 1791 | .vregs = (struct qca_vreg []) { |
| 1792 | { "vddio", 10000 }, |
| 1793 | { "vddxo", 80000 }, |
| 1794 | { "vddrf", 300000 }, |
| 1795 | { "vddch0", 450000 }, |
| 1796 | }, |
| 1797 | .num_vregs = 4, |
| 1798 | }; |
| 1799 | |
| 1800 | static const struct qca_device_data qca_soc_data_qca6390 = { |
| 1801 | .soc_type = QCA_QCA6390, |
| 1802 | .num_vregs = 0, |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1803 | }; |
| 1804 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1805 | static void qca_power_shutdown(struct hci_uart *hu) |
| 1806 | { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1807 | struct qca_serdev *qcadev; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1808 | struct qca_data *qca = hu->priv; |
| 1809 | unsigned long flags; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1810 | enum qca_btsoc_type soc_type = qca_soc_type(hu); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1811 | |
| 1812 | /* From this point we go into power off state. But serial port is |
| 1813 | * still open, stop queueing the IBS data and flush all the buffered |
| 1814 | * data in skb's. |
| 1815 | */ |
| 1816 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); |
| 1817 | clear_bit(QCA_IBS_ENABLED, &qca->flags); |
| 1818 | qca_flush(hu); |
| 1819 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1820 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1821 | /* Non-serdev device usually is powered by external power |
| 1822 | * and don't need additional action in driver for power down |
| 1823 | */ |
| 1824 | if (!hu->serdev) |
| 1825 | return; |
| 1826 | |
| 1827 | qcadev = serdev_device_get_drvdata(hu->serdev); |
| 1828 | |
| 1829 | if (qca_is_wcn399x(soc_type)) { |
| 1830 | host_set_baudrate(hu, 2400); |
| 1831 | qca_send_power_pulse(hu, false); |
| 1832 | qca_regulator_disable(qcadev); |
| 1833 | } else if (qcadev->bt_en) { |
| 1834 | gpiod_set_value_cansleep(qcadev->bt_en, 0); |
| 1835 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1836 | } |
| 1837 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1838 | static int qca_power_off(struct hci_dev *hdev) |
| 1839 | { |
| 1840 | struct hci_uart *hu = hci_get_drvdata(hdev); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1841 | struct qca_data *qca = hu->priv; |
| 1842 | enum qca_btsoc_type soc_type = qca_soc_type(hu); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1843 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1844 | hu->hdev->hw_error = NULL; |
| 1845 | hu->hdev->cmd_timeout = NULL; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1846 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1847 | del_timer_sync(&qca->wake_retrans_timer); |
| 1848 | del_timer_sync(&qca->tx_idle_timer); |
| 1849 | |
| 1850 | /* Stop sending shutdown command if soc crashes. */ |
| 1851 | if (soc_type != QCA_ROME |
| 1852 | && qca->memdump_state == QCA_MEMDUMP_IDLE) { |
| 1853 | qca_send_pre_shutdown_cmd(hdev); |
| 1854 | usleep_range(8000, 10000); |
| 1855 | } |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1856 | |
| 1857 | qca_power_shutdown(hu); |
| 1858 | return 0; |
| 1859 | } |
| 1860 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1861 | static int qca_regulator_enable(struct qca_serdev *qcadev) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1862 | { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1863 | struct qca_power *power = qcadev->bt_power; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1864 | int ret; |
| 1865 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1866 | /* Already enabled */ |
| 1867 | if (power->vregs_on) |
| 1868 | return 0; |
| 1869 | |
| 1870 | BT_DBG("enabling %d regulators)", power->num_vregs); |
| 1871 | |
| 1872 | ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1873 | if (ret) |
| 1874 | return ret; |
| 1875 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1876 | power->vregs_on = true; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1877 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1878 | ret = clk_prepare_enable(qcadev->susclk); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1879 | if (ret) |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1880 | qca_regulator_disable(qcadev); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1881 | |
| 1882 | return ret; |
| 1883 | } |
| 1884 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1885 | static void qca_regulator_disable(struct qca_serdev *qcadev) |
| 1886 | { |
| 1887 | struct qca_power *power; |
| 1888 | |
| 1889 | if (!qcadev) |
| 1890 | return; |
| 1891 | |
| 1892 | power = qcadev->bt_power; |
| 1893 | |
| 1894 | /* Already disabled? */ |
| 1895 | if (!power->vregs_on) |
| 1896 | return; |
| 1897 | |
| 1898 | regulator_bulk_disable(power->num_vregs, power->vreg_bulk); |
| 1899 | power->vregs_on = false; |
| 1900 | |
| 1901 | clk_disable_unprepare(qcadev->susclk); |
| 1902 | } |
| 1903 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1904 | static int qca_init_regulators(struct qca_power *qca, |
| 1905 | const struct qca_vreg *vregs, size_t num_vregs) |
| 1906 | { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1907 | struct regulator_bulk_data *bulk; |
| 1908 | int ret; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1909 | int i; |
| 1910 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1911 | bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL); |
| 1912 | if (!bulk) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1913 | return -ENOMEM; |
| 1914 | |
| 1915 | for (i = 0; i < num_vregs; i++) |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1916 | bulk[i].supply = vregs[i].name; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1917 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1918 | ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk); |
| 1919 | if (ret < 0) |
| 1920 | return ret; |
| 1921 | |
| 1922 | for (i = 0; i < num_vregs; i++) { |
| 1923 | ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA); |
| 1924 | if (ret) |
| 1925 | return ret; |
| 1926 | } |
| 1927 | |
| 1928 | qca->vreg_bulk = bulk; |
| 1929 | qca->num_vregs = num_vregs; |
| 1930 | |
| 1931 | return 0; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1932 | } |
| 1933 | |
| 1934 | static int qca_serdev_probe(struct serdev_device *serdev) |
| 1935 | { |
| 1936 | struct qca_serdev *qcadev; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1937 | struct hci_dev *hdev; |
| 1938 | const struct qca_device_data *data; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1939 | int err; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1940 | bool power_ctrl_enabled = true; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1941 | |
| 1942 | qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL); |
| 1943 | if (!qcadev) |
| 1944 | return -ENOMEM; |
| 1945 | |
| 1946 | qcadev->serdev_hu.serdev = serdev; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1947 | data = device_get_match_data(&serdev->dev); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1948 | serdev_device_set_drvdata(serdev, qcadev); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1949 | device_property_read_string(&serdev->dev, "firmware-name", |
| 1950 | &qcadev->firmware_name); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1951 | device_property_read_u32(&serdev->dev, "max-speed", |
| 1952 | &qcadev->oper_speed); |
| 1953 | if (!qcadev->oper_speed) |
| 1954 | BT_DBG("UART will pick default operating speed"); |
| 1955 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1956 | if (data && qca_is_wcn399x(data->soc_type)) { |
| 1957 | qcadev->btsoc_type = data->soc_type; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1958 | qcadev->bt_power = devm_kzalloc(&serdev->dev, |
| 1959 | sizeof(struct qca_power), |
| 1960 | GFP_KERNEL); |
| 1961 | if (!qcadev->bt_power) |
| 1962 | return -ENOMEM; |
| 1963 | |
| 1964 | qcadev->bt_power->dev = &serdev->dev; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1965 | err = qca_init_regulators(qcadev->bt_power, data->vregs, |
| 1966 | data->num_vregs); |
| 1967 | if (err) { |
| 1968 | BT_ERR("Failed to init regulators:%d", err); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1969 | return err; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1970 | } |
| 1971 | |
| 1972 | qcadev->bt_power->vregs_on = false; |
| 1973 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1974 | qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1975 | if (IS_ERR(qcadev->susclk)) { |
| 1976 | dev_err(&serdev->dev, "failed to acquire clk\n"); |
| 1977 | return PTR_ERR(qcadev->susclk); |
| 1978 | } |
| 1979 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 1980 | err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); |
| 1981 | if (err) { |
| 1982 | BT_ERR("wcn3990 serdev registration failed"); |
| 1983 | return err; |
| 1984 | } |
| 1985 | } else { |
| 1986 | if (data) |
| 1987 | qcadev->btsoc_type = data->soc_type; |
| 1988 | else |
| 1989 | qcadev->btsoc_type = QCA_ROME; |
| 1990 | |
| 1991 | qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", |
| 1992 | GPIOD_OUT_LOW); |
| 1993 | if (IS_ERR_OR_NULL(qcadev->bt_en)) { |
| 1994 | dev_warn(&serdev->dev, "failed to acquire enable gpio\n"); |
| 1995 | power_ctrl_enabled = false; |
| 1996 | } |
| 1997 | |
| 1998 | qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL); |
| 1999 | if (IS_ERR(qcadev->susclk)) { |
| 2000 | dev_warn(&serdev->dev, "failed to acquire clk\n"); |
| 2001 | return PTR_ERR(qcadev->susclk); |
| 2002 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2003 | err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ); |
| 2004 | if (err) |
| 2005 | return err; |
| 2006 | |
| 2007 | err = clk_prepare_enable(qcadev->susclk); |
| 2008 | if (err) |
| 2009 | return err; |
| 2010 | |
| 2011 | err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2012 | if (err) { |
| 2013 | BT_ERR("Rome serdev registration failed"); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2014 | clk_disable_unprepare(qcadev->susclk); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2015 | return err; |
| 2016 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2017 | } |
| 2018 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2019 | hdev = qcadev->serdev_hu.hdev; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2020 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2021 | if (power_ctrl_enabled) { |
| 2022 | set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks); |
| 2023 | hdev->shutdown = qca_power_off; |
| 2024 | } |
| 2025 | |
| 2026 | if (data) { |
| 2027 | /* Wideband speech support must be set per driver since it can't |
| 2028 | * be queried via hci. Same with the valid le states quirk. |
| 2029 | */ |
| 2030 | if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH) |
| 2031 | set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED, |
| 2032 | &hdev->quirks); |
| 2033 | |
| 2034 | if (data->capabilities & QCA_CAP_VALID_LE_STATES) |
| 2035 | set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks); |
| 2036 | } |
| 2037 | |
| 2038 | return 0; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2039 | } |
| 2040 | |
| 2041 | static void qca_serdev_remove(struct serdev_device *serdev) |
| 2042 | { |
| 2043 | struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2044 | struct qca_power *power = qcadev->bt_power; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2045 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2046 | if (qca_is_wcn399x(qcadev->btsoc_type) && power->vregs_on) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2047 | qca_power_shutdown(&qcadev->serdev_hu); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2048 | else if (qcadev->susclk) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2049 | clk_disable_unprepare(qcadev->susclk); |
| 2050 | |
| 2051 | hci_uart_unregister_device(&qcadev->serdev_hu); |
| 2052 | } |
| 2053 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2054 | static void qca_serdev_shutdown(struct device *dev) |
| 2055 | { |
| 2056 | int ret; |
| 2057 | int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS); |
| 2058 | struct serdev_device *serdev = to_serdev_device(dev); |
| 2059 | struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); |
| 2060 | const u8 ibs_wake_cmd[] = { 0xFD }; |
| 2061 | const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 }; |
| 2062 | |
| 2063 | if (qcadev->btsoc_type == QCA_QCA6390) { |
| 2064 | serdev_device_write_flush(serdev); |
| 2065 | ret = serdev_device_write_buf(serdev, ibs_wake_cmd, |
| 2066 | sizeof(ibs_wake_cmd)); |
| 2067 | if (ret < 0) { |
| 2068 | BT_ERR("QCA send IBS_WAKE_IND error: %d", ret); |
| 2069 | return; |
| 2070 | } |
| 2071 | serdev_device_wait_until_sent(serdev, timeout); |
| 2072 | usleep_range(8000, 10000); |
| 2073 | |
| 2074 | serdev_device_write_flush(serdev); |
| 2075 | ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd, |
| 2076 | sizeof(edl_reset_soc_cmd)); |
| 2077 | if (ret < 0) { |
| 2078 | BT_ERR("QCA send EDL_RESET_REQ error: %d", ret); |
| 2079 | return; |
| 2080 | } |
| 2081 | serdev_device_wait_until_sent(serdev, timeout); |
| 2082 | usleep_range(8000, 10000); |
| 2083 | } |
| 2084 | } |
| 2085 | |
| 2086 | static int __maybe_unused qca_suspend(struct device *dev) |
| 2087 | { |
| 2088 | struct serdev_device *serdev = to_serdev_device(dev); |
| 2089 | struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); |
| 2090 | struct hci_uart *hu = &qcadev->serdev_hu; |
| 2091 | struct qca_data *qca = hu->priv; |
| 2092 | unsigned long flags; |
| 2093 | bool tx_pending = false; |
| 2094 | int ret = 0; |
| 2095 | u8 cmd; |
| 2096 | |
| 2097 | set_bit(QCA_SUSPENDING, &qca->flags); |
| 2098 | |
| 2099 | /* Device is downloading patch or doesn't support in-band sleep. */ |
| 2100 | if (!test_bit(QCA_IBS_ENABLED, &qca->flags)) |
| 2101 | return 0; |
| 2102 | |
| 2103 | cancel_work_sync(&qca->ws_awake_device); |
| 2104 | cancel_work_sync(&qca->ws_awake_rx); |
| 2105 | |
| 2106 | spin_lock_irqsave_nested(&qca->hci_ibs_lock, |
| 2107 | flags, SINGLE_DEPTH_NESTING); |
| 2108 | |
| 2109 | switch (qca->tx_ibs_state) { |
| 2110 | case HCI_IBS_TX_WAKING: |
| 2111 | del_timer(&qca->wake_retrans_timer); |
| 2112 | fallthrough; |
| 2113 | case HCI_IBS_TX_AWAKE: |
| 2114 | del_timer(&qca->tx_idle_timer); |
| 2115 | |
| 2116 | serdev_device_write_flush(hu->serdev); |
| 2117 | cmd = HCI_IBS_SLEEP_IND; |
| 2118 | ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); |
| 2119 | |
| 2120 | if (ret < 0) { |
| 2121 | BT_ERR("Failed to send SLEEP to device"); |
| 2122 | break; |
| 2123 | } |
| 2124 | |
| 2125 | qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; |
| 2126 | qca->ibs_sent_slps++; |
| 2127 | tx_pending = true; |
| 2128 | break; |
| 2129 | |
| 2130 | case HCI_IBS_TX_ASLEEP: |
| 2131 | break; |
| 2132 | |
| 2133 | default: |
| 2134 | BT_ERR("Spurious tx state %d", qca->tx_ibs_state); |
| 2135 | ret = -EINVAL; |
| 2136 | break; |
| 2137 | } |
| 2138 | |
| 2139 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
| 2140 | |
| 2141 | if (ret < 0) |
| 2142 | goto error; |
| 2143 | |
| 2144 | if (tx_pending) { |
| 2145 | serdev_device_wait_until_sent(hu->serdev, |
| 2146 | msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); |
| 2147 | serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); |
| 2148 | } |
| 2149 | |
| 2150 | /* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going |
| 2151 | * to sleep, so that the packet does not wake the system later. |
| 2152 | */ |
| 2153 | ret = wait_event_interruptible_timeout(qca->suspend_wait_q, |
| 2154 | qca->rx_ibs_state == HCI_IBS_RX_ASLEEP, |
| 2155 | msecs_to_jiffies(IBS_BTSOC_TX_IDLE_TIMEOUT_MS)); |
| 2156 | if (ret == 0) { |
| 2157 | ret = -ETIMEDOUT; |
| 2158 | goto error; |
| 2159 | } |
| 2160 | |
| 2161 | return 0; |
| 2162 | |
| 2163 | error: |
| 2164 | clear_bit(QCA_SUSPENDING, &qca->flags); |
| 2165 | |
| 2166 | return ret; |
| 2167 | } |
| 2168 | |
| 2169 | static int __maybe_unused qca_resume(struct device *dev) |
| 2170 | { |
| 2171 | struct serdev_device *serdev = to_serdev_device(dev); |
| 2172 | struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); |
| 2173 | struct hci_uart *hu = &qcadev->serdev_hu; |
| 2174 | struct qca_data *qca = hu->priv; |
| 2175 | |
| 2176 | clear_bit(QCA_SUSPENDING, &qca->flags); |
| 2177 | |
| 2178 | return 0; |
| 2179 | } |
| 2180 | |
| 2181 | static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume); |
| 2182 | |
| 2183 | #ifdef CONFIG_OF |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2184 | static const struct of_device_id qca_bluetooth_of_match[] = { |
| 2185 | { .compatible = "qcom,qca6174-bt" }, |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2186 | { .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390}, |
| 2187 | { .compatible = "qcom,qca9377-bt" }, |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2188 | { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990}, |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2189 | { .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991}, |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 2190 | { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998}, |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2191 | { /* sentinel */ } |
| 2192 | }; |
| 2193 | MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2194 | #endif |
| 2195 | |
| 2196 | #ifdef CONFIG_ACPI |
| 2197 | static const struct acpi_device_id qca_bluetooth_acpi_match[] = { |
| 2198 | { "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 }, |
| 2199 | { "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 }, |
| 2200 | { "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 }, |
| 2201 | { "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 }, |
| 2202 | { }, |
| 2203 | }; |
| 2204 | MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match); |
| 2205 | #endif |
| 2206 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2207 | |
| 2208 | static struct serdev_device_driver qca_serdev_driver = { |
| 2209 | .probe = qca_serdev_probe, |
| 2210 | .remove = qca_serdev_remove, |
| 2211 | .driver = { |
| 2212 | .name = "hci_uart_qca", |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 2213 | .of_match_table = of_match_ptr(qca_bluetooth_of_match), |
| 2214 | .acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match), |
| 2215 | .shutdown = qca_serdev_shutdown, |
| 2216 | .pm = &qca_pm_ops, |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2217 | }, |
| 2218 | }; |
| 2219 | |
| 2220 | int __init qca_init(void) |
| 2221 | { |
| 2222 | serdev_device_driver_register(&qca_serdev_driver); |
| 2223 | |
| 2224 | return hci_uart_register_proto(&qca_proto); |
| 2225 | } |
| 2226 | |
| 2227 | int __exit qca_deinit(void) |
| 2228 | { |
| 2229 | serdev_device_driver_unregister(&qca_serdev_driver); |
| 2230 | |
| 2231 | return hci_uart_unregister_proto(&qca_proto); |
| 2232 | } |