| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | /* |
| 2 | * include/asm-sh/dma.h |
| 3 | * |
| 4 | * Copyright (C) 2003, 2004 Paul Mundt |
| 5 | * |
| 6 | * This file is subject to the terms and conditions of the GNU General Public |
| 7 | * License. See the file "COPYING" in the main directory of this archive |
| 8 | * for more details. |
| 9 | */ |
| 10 | #ifndef __ASM_SH_DMA_H |
| 11 | #define __ASM_SH_DMA_H |
| 12 | #ifdef __KERNEL__ |
| 13 | |
| 14 | #include <linux/spinlock.h> |
| 15 | #include <linux/wait.h> |
| 16 | #include <linux/sched.h> |
| 17 | #include <linux/device.h> |
| 18 | #include <asm-generic/dma.h> |
| 19 | |
| 20 | /* |
| 21 | * Read and write modes can mean drastically different things depending on the |
| 22 | * channel configuration. Consult your DMAC documentation and module |
| 23 | * implementation for further clues. |
| 24 | */ |
| 25 | #define DMA_MODE_READ 0x00 |
| 26 | #define DMA_MODE_WRITE 0x01 |
| 27 | #define DMA_MODE_MASK 0x01 |
| 28 | |
| 29 | #define DMA_AUTOINIT 0x10 |
| 30 | |
| 31 | /* |
| 32 | * DMAC (dma_info) flags |
| 33 | */ |
| 34 | enum { |
| 35 | DMAC_CHANNELS_CONFIGURED = 0x01, |
| 36 | DMAC_CHANNELS_TEI_CAPABLE = 0x02, /* Transfer end interrupt */ |
| 37 | }; |
| 38 | |
| 39 | /* |
| 40 | * DMA channel capabilities / flags |
| 41 | */ |
| 42 | enum { |
| 43 | DMA_CONFIGURED = 0x01, |
| 44 | |
| 45 | /* |
| 46 | * Transfer end interrupt, inherited from DMAC. |
| 47 | * wait_queue used in dma_wait_for_completion. |
| 48 | */ |
| 49 | DMA_TEI_CAPABLE = 0x02, |
| 50 | }; |
| 51 | |
| 52 | extern spinlock_t dma_spin_lock; |
| 53 | |
| 54 | struct dma_channel; |
| 55 | |
| 56 | struct dma_ops { |
| 57 | int (*request)(struct dma_channel *chan); |
| 58 | void (*free)(struct dma_channel *chan); |
| 59 | |
| 60 | int (*get_residue)(struct dma_channel *chan); |
| 61 | int (*xfer)(struct dma_channel *chan); |
| 62 | int (*configure)(struct dma_channel *chan, unsigned long flags); |
| 63 | int (*extend)(struct dma_channel *chan, unsigned long op, void *param); |
| 64 | }; |
| 65 | |
| 66 | struct dma_channel { |
| 67 | char dev_id[16]; /* unique name per DMAC of channel */ |
| 68 | |
| 69 | unsigned int chan; /* DMAC channel number */ |
| 70 | unsigned int vchan; /* Virtual channel number */ |
| 71 | |
| 72 | unsigned int mode; |
| 73 | unsigned int count; |
| 74 | |
| 75 | unsigned long sar; |
| 76 | unsigned long dar; |
| 77 | |
| 78 | const char **caps; |
| 79 | |
| 80 | unsigned long flags; |
| 81 | atomic_t busy; |
| 82 | |
| 83 | wait_queue_head_t wait_queue; |
| 84 | |
| 85 | struct device dev; |
| 86 | void *priv_data; |
| 87 | }; |
| 88 | |
| 89 | struct dma_info { |
| 90 | struct platform_device *pdev; |
| 91 | |
| 92 | const char *name; |
| 93 | unsigned int nr_channels; |
| 94 | unsigned long flags; |
| 95 | |
| 96 | struct dma_ops *ops; |
| 97 | struct dma_channel *channels; |
| 98 | |
| 99 | struct list_head list; |
| 100 | int first_channel_nr; |
| 101 | int first_vchannel_nr; |
| 102 | }; |
| 103 | |
| 104 | struct dma_chan_caps { |
| 105 | int ch_num; |
| 106 | const char **caplist; |
| 107 | }; |
| 108 | |
| 109 | #define to_dma_channel(channel) container_of(channel, struct dma_channel, dev) |
| 110 | |
| 111 | /* arch/sh/drivers/dma/dma-api.c */ |
| 112 | extern int dma_xfer(unsigned int chan, unsigned long from, |
| 113 | unsigned long to, size_t size, unsigned int mode); |
| 114 | |
| 115 | #define dma_write(chan, from, to, size) \ |
| 116 | dma_xfer(chan, from, to, size, DMA_MODE_WRITE) |
| 117 | #define dma_write_page(chan, from, to) \ |
| 118 | dma_write(chan, from, to, PAGE_SIZE) |
| 119 | |
| 120 | #define dma_read(chan, from, to, size) \ |
| 121 | dma_xfer(chan, from, to, size, DMA_MODE_READ) |
| 122 | #define dma_read_page(chan, from, to) \ |
| 123 | dma_read(chan, from, to, PAGE_SIZE) |
| 124 | |
| 125 | extern int request_dma_bycap(const char **dmac, const char **caps, |
| 126 | const char *dev_id); |
| 127 | extern int get_dma_residue(unsigned int chan); |
| 128 | extern struct dma_info *get_dma_info(unsigned int chan); |
| 129 | extern struct dma_channel *get_dma_channel(unsigned int chan); |
| 130 | extern void dma_wait_for_completion(unsigned int chan); |
| 131 | extern void dma_configure_channel(unsigned int chan, unsigned long flags); |
| 132 | |
| 133 | extern int register_dmac(struct dma_info *info); |
| 134 | extern void unregister_dmac(struct dma_info *info); |
| 135 | extern struct dma_info *get_dma_info_by_name(const char *dmac_name); |
| 136 | |
| 137 | extern int dma_extend(unsigned int chan, unsigned long op, void *param); |
| 138 | extern int register_chan_caps(const char *dmac, struct dma_chan_caps *capslist); |
| 139 | |
| 140 | /* arch/sh/drivers/dma/dma-sysfs.c */ |
| 141 | extern int dma_create_sysfs_files(struct dma_channel *, struct dma_info *); |
| 142 | extern void dma_remove_sysfs_files(struct dma_channel *, struct dma_info *); |
| 143 | |
| 144 | #ifdef CONFIG_PCI |
| 145 | extern int isa_dma_bridge_buggy; |
| 146 | #else |
| 147 | #define isa_dma_bridge_buggy (0) |
| 148 | #endif |
| 149 | |
| 150 | #endif /* __KERNEL__ */ |
| 151 | #endif /* __ASM_SH_DMA_H */ |