Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | #ifndef __ASM_POWERPC_PCI_H |
| 2 | #define __ASM_POWERPC_PCI_H |
| 3 | #ifdef __KERNEL__ |
| 4 | |
| 5 | /* |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * as published by the Free Software Foundation; either version |
| 9 | * 2 of the License, or (at your option) any later version. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/types.h> |
| 13 | #include <linux/slab.h> |
| 14 | #include <linux/string.h> |
| 15 | #include <linux/dma-mapping.h> |
| 16 | #include <linux/scatterlist.h> |
| 17 | |
| 18 | #include <asm/machdep.h> |
| 19 | #include <asm/io.h> |
| 20 | #include <asm/prom.h> |
| 21 | #include <asm/pci-bridge.h> |
| 22 | |
| 23 | /* Return values for pci_controller_ops.probe_mode function */ |
| 24 | #define PCI_PROBE_NONE -1 /* Don't look at this bus at all */ |
| 25 | #define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */ |
| 26 | #define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */ |
| 27 | |
| 28 | #define PCIBIOS_MIN_IO 0x1000 |
| 29 | #define PCIBIOS_MIN_MEM 0x10000000 |
| 30 | |
| 31 | /* Values for the `which' argument to sys_pciconfig_iobase syscall. */ |
| 32 | #define IOBASE_BRIDGE_NUMBER 0 |
| 33 | #define IOBASE_MEMORY 1 |
| 34 | #define IOBASE_IO 2 |
| 35 | #define IOBASE_ISA_IO 3 |
| 36 | #define IOBASE_ISA_MEM 4 |
| 37 | |
| 38 | /* |
| 39 | * Set this to 1 if you want the kernel to re-assign all PCI |
| 40 | * bus numbers (don't do that on ppc64 yet !) |
| 41 | */ |
| 42 | #define pcibios_assign_all_busses() \ |
| 43 | (pci_has_flag(PCI_REASSIGN_ALL_BUS)) |
| 44 | |
| 45 | #define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ |
| 46 | static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) |
| 47 | { |
| 48 | if (ppc_md.pci_get_legacy_ide_irq) |
| 49 | return ppc_md.pci_get_legacy_ide_irq(dev, channel); |
| 50 | return channel ? 15 : 14; |
| 51 | } |
| 52 | |
| 53 | #ifdef CONFIG_PCI |
| 54 | extern void set_pci_dma_ops(const struct dma_map_ops *dma_ops); |
| 55 | extern const struct dma_map_ops *get_pci_dma_ops(void); |
| 56 | #else /* CONFIG_PCI */ |
| 57 | #define set_pci_dma_ops(d) |
| 58 | #define get_pci_dma_ops() NULL |
| 59 | #endif |
| 60 | |
| 61 | #ifdef CONFIG_PPC64 |
| 62 | |
| 63 | /* |
| 64 | * We want to avoid touching the cacheline size or MWI bit. |
| 65 | * pSeries firmware sets the cacheline size (which is not the cpu cacheline |
| 66 | * size in all cases) and hardware treats MWI the same as memory write. |
| 67 | */ |
| 68 | #define PCI_DISABLE_MWI |
| 69 | |
| 70 | #endif /* CONFIG_PPC64 */ |
| 71 | |
| 72 | extern int pci_domain_nr(struct pci_bus *bus); |
| 73 | |
| 74 | /* Decide whether to display the domain number in /proc */ |
| 75 | extern int pci_proc_domain(struct pci_bus *bus); |
| 76 | |
| 77 | struct vm_area_struct; |
| 78 | |
| 79 | /* Tell PCI code what kind of PCI resource mappings we support */ |
| 80 | #define HAVE_PCI_MMAP 1 |
| 81 | #define ARCH_GENERIC_PCI_MMAP_RESOURCE 1 |
| 82 | #define arch_can_pci_mmap_io() 1 |
| 83 | #define arch_can_pci_mmap_wc() 1 |
| 84 | |
| 85 | extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val, |
| 86 | size_t count); |
| 87 | extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val, |
| 88 | size_t count); |
| 89 | extern int pci_mmap_legacy_page_range(struct pci_bus *bus, |
| 90 | struct vm_area_struct *vma, |
| 91 | enum pci_mmap_state mmap_state); |
| 92 | |
| 93 | #define HAVE_PCI_LEGACY 1 |
| 94 | |
| 95 | extern void pcibios_claim_one_bus(struct pci_bus *b); |
| 96 | |
| 97 | extern void pcibios_finish_adding_to_bus(struct pci_bus *bus); |
| 98 | |
| 99 | extern void pcibios_resource_survey(void); |
| 100 | |
| 101 | extern struct pci_controller *init_phb_dynamic(struct device_node *dn); |
| 102 | extern int remove_phb_dynamic(struct pci_controller *phb); |
| 103 | |
| 104 | extern struct pci_dev *of_create_pci_dev(struct device_node *node, |
| 105 | struct pci_bus *bus, int devfn); |
| 106 | |
| 107 | extern unsigned int pci_parse_of_flags(u32 addr0, int bridge); |
| 108 | |
| 109 | extern void of_scan_pci_bridge(struct pci_dev *dev); |
| 110 | |
| 111 | extern void of_scan_bus(struct device_node *node, struct pci_bus *bus); |
| 112 | extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus); |
| 113 | |
| 114 | struct file; |
| 115 | extern pgprot_t pci_phys_mem_access_prot(struct file *file, |
| 116 | unsigned long pfn, |
| 117 | unsigned long size, |
| 118 | pgprot_t prot); |
| 119 | |
| 120 | #define HAVE_ARCH_PCI_RESOURCE_TO_USER |
| 121 | |
| 122 | extern resource_size_t pcibios_io_space_offset(struct pci_controller *hose); |
| 123 | extern void pcibios_setup_bus_devices(struct pci_bus *bus); |
| 124 | extern void pcibios_setup_bus_self(struct pci_bus *bus); |
| 125 | extern void pcibios_setup_phb_io_space(struct pci_controller *hose); |
| 126 | extern void pcibios_scan_phb(struct pci_controller *hose); |
| 127 | |
| 128 | #endif /* __KERNEL__ */ |
| 129 | |
| 130 | extern struct pci_dev *pnv_pci_get_gpu_dev(struct pci_dev *npdev); |
| 131 | extern struct pci_dev *pnv_pci_get_npu_dev(struct pci_dev *gpdev, int index); |
| 132 | |
| 133 | #endif /* __ASM_POWERPC_PCI_H */ |