Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | /* |
| 2 | * |
| 3 | * Header for code common to all OMAP1 machines. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License as published by the |
| 7 | * Free Software Foundation; either version 2 of the License, or (at your |
| 8 | * option) any later version. |
| 9 | * |
| 10 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
| 11 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 12 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| 13 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 14 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 15 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 16 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| 17 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 18 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 19 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License along |
| 22 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 23 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 24 | */ |
| 25 | |
| 26 | #ifndef __ARCH_ARM_MACH_OMAP1_COMMON_H |
| 27 | #define __ARCH_ARM_MACH_OMAP1_COMMON_H |
| 28 | |
| 29 | #include <linux/mtd/mtd.h> |
| 30 | #include <linux/platform_data/i2c-omap.h> |
| 31 | #include <linux/reboot.h> |
| 32 | |
| 33 | #include <asm/exception.h> |
| 34 | |
| 35 | #include <mach/irqs.h> |
| 36 | |
| 37 | #include "soc.h" |
| 38 | #include "i2c.h" |
| 39 | |
| 40 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 41 | void omap7xx_map_io(void); |
| 42 | #else |
| 43 | static inline void omap7xx_map_io(void) |
| 44 | { |
| 45 | } |
| 46 | #endif |
| 47 | |
| 48 | #ifdef CONFIG_ARCH_OMAP15XX |
| 49 | void omap1510_fpga_init_irq(void); |
| 50 | void omap15xx_map_io(void); |
| 51 | #else |
| 52 | static inline void omap1510_fpga_init_irq(void) |
| 53 | { |
| 54 | } |
| 55 | static inline void omap15xx_map_io(void) |
| 56 | { |
| 57 | } |
| 58 | #endif |
| 59 | |
| 60 | #ifdef CONFIG_ARCH_OMAP16XX |
| 61 | void omap16xx_map_io(void); |
| 62 | #else |
| 63 | static inline void omap16xx_map_io(void) |
| 64 | { |
| 65 | } |
| 66 | #endif |
| 67 | |
| 68 | #ifdef CONFIG_OMAP_SERIAL_WAKE |
| 69 | int omap_serial_wakeup_init(void); |
| 70 | #else |
| 71 | static inline int omap_serial_wakeup_init(void) |
| 72 | { |
| 73 | return 0; |
| 74 | } |
| 75 | #endif |
| 76 | |
| 77 | void omap1_init_early(void); |
| 78 | void omap1_init_irq(void); |
| 79 | void __exception_irq_entry omap1_handle_irq(struct pt_regs *regs); |
| 80 | void omap1_init_late(void); |
| 81 | void omap1_restart(enum reboot_mode, const char *); |
| 82 | |
| 83 | extern void __init omap_check_revision(void); |
| 84 | |
| 85 | extern void omap1_nand_cmd_ctl(struct mtd_info *mtd, int cmd, |
| 86 | unsigned int ctrl); |
| 87 | |
| 88 | extern void omap1_timer_init(void); |
| 89 | #ifdef CONFIG_OMAP_32K_TIMER |
| 90 | extern int omap_32k_timer_init(void); |
| 91 | #else |
| 92 | static inline int __init omap_32k_timer_init(void) |
| 93 | { |
| 94 | return -ENODEV; |
| 95 | } |
| 96 | #endif |
| 97 | |
| 98 | #ifdef CONFIG_ARCH_OMAP16XX |
| 99 | extern int ocpi_enable(void); |
| 100 | #else |
| 101 | static inline int ocpi_enable(void) { return 0; } |
| 102 | #endif |
| 103 | |
| 104 | extern u32 omap1_get_reset_sources(void); |
| 105 | |
| 106 | #endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */ |