| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Intel Low Power Subsystem PWM controller driver |
| 4 | * |
| 5 | * Copyright (C) 2014, Intel Corporation |
| 6 | * |
| 7 | * Derived from the original pwm-lpss.c |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef __PWM_LPSS_H |
| 11 | #define __PWM_LPSS_H |
| 12 | |
| 13 | #include <linux/device.h> |
| 14 | #include <linux/pwm.h> |
| 15 | |
| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 16 | #define MAX_PWMS 4 |
| 17 | |
| 18 | struct pwm_lpss_chip { |
| 19 | struct pwm_chip chip; |
| 20 | void __iomem *regs; |
| 21 | const struct pwm_lpss_boardinfo *info; |
| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 22 | }; |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 23 | |
| 24 | struct pwm_lpss_boardinfo { |
| 25 | unsigned long clk_rate; |
| 26 | unsigned int npwm; |
| 27 | unsigned long base_unit_bits; |
| 28 | bool bypass; |
| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 29 | /* |
| 30 | * On some devices the _PS0/_PS3 AML code of the GPU (GFX0) device |
| 31 | * messes with the PWM0 controllers state, |
| 32 | */ |
| 33 | bool other_devices_aml_touches_pwm_regs; |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 34 | }; |
| 35 | |
| 36 | struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r, |
| 37 | const struct pwm_lpss_boardinfo *info); |
| 38 | int pwm_lpss_remove(struct pwm_lpss_chip *lpwm); |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 39 | |
| 40 | #endif /* __PWM_LPSS_H */ |