blob: a070e69bb49cd40da45ddb46b857a7290a2cde76 [file] [log] [blame]
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) Microsoft Corporation.
4 *
5 * Author:
6 * Jake Oshins <jakeo@microsoft.com>
7 *
8 * This driver acts as a paravirtual front-end for PCI Express root buses.
9 * When a PCI Express function (either an entire device or an SR-IOV
10 * Virtual Function) is being passed through to the VM, this driver exposes
11 * a new bus to the guest VM. This is modeled as a root PCI bus because
12 * no bridges are being exposed to the VM. In fact, with a "Generation 2"
13 * VM within Hyper-V, there may seem to be no PCI bus at all in the VM
14 * until a device as been exposed using this driver.
15 *
16 * Each root PCI bus has its own PCI domain, which is called "Segment" in
17 * the PCI Firmware Specifications. Thus while each device passed through
18 * to the VM using this front-end will appear at "device 0", the domain will
19 * be unique. Typically, each bus will have one PCI function on it, though
20 * this driver does support more than one.
21 *
22 * In order to map the interrupts from the device through to the guest VM,
23 * this driver also implements an IRQ Domain, which handles interrupts (either
24 * MSI or MSI-X) associated with the functions on the bus. As interrupts are
25 * set up, torn down, or reaffined, this driver communicates with the
26 * underlying hypervisor to adjust the mappings in the I/O MMU so that each
27 * interrupt will be delivered to the correct virtual processor at the right
28 * vector. This driver does not support level-triggered (line-based)
29 * interrupts, and will report that the Interrupt Line register in the
30 * function's configuration space is zero.
31 *
32 * The rest of this driver mostly maps PCI concepts onto underlying Hyper-V
33 * facilities. For instance, the configuration space of a function exposed
34 * by Hyper-V is mapped into a single page of memory space, and the
35 * read and write handlers for config space must be aware of this mechanism.
36 * Similarly, device setup and teardown involves messages sent to and from
37 * the PCI back-end driver in Hyper-V.
38 */
39
40#include <linux/kernel.h>
41#include <linux/module.h>
42#include <linux/pci.h>
43#include <linux/delay.h>
44#include <linux/semaphore.h>
45#include <linux/irqdomain.h>
46#include <asm/irqdomain.h>
47#include <asm/apic.h>
48#include <linux/irq.h>
49#include <linux/msi.h>
50#include <linux/hyperv.h>
51#include <linux/refcount.h>
52#include <asm/mshyperv.h>
53
54/*
55 * Protocol versions. The low word is the minor version, the high word the
56 * major version.
57 */
58
59#define PCI_MAKE_VERSION(major, minor) ((u32)(((major) << 16) | (minor)))
60#define PCI_MAJOR_VERSION(version) ((u32)(version) >> 16)
61#define PCI_MINOR_VERSION(version) ((u32)(version) & 0xff)
62
63enum pci_protocol_version_t {
64 PCI_PROTOCOL_VERSION_1_1 = PCI_MAKE_VERSION(1, 1), /* Win10 */
65 PCI_PROTOCOL_VERSION_1_2 = PCI_MAKE_VERSION(1, 2), /* RS1 */
Olivier Deprez157378f2022-04-04 15:47:50 +020066 PCI_PROTOCOL_VERSION_1_3 = PCI_MAKE_VERSION(1, 3), /* Vibranium */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000067};
68
69#define CPU_AFFINITY_ALL -1ULL
70
71/*
72 * Supported protocol versions in the order of probing - highest go
73 * first.
74 */
75static enum pci_protocol_version_t pci_protocol_versions[] = {
Olivier Deprez157378f2022-04-04 15:47:50 +020076 PCI_PROTOCOL_VERSION_1_3,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000077 PCI_PROTOCOL_VERSION_1_2,
78 PCI_PROTOCOL_VERSION_1_1,
79};
80
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000081#define PCI_CONFIG_MMIO_LENGTH 0x2000
82#define CFG_PAGE_OFFSET 0x1000
83#define CFG_PAGE_SIZE (PCI_CONFIG_MMIO_LENGTH - CFG_PAGE_OFFSET)
84
85#define MAX_SUPPORTED_MSI_MESSAGES 0x400
86
87#define STATUS_REVISION_MISMATCH 0xC0000059
88
89/* space for 32bit serial number as string */
90#define SLOT_NAME_SIZE 11
91
92/*
93 * Message Types
94 */
95
96enum pci_message_type {
97 /*
98 * Version 1.1
99 */
100 PCI_MESSAGE_BASE = 0x42490000,
101 PCI_BUS_RELATIONS = PCI_MESSAGE_BASE + 0,
102 PCI_QUERY_BUS_RELATIONS = PCI_MESSAGE_BASE + 1,
103 PCI_POWER_STATE_CHANGE = PCI_MESSAGE_BASE + 4,
104 PCI_QUERY_RESOURCE_REQUIREMENTS = PCI_MESSAGE_BASE + 5,
105 PCI_QUERY_RESOURCE_RESOURCES = PCI_MESSAGE_BASE + 6,
106 PCI_BUS_D0ENTRY = PCI_MESSAGE_BASE + 7,
107 PCI_BUS_D0EXIT = PCI_MESSAGE_BASE + 8,
108 PCI_READ_BLOCK = PCI_MESSAGE_BASE + 9,
109 PCI_WRITE_BLOCK = PCI_MESSAGE_BASE + 0xA,
110 PCI_EJECT = PCI_MESSAGE_BASE + 0xB,
111 PCI_QUERY_STOP = PCI_MESSAGE_BASE + 0xC,
112 PCI_REENABLE = PCI_MESSAGE_BASE + 0xD,
113 PCI_QUERY_STOP_FAILED = PCI_MESSAGE_BASE + 0xE,
114 PCI_EJECTION_COMPLETE = PCI_MESSAGE_BASE + 0xF,
115 PCI_RESOURCES_ASSIGNED = PCI_MESSAGE_BASE + 0x10,
116 PCI_RESOURCES_RELEASED = PCI_MESSAGE_BASE + 0x11,
117 PCI_INVALIDATE_BLOCK = PCI_MESSAGE_BASE + 0x12,
118 PCI_QUERY_PROTOCOL_VERSION = PCI_MESSAGE_BASE + 0x13,
119 PCI_CREATE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x14,
120 PCI_DELETE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x15,
121 PCI_RESOURCES_ASSIGNED2 = PCI_MESSAGE_BASE + 0x16,
122 PCI_CREATE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x17,
123 PCI_DELETE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x18, /* unused */
Olivier Deprez157378f2022-04-04 15:47:50 +0200124 PCI_BUS_RELATIONS2 = PCI_MESSAGE_BASE + 0x19,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000125 PCI_MESSAGE_MAXIMUM
126};
127
128/*
129 * Structures defining the virtual PCI Express protocol.
130 */
131
132union pci_version {
133 struct {
134 u16 minor_version;
135 u16 major_version;
136 } parts;
137 u32 version;
138} __packed;
139
140/*
141 * Function numbers are 8-bits wide on Express, as interpreted through ARI,
142 * which is all this driver does. This representation is the one used in
143 * Windows, which is what is expected when sending this back and forth with
144 * the Hyper-V parent partition.
145 */
146union win_slot_encoding {
147 struct {
148 u32 dev:5;
149 u32 func:3;
150 u32 reserved:24;
151 } bits;
152 u32 slot;
153} __packed;
154
155/*
156 * Pretty much as defined in the PCI Specifications.
157 */
158struct pci_function_description {
159 u16 v_id; /* vendor ID */
160 u16 d_id; /* device ID */
161 u8 rev;
162 u8 prog_intf;
163 u8 subclass;
164 u8 base_class;
165 u32 subsystem_id;
166 union win_slot_encoding win_slot;
167 u32 ser; /* serial number */
168} __packed;
169
Olivier Deprez157378f2022-04-04 15:47:50 +0200170enum pci_device_description_flags {
171 HV_PCI_DEVICE_FLAG_NONE = 0x0,
172 HV_PCI_DEVICE_FLAG_NUMA_AFFINITY = 0x1,
173};
174
175struct pci_function_description2 {
176 u16 v_id; /* vendor ID */
177 u16 d_id; /* device ID */
178 u8 rev;
179 u8 prog_intf;
180 u8 subclass;
181 u8 base_class;
182 u32 subsystem_id;
183 union win_slot_encoding win_slot;
184 u32 ser; /* serial number */
185 u32 flags;
186 u16 virtual_numa_node;
187 u16 reserved;
188} __packed;
189
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000190/**
191 * struct hv_msi_desc
192 * @vector: IDT entry
193 * @delivery_mode: As defined in Intel's Programmer's
194 * Reference Manual, Volume 3, Chapter 8.
195 * @vector_count: Number of contiguous entries in the
196 * Interrupt Descriptor Table that are
197 * occupied by this Message-Signaled
198 * Interrupt. For "MSI", as first defined
199 * in PCI 2.2, this can be between 1 and
200 * 32. For "MSI-X," as first defined in PCI
201 * 3.0, this must be 1, as each MSI-X table
202 * entry would have its own descriptor.
203 * @reserved: Empty space
204 * @cpu_mask: All the target virtual processors.
205 */
206struct hv_msi_desc {
207 u8 vector;
208 u8 delivery_mode;
209 u16 vector_count;
210 u32 reserved;
211 u64 cpu_mask;
212} __packed;
213
214/**
215 * struct hv_msi_desc2 - 1.2 version of hv_msi_desc
216 * @vector: IDT entry
217 * @delivery_mode: As defined in Intel's Programmer's
218 * Reference Manual, Volume 3, Chapter 8.
219 * @vector_count: Number of contiguous entries in the
220 * Interrupt Descriptor Table that are
221 * occupied by this Message-Signaled
222 * Interrupt. For "MSI", as first defined
223 * in PCI 2.2, this can be between 1 and
224 * 32. For "MSI-X," as first defined in PCI
225 * 3.0, this must be 1, as each MSI-X table
226 * entry would have its own descriptor.
227 * @processor_count: number of bits enabled in array.
228 * @processor_array: All the target virtual processors.
229 */
230struct hv_msi_desc2 {
231 u8 vector;
232 u8 delivery_mode;
233 u16 vector_count;
234 u16 processor_count;
235 u16 processor_array[32];
236} __packed;
237
238/**
239 * struct tran_int_desc
240 * @reserved: unused, padding
241 * @vector_count: same as in hv_msi_desc
242 * @data: This is the "data payload" value that is
243 * written by the device when it generates
244 * a message-signaled interrupt, either MSI
245 * or MSI-X.
246 * @address: This is the address to which the data
247 * payload is written on interrupt
248 * generation.
249 */
250struct tran_int_desc {
251 u16 reserved;
252 u16 vector_count;
253 u32 data;
254 u64 address;
255} __packed;
256
257/*
258 * A generic message format for virtual PCI.
259 * Specific message formats are defined later in the file.
260 */
261
262struct pci_message {
263 u32 type;
264} __packed;
265
266struct pci_child_message {
267 struct pci_message message_type;
268 union win_slot_encoding wslot;
269} __packed;
270
271struct pci_incoming_message {
272 struct vmpacket_descriptor hdr;
273 struct pci_message message_type;
274} __packed;
275
276struct pci_response {
277 struct vmpacket_descriptor hdr;
278 s32 status; /* negative values are failures */
279} __packed;
280
281struct pci_packet {
282 void (*completion_func)(void *context, struct pci_response *resp,
283 int resp_packet_size);
284 void *compl_ctxt;
285
Olivier Deprez157378f2022-04-04 15:47:50 +0200286 struct pci_message message[];
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000287};
288
289/*
290 * Specific message types supporting the PCI protocol.
291 */
292
293/*
294 * Version negotiation message. Sent from the guest to the host.
295 * The guest is free to try different versions until the host
296 * accepts the version.
297 *
298 * pci_version: The protocol version requested.
299 * is_last_attempt: If TRUE, this is the last version guest will request.
300 * reservedz: Reserved field, set to zero.
301 */
302
303struct pci_version_request {
304 struct pci_message message_type;
305 u32 protocol_version;
306} __packed;
307
308/*
309 * Bus D0 Entry. This is sent from the guest to the host when the virtual
310 * bus (PCI Express port) is ready for action.
311 */
312
313struct pci_bus_d0_entry {
314 struct pci_message message_type;
315 u32 reserved;
316 u64 mmio_base;
317} __packed;
318
319struct pci_bus_relations {
320 struct pci_incoming_message incoming;
321 u32 device_count;
Olivier Deprez157378f2022-04-04 15:47:50 +0200322 struct pci_function_description func[];
323} __packed;
324
325struct pci_bus_relations2 {
326 struct pci_incoming_message incoming;
327 u32 device_count;
328 struct pci_function_description2 func[];
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000329} __packed;
330
331struct pci_q_res_req_response {
332 struct vmpacket_descriptor hdr;
333 s32 status; /* negative values are failures */
Olivier Deprez157378f2022-04-04 15:47:50 +0200334 u32 probed_bar[PCI_STD_NUM_BARS];
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000335} __packed;
336
337struct pci_set_power {
338 struct pci_message message_type;
339 union win_slot_encoding wslot;
340 u32 power_state; /* In Windows terms */
341 u32 reserved;
342} __packed;
343
344struct pci_set_power_response {
345 struct vmpacket_descriptor hdr;
346 s32 status; /* negative values are failures */
347 union win_slot_encoding wslot;
348 u32 resultant_state; /* In Windows terms */
349 u32 reserved;
350} __packed;
351
352struct pci_resources_assigned {
353 struct pci_message message_type;
354 union win_slot_encoding wslot;
355 u8 memory_range[0x14][6]; /* not used here */
356 u32 msi_descriptors;
357 u32 reserved[4];
358} __packed;
359
360struct pci_resources_assigned2 {
361 struct pci_message message_type;
362 union win_slot_encoding wslot;
363 u8 memory_range[0x14][6]; /* not used here */
364 u32 msi_descriptor_count;
365 u8 reserved[70];
366} __packed;
367
368struct pci_create_interrupt {
369 struct pci_message message_type;
370 union win_slot_encoding wslot;
371 struct hv_msi_desc int_desc;
372} __packed;
373
374struct pci_create_int_response {
375 struct pci_response response;
376 u32 reserved;
377 struct tran_int_desc int_desc;
378} __packed;
379
380struct pci_create_interrupt2 {
381 struct pci_message message_type;
382 union win_slot_encoding wslot;
383 struct hv_msi_desc2 int_desc;
384} __packed;
385
386struct pci_delete_interrupt {
387 struct pci_message message_type;
388 union win_slot_encoding wslot;
389 struct tran_int_desc int_desc;
390} __packed;
391
David Brazdil0f672f62019-12-10 10:32:29 +0000392/*
393 * Note: the VM must pass a valid block id, wslot and bytes_requested.
394 */
395struct pci_read_block {
396 struct pci_message message_type;
397 u32 block_id;
398 union win_slot_encoding wslot;
399 u32 bytes_requested;
400} __packed;
401
402struct pci_read_block_response {
403 struct vmpacket_descriptor hdr;
404 u32 status;
405 u8 bytes[HV_CONFIG_BLOCK_SIZE_MAX];
406} __packed;
407
408/*
409 * Note: the VM must pass a valid block id, wslot and byte_count.
410 */
411struct pci_write_block {
412 struct pci_message message_type;
413 u32 block_id;
414 union win_slot_encoding wslot;
415 u32 byte_count;
416 u8 bytes[HV_CONFIG_BLOCK_SIZE_MAX];
417} __packed;
418
419struct pci_dev_inval_block {
420 struct pci_incoming_message incoming;
421 union win_slot_encoding wslot;
422 u64 block_mask;
423} __packed;
424
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000425struct pci_dev_incoming {
426 struct pci_incoming_message incoming;
427 union win_slot_encoding wslot;
428} __packed;
429
430struct pci_eject_response {
431 struct pci_message message_type;
432 union win_slot_encoding wslot;
433 u32 status;
434} __packed;
435
436static int pci_ring_size = (4 * PAGE_SIZE);
437
438/*
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000439 * Driver specific state.
440 */
441
442enum hv_pcibus_state {
443 hv_pcibus_init = 0,
444 hv_pcibus_probed,
445 hv_pcibus_installed,
Olivier Deprez157378f2022-04-04 15:47:50 +0200446 hv_pcibus_removing,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000447 hv_pcibus_maximum
448};
449
450struct hv_pcibus_device {
451 struct pci_sysdata sysdata;
Olivier Deprez157378f2022-04-04 15:47:50 +0200452 /* Protocol version negotiated with the host */
453 enum pci_protocol_version_t protocol_version;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000454 enum hv_pcibus_state state;
455 refcount_t remove_lock;
456 struct hv_device *hdev;
457 resource_size_t low_mmio_space;
458 resource_size_t high_mmio_space;
459 struct resource *mem_config;
460 struct resource *low_mmio_res;
461 struct resource *high_mmio_res;
462 struct completion *survey_event;
463 struct completion remove_event;
464 struct pci_bus *pci_bus;
465 spinlock_t config_lock; /* Avoid two threads writing index page */
466 spinlock_t device_list_lock; /* Protect lists below */
467 void __iomem *cfg_addr;
468
469 struct list_head resources_for_children;
470
471 struct list_head children;
472 struct list_head dr_list;
473
474 struct msi_domain_info msi_info;
475 struct msi_controller msi_chip;
476 struct irq_domain *irq_domain;
477
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000478 spinlock_t retarget_msi_interrupt_lock;
479
480 struct workqueue_struct *wq;
David Brazdil0f672f62019-12-10 10:32:29 +0000481
Olivier Deprez157378f2022-04-04 15:47:50 +0200482 /* Highest slot of child device with resources allocated */
483 int wslot_res_allocated;
484
David Brazdil0f672f62019-12-10 10:32:29 +0000485 /* hypercall arg, must not cross page boundary */
Olivier Deprez157378f2022-04-04 15:47:50 +0200486 struct hv_retarget_device_interrupt retarget_msi_interrupt_params;
David Brazdil0f672f62019-12-10 10:32:29 +0000487
488 /*
489 * Don't put anything here: retarget_msi_interrupt_params must be last
490 */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000491};
492
493/*
494 * Tracks "Device Relations" messages from the host, which must be both
495 * processed in order and deferred so that they don't run in the context
496 * of the incoming packet callback.
497 */
498struct hv_dr_work {
499 struct work_struct wrk;
500 struct hv_pcibus_device *bus;
501};
502
Olivier Deprez157378f2022-04-04 15:47:50 +0200503struct hv_pcidev_description {
504 u16 v_id; /* vendor ID */
505 u16 d_id; /* device ID */
506 u8 rev;
507 u8 prog_intf;
508 u8 subclass;
509 u8 base_class;
510 u32 subsystem_id;
511 union win_slot_encoding win_slot;
512 u32 ser; /* serial number */
513 u32 flags;
514 u16 virtual_numa_node;
515};
516
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000517struct hv_dr_state {
518 struct list_head list_entry;
519 u32 device_count;
Olivier Deprez157378f2022-04-04 15:47:50 +0200520 struct hv_pcidev_description func[];
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000521};
522
523enum hv_pcichild_state {
524 hv_pcichild_init = 0,
525 hv_pcichild_requirements,
526 hv_pcichild_resourced,
527 hv_pcichild_ejecting,
528 hv_pcichild_maximum
529};
530
531struct hv_pci_dev {
532 /* List protected by pci_rescan_remove_lock */
533 struct list_head list_entry;
534 refcount_t refs;
535 enum hv_pcichild_state state;
536 struct pci_slot *pci_slot;
Olivier Deprez157378f2022-04-04 15:47:50 +0200537 struct hv_pcidev_description desc;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000538 bool reported_missing;
539 struct hv_pcibus_device *hbus;
540 struct work_struct wrk;
541
David Brazdil0f672f62019-12-10 10:32:29 +0000542 void (*block_invalidate)(void *context, u64 block_mask);
543 void *invalidate_context;
544
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000545 /*
546 * What would be observed if one wrote 0xFFFFFFFF to a BAR and then
547 * read it back, for each of the BAR offsets within config space.
548 */
Olivier Deprez157378f2022-04-04 15:47:50 +0200549 u32 probed_bar[PCI_STD_NUM_BARS];
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000550};
551
552struct hv_pci_compl {
553 struct completion host_event;
554 s32 completion_status;
555};
556
557static void hv_pci_onchannelcallback(void *context);
558
559/**
560 * hv_pci_generic_compl() - Invoked for a completion packet
561 * @context: Set up by the sender of the packet.
562 * @resp: The response packet
563 * @resp_packet_size: Size in bytes of the packet
564 *
565 * This function is used to trigger an event and report status
566 * for any message for which the completion packet contains a
567 * status and nothing else.
568 */
569static void hv_pci_generic_compl(void *context, struct pci_response *resp,
570 int resp_packet_size)
571{
572 struct hv_pci_compl *comp_pkt = context;
573
574 if (resp_packet_size >= offsetofend(struct pci_response, status))
575 comp_pkt->completion_status = resp->status;
576 else
577 comp_pkt->completion_status = -1;
578
579 complete(&comp_pkt->host_event);
580}
581
582static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
583 u32 wslot);
584
585static void get_pcichild(struct hv_pci_dev *hpdev)
586{
587 refcount_inc(&hpdev->refs);
588}
589
590static void put_pcichild(struct hv_pci_dev *hpdev)
591{
592 if (refcount_dec_and_test(&hpdev->refs))
593 kfree(hpdev);
594}
595
596static void get_hvpcibus(struct hv_pcibus_device *hv_pcibus);
597static void put_hvpcibus(struct hv_pcibus_device *hv_pcibus);
598
599/*
600 * There is no good way to get notified from vmbus_onoffer_rescind(),
601 * so let's use polling here, since this is not a hot path.
602 */
603static int wait_for_response(struct hv_device *hdev,
604 struct completion *comp)
605{
606 while (true) {
607 if (hdev->channel->rescind) {
608 dev_warn_once(&hdev->device, "The device is gone.\n");
609 return -ENODEV;
610 }
611
612 if (wait_for_completion_timeout(comp, HZ / 10))
613 break;
614 }
615
616 return 0;
617}
618
619/**
620 * devfn_to_wslot() - Convert from Linux PCI slot to Windows
621 * @devfn: The Linux representation of PCI slot
622 *
623 * Windows uses a slightly different representation of PCI slot.
624 *
625 * Return: The Windows representation
626 */
627static u32 devfn_to_wslot(int devfn)
628{
629 union win_slot_encoding wslot;
630
631 wslot.slot = 0;
632 wslot.bits.dev = PCI_SLOT(devfn);
633 wslot.bits.func = PCI_FUNC(devfn);
634
635 return wslot.slot;
636}
637
638/**
639 * wslot_to_devfn() - Convert from Windows PCI slot to Linux
640 * @wslot: The Windows representation of PCI slot
641 *
642 * Windows uses a slightly different representation of PCI slot.
643 *
644 * Return: The Linux representation
645 */
646static int wslot_to_devfn(u32 wslot)
647{
648 union win_slot_encoding slot_no;
649
650 slot_no.slot = wslot;
651 return PCI_DEVFN(slot_no.bits.dev, slot_no.bits.func);
652}
653
654/*
655 * PCI Configuration Space for these root PCI buses is implemented as a pair
656 * of pages in memory-mapped I/O space. Writing to the first page chooses
657 * the PCI function being written or read. Once the first page has been
658 * written to, the following page maps in the entire configuration space of
659 * the function.
660 */
661
662/**
663 * _hv_pcifront_read_config() - Internal PCI config read
664 * @hpdev: The PCI driver's representation of the device
665 * @where: Offset within config space
666 * @size: Size of the transfer
667 * @val: Pointer to the buffer receiving the data
668 */
669static void _hv_pcifront_read_config(struct hv_pci_dev *hpdev, int where,
670 int size, u32 *val)
671{
672 unsigned long flags;
673 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
674
675 /*
676 * If the attempt is to read the IDs or the ROM BAR, simulate that.
677 */
678 if (where + size <= PCI_COMMAND) {
679 memcpy(val, ((u8 *)&hpdev->desc.v_id) + where, size);
680 } else if (where >= PCI_CLASS_REVISION && where + size <=
681 PCI_CACHE_LINE_SIZE) {
682 memcpy(val, ((u8 *)&hpdev->desc.rev) + where -
683 PCI_CLASS_REVISION, size);
684 } else if (where >= PCI_SUBSYSTEM_VENDOR_ID && where + size <=
685 PCI_ROM_ADDRESS) {
686 memcpy(val, (u8 *)&hpdev->desc.subsystem_id + where -
687 PCI_SUBSYSTEM_VENDOR_ID, size);
688 } else if (where >= PCI_ROM_ADDRESS && where + size <=
689 PCI_CAPABILITY_LIST) {
690 /* ROM BARs are unimplemented */
691 *val = 0;
692 } else if (where >= PCI_INTERRUPT_LINE && where + size <=
693 PCI_INTERRUPT_PIN) {
694 /*
695 * Interrupt Line and Interrupt PIN are hard-wired to zero
696 * because this front-end only supports message-signaled
697 * interrupts.
698 */
699 *val = 0;
700 } else if (where + size <= CFG_PAGE_SIZE) {
701 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
702 /* Choose the function to be read. (See comment above) */
703 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
704 /* Make sure the function was chosen before we start reading. */
705 mb();
706 /* Read from that function's config space. */
707 switch (size) {
708 case 1:
709 *val = readb(addr);
710 break;
711 case 2:
712 *val = readw(addr);
713 break;
714 default:
715 *val = readl(addr);
716 break;
717 }
718 /*
719 * Make sure the read was done before we release the spinlock
720 * allowing consecutive reads/writes.
721 */
722 mb();
723 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
724 } else {
725 dev_err(&hpdev->hbus->hdev->device,
726 "Attempt to read beyond a function's config space.\n");
727 }
728}
729
730static u16 hv_pcifront_get_vendor_id(struct hv_pci_dev *hpdev)
731{
732 u16 ret;
733 unsigned long flags;
734 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET +
735 PCI_VENDOR_ID;
736
737 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
738
739 /* Choose the function to be read. (See comment above) */
740 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
741 /* Make sure the function was chosen before we start reading. */
742 mb();
743 /* Read from that function's config space. */
744 ret = readw(addr);
745 /*
746 * mb() is not required here, because the spin_unlock_irqrestore()
747 * is a barrier.
748 */
749
750 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
751
752 return ret;
753}
754
755/**
756 * _hv_pcifront_write_config() - Internal PCI config write
757 * @hpdev: The PCI driver's representation of the device
758 * @where: Offset within config space
759 * @size: Size of the transfer
760 * @val: The data being transferred
761 */
762static void _hv_pcifront_write_config(struct hv_pci_dev *hpdev, int where,
763 int size, u32 val)
764{
765 unsigned long flags;
766 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
767
768 if (where >= PCI_SUBSYSTEM_VENDOR_ID &&
769 where + size <= PCI_CAPABILITY_LIST) {
770 /* SSIDs and ROM BARs are read-only */
771 } else if (where >= PCI_COMMAND && where + size <= CFG_PAGE_SIZE) {
772 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
773 /* Choose the function to be written. (See comment above) */
774 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
775 /* Make sure the function was chosen before we start writing. */
776 wmb();
777 /* Write to that function's config space. */
778 switch (size) {
779 case 1:
780 writeb(val, addr);
781 break;
782 case 2:
783 writew(val, addr);
784 break;
785 default:
786 writel(val, addr);
787 break;
788 }
789 /*
790 * Make sure the write was done before we release the spinlock
791 * allowing consecutive reads/writes.
792 */
793 mb();
794 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
795 } else {
796 dev_err(&hpdev->hbus->hdev->device,
797 "Attempt to write beyond a function's config space.\n");
798 }
799}
800
801/**
802 * hv_pcifront_read_config() - Read configuration space
803 * @bus: PCI Bus structure
804 * @devfn: Device/function
805 * @where: Offset from base
806 * @size: Byte/word/dword
807 * @val: Value to be read
808 *
809 * Return: PCIBIOS_SUCCESSFUL on success
810 * PCIBIOS_DEVICE_NOT_FOUND on failure
811 */
812static int hv_pcifront_read_config(struct pci_bus *bus, unsigned int devfn,
813 int where, int size, u32 *val)
814{
815 struct hv_pcibus_device *hbus =
816 container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
817 struct hv_pci_dev *hpdev;
818
819 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
820 if (!hpdev)
821 return PCIBIOS_DEVICE_NOT_FOUND;
822
823 _hv_pcifront_read_config(hpdev, where, size, val);
824
825 put_pcichild(hpdev);
826 return PCIBIOS_SUCCESSFUL;
827}
828
829/**
830 * hv_pcifront_write_config() - Write configuration space
831 * @bus: PCI Bus structure
832 * @devfn: Device/function
833 * @where: Offset from base
834 * @size: Byte/word/dword
835 * @val: Value to be written to device
836 *
837 * Return: PCIBIOS_SUCCESSFUL on success
838 * PCIBIOS_DEVICE_NOT_FOUND on failure
839 */
840static int hv_pcifront_write_config(struct pci_bus *bus, unsigned int devfn,
841 int where, int size, u32 val)
842{
843 struct hv_pcibus_device *hbus =
844 container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
845 struct hv_pci_dev *hpdev;
846
847 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
848 if (!hpdev)
849 return PCIBIOS_DEVICE_NOT_FOUND;
850
851 _hv_pcifront_write_config(hpdev, where, size, val);
852
853 put_pcichild(hpdev);
854 return PCIBIOS_SUCCESSFUL;
855}
856
857/* PCIe operations */
858static struct pci_ops hv_pcifront_ops = {
859 .read = hv_pcifront_read_config,
860 .write = hv_pcifront_write_config,
861};
862
David Brazdil0f672f62019-12-10 10:32:29 +0000863/*
864 * Paravirtual backchannel
865 *
866 * Hyper-V SR-IOV provides a backchannel mechanism in software for
867 * communication between a VF driver and a PF driver. These
868 * "configuration blocks" are similar in concept to PCI configuration space,
869 * but instead of doing reads and writes in 32-bit chunks through a very slow
870 * path, packets of up to 128 bytes can be sent or received asynchronously.
871 *
872 * Nearly every SR-IOV device contains just such a communications channel in
873 * hardware, so using this one in software is usually optional. Using the
874 * software channel, however, allows driver implementers to leverage software
875 * tools that fuzz the communications channel looking for vulnerabilities.
876 *
877 * The usage model for these packets puts the responsibility for reading or
878 * writing on the VF driver. The VF driver sends a read or a write packet,
879 * indicating which "block" is being referred to by number.
880 *
881 * If the PF driver wishes to initiate communication, it can "invalidate" one or
882 * more of the first 64 blocks. This invalidation is delivered via a callback
883 * supplied by the VF driver by this driver.
884 *
885 * No protocol is implied, except that supplied by the PF and VF drivers.
886 */
887
888struct hv_read_config_compl {
889 struct hv_pci_compl comp_pkt;
890 void *buf;
891 unsigned int len;
892 unsigned int bytes_returned;
893};
894
895/**
896 * hv_pci_read_config_compl() - Invoked when a response packet
897 * for a read config block operation arrives.
898 * @context: Identifies the read config operation
899 * @resp: The response packet itself
900 * @resp_packet_size: Size in bytes of the response packet
901 */
902static void hv_pci_read_config_compl(void *context, struct pci_response *resp,
903 int resp_packet_size)
904{
905 struct hv_read_config_compl *comp = context;
906 struct pci_read_block_response *read_resp =
907 (struct pci_read_block_response *)resp;
908 unsigned int data_len, hdr_len;
909
910 hdr_len = offsetof(struct pci_read_block_response, bytes);
911 if (resp_packet_size < hdr_len) {
912 comp->comp_pkt.completion_status = -1;
913 goto out;
914 }
915
916 data_len = resp_packet_size - hdr_len;
917 if (data_len > 0 && read_resp->status == 0) {
918 comp->bytes_returned = min(comp->len, data_len);
919 memcpy(comp->buf, read_resp->bytes, comp->bytes_returned);
920 } else {
921 comp->bytes_returned = 0;
922 }
923
924 comp->comp_pkt.completion_status = read_resp->status;
925out:
926 complete(&comp->comp_pkt.host_event);
927}
928
929/**
930 * hv_read_config_block() - Sends a read config block request to
931 * the back-end driver running in the Hyper-V parent partition.
932 * @pdev: The PCI driver's representation for this device.
933 * @buf: Buffer into which the config block will be copied.
934 * @len: Size in bytes of buf.
935 * @block_id: Identifies the config block which has been requested.
936 * @bytes_returned: Size which came back from the back-end driver.
937 *
938 * Return: 0 on success, -errno on failure
939 */
Olivier Deprez157378f2022-04-04 15:47:50 +0200940static int hv_read_config_block(struct pci_dev *pdev, void *buf,
941 unsigned int len, unsigned int block_id,
942 unsigned int *bytes_returned)
David Brazdil0f672f62019-12-10 10:32:29 +0000943{
944 struct hv_pcibus_device *hbus =
945 container_of(pdev->bus->sysdata, struct hv_pcibus_device,
946 sysdata);
947 struct {
948 struct pci_packet pkt;
949 char buf[sizeof(struct pci_read_block)];
950 } pkt;
951 struct hv_read_config_compl comp_pkt;
952 struct pci_read_block *read_blk;
953 int ret;
954
955 if (len == 0 || len > HV_CONFIG_BLOCK_SIZE_MAX)
956 return -EINVAL;
957
958 init_completion(&comp_pkt.comp_pkt.host_event);
959 comp_pkt.buf = buf;
960 comp_pkt.len = len;
961
962 memset(&pkt, 0, sizeof(pkt));
963 pkt.pkt.completion_func = hv_pci_read_config_compl;
964 pkt.pkt.compl_ctxt = &comp_pkt;
965 read_blk = (struct pci_read_block *)&pkt.pkt.message;
966 read_blk->message_type.type = PCI_READ_BLOCK;
967 read_blk->wslot.slot = devfn_to_wslot(pdev->devfn);
968 read_blk->block_id = block_id;
969 read_blk->bytes_requested = len;
970
971 ret = vmbus_sendpacket(hbus->hdev->channel, read_blk,
972 sizeof(*read_blk), (unsigned long)&pkt.pkt,
973 VM_PKT_DATA_INBAND,
974 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
975 if (ret)
976 return ret;
977
978 ret = wait_for_response(hbus->hdev, &comp_pkt.comp_pkt.host_event);
979 if (ret)
980 return ret;
981
982 if (comp_pkt.comp_pkt.completion_status != 0 ||
983 comp_pkt.bytes_returned == 0) {
984 dev_err(&hbus->hdev->device,
985 "Read Config Block failed: 0x%x, bytes_returned=%d\n",
986 comp_pkt.comp_pkt.completion_status,
987 comp_pkt.bytes_returned);
988 return -EIO;
989 }
990
991 *bytes_returned = comp_pkt.bytes_returned;
992 return 0;
993}
994
995/**
996 * hv_pci_write_config_compl() - Invoked when a response packet for a write
997 * config block operation arrives.
998 * @context: Identifies the write config operation
999 * @resp: The response packet itself
1000 * @resp_packet_size: Size in bytes of the response packet
1001 */
1002static void hv_pci_write_config_compl(void *context, struct pci_response *resp,
1003 int resp_packet_size)
1004{
1005 struct hv_pci_compl *comp_pkt = context;
1006
1007 comp_pkt->completion_status = resp->status;
1008 complete(&comp_pkt->host_event);
1009}
1010
1011/**
1012 * hv_write_config_block() - Sends a write config block request to the
1013 * back-end driver running in the Hyper-V parent partition.
1014 * @pdev: The PCI driver's representation for this device.
1015 * @buf: Buffer from which the config block will be copied.
1016 * @len: Size in bytes of buf.
1017 * @block_id: Identifies the config block which is being written.
1018 *
1019 * Return: 0 on success, -errno on failure
1020 */
Olivier Deprez157378f2022-04-04 15:47:50 +02001021static int hv_write_config_block(struct pci_dev *pdev, void *buf,
1022 unsigned int len, unsigned int block_id)
David Brazdil0f672f62019-12-10 10:32:29 +00001023{
1024 struct hv_pcibus_device *hbus =
1025 container_of(pdev->bus->sysdata, struct hv_pcibus_device,
1026 sysdata);
1027 struct {
1028 struct pci_packet pkt;
1029 char buf[sizeof(struct pci_write_block)];
1030 u32 reserved;
1031 } pkt;
1032 struct hv_pci_compl comp_pkt;
1033 struct pci_write_block *write_blk;
1034 u32 pkt_size;
1035 int ret;
1036
1037 if (len == 0 || len > HV_CONFIG_BLOCK_SIZE_MAX)
1038 return -EINVAL;
1039
1040 init_completion(&comp_pkt.host_event);
1041
1042 memset(&pkt, 0, sizeof(pkt));
1043 pkt.pkt.completion_func = hv_pci_write_config_compl;
1044 pkt.pkt.compl_ctxt = &comp_pkt;
1045 write_blk = (struct pci_write_block *)&pkt.pkt.message;
1046 write_blk->message_type.type = PCI_WRITE_BLOCK;
1047 write_blk->wslot.slot = devfn_to_wslot(pdev->devfn);
1048 write_blk->block_id = block_id;
1049 write_blk->byte_count = len;
1050 memcpy(write_blk->bytes, buf, len);
1051 pkt_size = offsetof(struct pci_write_block, bytes) + len;
1052 /*
1053 * This quirk is required on some hosts shipped around 2018, because
1054 * these hosts don't check the pkt_size correctly (new hosts have been
1055 * fixed since early 2019). The quirk is also safe on very old hosts
1056 * and new hosts, because, on them, what really matters is the length
1057 * specified in write_blk->byte_count.
1058 */
1059 pkt_size += sizeof(pkt.reserved);
1060
1061 ret = vmbus_sendpacket(hbus->hdev->channel, write_blk, pkt_size,
1062 (unsigned long)&pkt.pkt, VM_PKT_DATA_INBAND,
1063 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1064 if (ret)
1065 return ret;
1066
1067 ret = wait_for_response(hbus->hdev, &comp_pkt.host_event);
1068 if (ret)
1069 return ret;
1070
1071 if (comp_pkt.completion_status != 0) {
1072 dev_err(&hbus->hdev->device,
1073 "Write Config Block failed: 0x%x\n",
1074 comp_pkt.completion_status);
1075 return -EIO;
1076 }
1077
1078 return 0;
1079}
1080
1081/**
1082 * hv_register_block_invalidate() - Invoked when a config block invalidation
1083 * arrives from the back-end driver.
1084 * @pdev: The PCI driver's representation for this device.
1085 * @context: Identifies the device.
1086 * @block_invalidate: Identifies all of the blocks being invalidated.
1087 *
1088 * Return: 0 on success, -errno on failure
1089 */
Olivier Deprez157378f2022-04-04 15:47:50 +02001090static int hv_register_block_invalidate(struct pci_dev *pdev, void *context,
1091 void (*block_invalidate)(void *context,
1092 u64 block_mask))
David Brazdil0f672f62019-12-10 10:32:29 +00001093{
1094 struct hv_pcibus_device *hbus =
1095 container_of(pdev->bus->sysdata, struct hv_pcibus_device,
1096 sysdata);
1097 struct hv_pci_dev *hpdev;
1098
1099 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1100 if (!hpdev)
1101 return -ENODEV;
1102
1103 hpdev->block_invalidate = block_invalidate;
1104 hpdev->invalidate_context = context;
1105
1106 put_pcichild(hpdev);
1107 return 0;
1108
1109}
1110
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001111/* Interrupt management hooks */
1112static void hv_int_desc_free(struct hv_pci_dev *hpdev,
1113 struct tran_int_desc *int_desc)
1114{
1115 struct pci_delete_interrupt *int_pkt;
1116 struct {
1117 struct pci_packet pkt;
1118 u8 buffer[sizeof(struct pci_delete_interrupt)];
1119 } ctxt;
1120
1121 memset(&ctxt, 0, sizeof(ctxt));
1122 int_pkt = (struct pci_delete_interrupt *)&ctxt.pkt.message;
1123 int_pkt->message_type.type =
1124 PCI_DELETE_INTERRUPT_MESSAGE;
1125 int_pkt->wslot.slot = hpdev->desc.win_slot.slot;
1126 int_pkt->int_desc = *int_desc;
1127 vmbus_sendpacket(hpdev->hbus->hdev->channel, int_pkt, sizeof(*int_pkt),
1128 (unsigned long)&ctxt.pkt, VM_PKT_DATA_INBAND, 0);
1129 kfree(int_desc);
1130}
1131
1132/**
1133 * hv_msi_free() - Free the MSI.
1134 * @domain: The interrupt domain pointer
1135 * @info: Extra MSI-related context
1136 * @irq: Identifies the IRQ.
1137 *
1138 * The Hyper-V parent partition and hypervisor are tracking the
1139 * messages that are in use, keeping the interrupt redirection
1140 * table up to date. This callback sends a message that frees
1141 * the IRT entry and related tracking nonsense.
1142 */
1143static void hv_msi_free(struct irq_domain *domain, struct msi_domain_info *info,
1144 unsigned int irq)
1145{
1146 struct hv_pcibus_device *hbus;
1147 struct hv_pci_dev *hpdev;
1148 struct pci_dev *pdev;
1149 struct tran_int_desc *int_desc;
1150 struct irq_data *irq_data = irq_domain_get_irq_data(domain, irq);
1151 struct msi_desc *msi = irq_data_get_msi_desc(irq_data);
1152
1153 pdev = msi_desc_to_pci_dev(msi);
1154 hbus = info->data;
1155 int_desc = irq_data_get_irq_chip_data(irq_data);
1156 if (!int_desc)
1157 return;
1158
1159 irq_data->chip_data = NULL;
1160 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1161 if (!hpdev) {
1162 kfree(int_desc);
1163 return;
1164 }
1165
1166 hv_int_desc_free(hpdev, int_desc);
1167 put_pcichild(hpdev);
1168}
1169
1170static int hv_set_affinity(struct irq_data *data, const struct cpumask *dest,
1171 bool force)
1172{
1173 struct irq_data *parent = data->parent_data;
1174
1175 return parent->chip->irq_set_affinity(parent, dest, force);
1176}
1177
1178static void hv_irq_mask(struct irq_data *data)
1179{
1180 pci_msi_mask_irq(data);
1181}
1182
1183/**
1184 * hv_irq_unmask() - "Unmask" the IRQ by setting its current
1185 * affinity.
1186 * @data: Describes the IRQ
1187 *
1188 * Build new a destination for the MSI and make a hypercall to
1189 * update the Interrupt Redirection Table. "Device Logical ID"
1190 * is built out of this PCI bus's instance GUID and the function
1191 * number of the device.
1192 */
1193static void hv_irq_unmask(struct irq_data *data)
1194{
1195 struct msi_desc *msi_desc = irq_data_get_msi_desc(data);
1196 struct irq_cfg *cfg = irqd_cfg(data);
Olivier Deprez157378f2022-04-04 15:47:50 +02001197 struct hv_retarget_device_interrupt *params;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001198 struct hv_pcibus_device *hbus;
1199 struct cpumask *dest;
David Brazdil0f672f62019-12-10 10:32:29 +00001200 cpumask_var_t tmp;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001201 struct pci_bus *pbus;
1202 struct pci_dev *pdev;
1203 unsigned long flags;
1204 u32 var_size = 0;
David Brazdil0f672f62019-12-10 10:32:29 +00001205 int cpu, nr_bank;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001206 u64 res;
1207
1208 dest = irq_data_get_effective_affinity_mask(data);
1209 pdev = msi_desc_to_pci_dev(msi_desc);
1210 pbus = pdev->bus;
1211 hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
1212
1213 spin_lock_irqsave(&hbus->retarget_msi_interrupt_lock, flags);
1214
1215 params = &hbus->retarget_msi_interrupt_params;
1216 memset(params, 0, sizeof(*params));
1217 params->partition_id = HV_PARTITION_ID_SELF;
1218 params->int_entry.source = 1; /* MSI(-X) */
Olivier Deprez157378f2022-04-04 15:47:50 +02001219 hv_set_msi_entry_from_desc(&params->int_entry.msi_entry, msi_desc);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001220 params->device_id = (hbus->hdev->dev_instance.b[5] << 24) |
1221 (hbus->hdev->dev_instance.b[4] << 16) |
1222 (hbus->hdev->dev_instance.b[7] << 8) |
1223 (hbus->hdev->dev_instance.b[6] & 0xf8) |
1224 PCI_FUNC(pdev->devfn);
1225 params->int_target.vector = cfg->vector;
1226
1227 /*
1228 * Honoring apic->irq_delivery_mode set to dest_Fixed by
1229 * setting the HV_DEVICE_INTERRUPT_TARGET_MULTICAST flag results in a
1230 * spurious interrupt storm. Not doing so does not seem to have a
1231 * negative effect (yet?).
1232 */
1233
Olivier Deprez157378f2022-04-04 15:47:50 +02001234 if (hbus->protocol_version >= PCI_PROTOCOL_VERSION_1_2) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001235 /*
1236 * PCI_PROTOCOL_VERSION_1_2 supports the VP_SET version of the
1237 * HVCALL_RETARGET_INTERRUPT hypercall, which also coincides
1238 * with >64 VP support.
1239 * ms_hyperv.hints & HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED
1240 * is not sufficient for this hypercall.
1241 */
1242 params->int_target.flags |=
1243 HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET;
David Brazdil0f672f62019-12-10 10:32:29 +00001244
1245 if (!alloc_cpumask_var(&tmp, GFP_ATOMIC)) {
1246 res = 1;
1247 goto exit_unlock;
1248 }
1249
1250 cpumask_and(tmp, dest, cpu_online_mask);
1251 nr_bank = cpumask_to_vpset(&params->int_target.vp_set, tmp);
1252 free_cpumask_var(tmp);
1253
1254 if (nr_bank <= 0) {
1255 res = 1;
1256 goto exit_unlock;
1257 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001258
1259 /*
1260 * var-sized hypercall, var-size starts after vp_mask (thus
David Brazdil0f672f62019-12-10 10:32:29 +00001261 * vp_set.format does not count, but vp_set.valid_bank_mask
1262 * does).
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001263 */
David Brazdil0f672f62019-12-10 10:32:29 +00001264 var_size = 1 + nr_bank;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001265 } else {
1266 for_each_cpu_and(cpu, dest, cpu_online_mask) {
1267 params->int_target.vp_mask |=
1268 (1ULL << hv_cpu_number_to_vp_number(cpu));
1269 }
1270 }
1271
1272 res = hv_do_hypercall(HVCALL_RETARGET_INTERRUPT | (var_size << 17),
1273 params, NULL);
1274
1275exit_unlock:
1276 spin_unlock_irqrestore(&hbus->retarget_msi_interrupt_lock, flags);
1277
Olivier Deprez157378f2022-04-04 15:47:50 +02001278 /*
1279 * During hibernation, when a CPU is offlined, the kernel tries
1280 * to move the interrupt to the remaining CPUs that haven't
1281 * been offlined yet. In this case, the below hv_do_hypercall()
1282 * always fails since the vmbus channel has been closed:
1283 * refer to cpu_disable_common() -> fixup_irqs() ->
1284 * irq_migrate_all_off_this_cpu() -> migrate_one_irq().
1285 *
1286 * Suppress the error message for hibernation because the failure
1287 * during hibernation does not matter (at this time all the devices
1288 * have been frozen). Note: the correct affinity info is still updated
1289 * into the irqdata data structure in migrate_one_irq() ->
1290 * irq_do_set_affinity() -> hv_set_affinity(), so later when the VM
1291 * resumes, hv_pci_restore_msi_state() is able to correctly restore
1292 * the interrupt with the correct affinity.
1293 */
1294 if (res && hbus->state != hv_pcibus_removing)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001295 dev_err(&hbus->hdev->device,
1296 "%s() failed: %#llx", __func__, res);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001297
1298 pci_msi_unmask_irq(data);
1299}
1300
1301struct compose_comp_ctxt {
1302 struct hv_pci_compl comp_pkt;
1303 struct tran_int_desc int_desc;
1304};
1305
1306static void hv_pci_compose_compl(void *context, struct pci_response *resp,
1307 int resp_packet_size)
1308{
1309 struct compose_comp_ctxt *comp_pkt = context;
1310 struct pci_create_int_response *int_resp =
1311 (struct pci_create_int_response *)resp;
1312
1313 comp_pkt->comp_pkt.completion_status = resp->status;
1314 comp_pkt->int_desc = int_resp->int_desc;
1315 complete(&comp_pkt->comp_pkt.host_event);
1316}
1317
1318static u32 hv_compose_msi_req_v1(
1319 struct pci_create_interrupt *int_pkt, struct cpumask *affinity,
1320 u32 slot, u8 vector)
1321{
1322 int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE;
1323 int_pkt->wslot.slot = slot;
1324 int_pkt->int_desc.vector = vector;
1325 int_pkt->int_desc.vector_count = 1;
1326 int_pkt->int_desc.delivery_mode = dest_Fixed;
1327
1328 /*
1329 * Create MSI w/ dummy vCPU set, overwritten by subsequent retarget in
1330 * hv_irq_unmask().
1331 */
1332 int_pkt->int_desc.cpu_mask = CPU_AFFINITY_ALL;
1333
1334 return sizeof(*int_pkt);
1335}
1336
1337static u32 hv_compose_msi_req_v2(
1338 struct pci_create_interrupt2 *int_pkt, struct cpumask *affinity,
1339 u32 slot, u8 vector)
1340{
1341 int cpu;
1342
1343 int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE2;
1344 int_pkt->wslot.slot = slot;
1345 int_pkt->int_desc.vector = vector;
1346 int_pkt->int_desc.vector_count = 1;
1347 int_pkt->int_desc.delivery_mode = dest_Fixed;
1348
1349 /*
1350 * Create MSI w/ dummy vCPU set targeting just one vCPU, overwritten
1351 * by subsequent retarget in hv_irq_unmask().
1352 */
1353 cpu = cpumask_first_and(affinity, cpu_online_mask);
1354 int_pkt->int_desc.processor_array[0] =
1355 hv_cpu_number_to_vp_number(cpu);
1356 int_pkt->int_desc.processor_count = 1;
1357
1358 return sizeof(*int_pkt);
1359}
1360
1361/**
1362 * hv_compose_msi_msg() - Supplies a valid MSI address/data
1363 * @data: Everything about this MSI
1364 * @msg: Buffer that is filled in by this function
1365 *
1366 * This function unpacks the IRQ looking for target CPU set, IDT
1367 * vector and mode and sends a message to the parent partition
1368 * asking for a mapping for that tuple in this partition. The
1369 * response supplies a data value and address to which that data
1370 * should be written to trigger that interrupt.
1371 */
1372static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
1373{
1374 struct irq_cfg *cfg = irqd_cfg(data);
1375 struct hv_pcibus_device *hbus;
Olivier Deprez157378f2022-04-04 15:47:50 +02001376 struct vmbus_channel *channel;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001377 struct hv_pci_dev *hpdev;
1378 struct pci_bus *pbus;
1379 struct pci_dev *pdev;
1380 struct cpumask *dest;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001381 struct compose_comp_ctxt comp;
1382 struct tran_int_desc *int_desc;
1383 struct {
1384 struct pci_packet pci_pkt;
1385 union {
1386 struct pci_create_interrupt v1;
1387 struct pci_create_interrupt2 v2;
1388 } int_pkts;
1389 } __packed ctxt;
1390
1391 u32 size;
1392 int ret;
1393
1394 pdev = msi_desc_to_pci_dev(irq_data_get_msi_desc(data));
1395 dest = irq_data_get_effective_affinity_mask(data);
1396 pbus = pdev->bus;
1397 hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
Olivier Deprez157378f2022-04-04 15:47:50 +02001398 channel = hbus->hdev->channel;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001399 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1400 if (!hpdev)
1401 goto return_null_message;
1402
1403 /* Free any previous message that might have already been composed. */
1404 if (data->chip_data) {
1405 int_desc = data->chip_data;
1406 data->chip_data = NULL;
1407 hv_int_desc_free(hpdev, int_desc);
1408 }
1409
1410 int_desc = kzalloc(sizeof(*int_desc), GFP_ATOMIC);
1411 if (!int_desc)
1412 goto drop_reference;
1413
1414 memset(&ctxt, 0, sizeof(ctxt));
1415 init_completion(&comp.comp_pkt.host_event);
1416 ctxt.pci_pkt.completion_func = hv_pci_compose_compl;
1417 ctxt.pci_pkt.compl_ctxt = &comp;
1418
Olivier Deprez157378f2022-04-04 15:47:50 +02001419 switch (hbus->protocol_version) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001420 case PCI_PROTOCOL_VERSION_1_1:
1421 size = hv_compose_msi_req_v1(&ctxt.int_pkts.v1,
1422 dest,
1423 hpdev->desc.win_slot.slot,
1424 cfg->vector);
1425 break;
1426
1427 case PCI_PROTOCOL_VERSION_1_2:
Olivier Deprez157378f2022-04-04 15:47:50 +02001428 case PCI_PROTOCOL_VERSION_1_3:
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001429 size = hv_compose_msi_req_v2(&ctxt.int_pkts.v2,
1430 dest,
1431 hpdev->desc.win_slot.slot,
1432 cfg->vector);
1433 break;
1434
1435 default:
1436 /* As we only negotiate protocol versions known to this driver,
1437 * this path should never hit. However, this is it not a hot
1438 * path so we print a message to aid future updates.
1439 */
1440 dev_err(&hbus->hdev->device,
1441 "Unexpected vPCI protocol, update driver.");
1442 goto free_int_desc;
1443 }
1444
1445 ret = vmbus_sendpacket(hpdev->hbus->hdev->channel, &ctxt.int_pkts,
1446 size, (unsigned long)&ctxt.pci_pkt,
1447 VM_PKT_DATA_INBAND,
1448 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1449 if (ret) {
1450 dev_err(&hbus->hdev->device,
1451 "Sending request for interrupt failed: 0x%x",
1452 comp.comp_pkt.completion_status);
1453 goto free_int_desc;
1454 }
1455
1456 /*
Olivier Deprez157378f2022-04-04 15:47:50 +02001457 * Prevents hv_pci_onchannelcallback() from running concurrently
1458 * in the tasklet.
1459 */
1460 tasklet_disable(&channel->callback_event);
1461
1462 /*
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001463 * Since this function is called with IRQ locks held, can't
1464 * do normal wait for completion; instead poll.
1465 */
1466 while (!try_wait_for_completion(&comp.comp_pkt.host_event)) {
Olivier Deprez157378f2022-04-04 15:47:50 +02001467 unsigned long flags;
1468
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001469 /* 0xFFFF means an invalid PCI VENDOR ID. */
1470 if (hv_pcifront_get_vendor_id(hpdev) == 0xFFFF) {
1471 dev_err_once(&hbus->hdev->device,
1472 "the device has gone\n");
Olivier Deprez157378f2022-04-04 15:47:50 +02001473 goto enable_tasklet;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001474 }
1475
1476 /*
Olivier Deprez157378f2022-04-04 15:47:50 +02001477 * Make sure that the ring buffer data structure doesn't get
1478 * freed while we dereference the ring buffer pointer. Test
1479 * for the channel's onchannel_callback being NULL within a
1480 * sched_lock critical section. See also the inline comments
1481 * in vmbus_reset_channel_cb().
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001482 */
Olivier Deprez157378f2022-04-04 15:47:50 +02001483 spin_lock_irqsave(&channel->sched_lock, flags);
1484 if (unlikely(channel->onchannel_callback == NULL)) {
1485 spin_unlock_irqrestore(&channel->sched_lock, flags);
1486 goto enable_tasklet;
1487 }
1488 hv_pci_onchannelcallback(hbus);
1489 spin_unlock_irqrestore(&channel->sched_lock, flags);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001490
1491 if (hpdev->state == hv_pcichild_ejecting) {
1492 dev_err_once(&hbus->hdev->device,
1493 "the device is being ejected\n");
Olivier Deprez157378f2022-04-04 15:47:50 +02001494 goto enable_tasklet;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001495 }
1496
1497 udelay(100);
1498 }
1499
Olivier Deprez157378f2022-04-04 15:47:50 +02001500 tasklet_enable(&channel->callback_event);
1501
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001502 if (comp.comp_pkt.completion_status < 0) {
1503 dev_err(&hbus->hdev->device,
1504 "Request for interrupt failed: 0x%x",
1505 comp.comp_pkt.completion_status);
1506 goto free_int_desc;
1507 }
1508
1509 /*
1510 * Record the assignment so that this can be unwound later. Using
1511 * irq_set_chip_data() here would be appropriate, but the lock it takes
1512 * is already held.
1513 */
1514 *int_desc = comp.int_desc;
1515 data->chip_data = int_desc;
1516
1517 /* Pass up the result. */
1518 msg->address_hi = comp.int_desc.address >> 32;
1519 msg->address_lo = comp.int_desc.address & 0xffffffff;
1520 msg->data = comp.int_desc.data;
1521
1522 put_pcichild(hpdev);
1523 return;
1524
Olivier Deprez157378f2022-04-04 15:47:50 +02001525enable_tasklet:
1526 tasklet_enable(&channel->callback_event);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001527free_int_desc:
1528 kfree(int_desc);
1529drop_reference:
1530 put_pcichild(hpdev);
1531return_null_message:
1532 msg->address_hi = 0;
1533 msg->address_lo = 0;
1534 msg->data = 0;
1535}
1536
1537/* HW Interrupt Chip Descriptor */
1538static struct irq_chip hv_msi_irq_chip = {
1539 .name = "Hyper-V PCIe MSI",
1540 .irq_compose_msi_msg = hv_compose_msi_msg,
1541 .irq_set_affinity = hv_set_affinity,
1542 .irq_ack = irq_chip_ack_parent,
1543 .irq_mask = hv_irq_mask,
1544 .irq_unmask = hv_irq_unmask,
1545};
1546
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001547static struct msi_domain_ops hv_msi_ops = {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001548 .msi_prepare = pci_msi_prepare,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001549 .msi_free = hv_msi_free,
1550};
1551
1552/**
1553 * hv_pcie_init_irq_domain() - Initialize IRQ domain
1554 * @hbus: The root PCI bus
1555 *
1556 * This function creates an IRQ domain which will be used for
1557 * interrupts from devices that have been passed through. These
1558 * devices only support MSI and MSI-X, not line-based interrupts
1559 * or simulations of line-based interrupts through PCIe's
1560 * fabric-layer messages. Because interrupts are remapped, we
1561 * can support multi-message MSI here.
1562 *
1563 * Return: '0' on success and error value on failure
1564 */
1565static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus)
1566{
1567 hbus->msi_info.chip = &hv_msi_irq_chip;
1568 hbus->msi_info.ops = &hv_msi_ops;
1569 hbus->msi_info.flags = (MSI_FLAG_USE_DEF_DOM_OPS |
1570 MSI_FLAG_USE_DEF_CHIP_OPS | MSI_FLAG_MULTI_PCI_MSI |
1571 MSI_FLAG_PCI_MSIX);
1572 hbus->msi_info.handler = handle_edge_irq;
1573 hbus->msi_info.handler_name = "edge";
1574 hbus->msi_info.data = hbus;
1575 hbus->irq_domain = pci_msi_create_irq_domain(hbus->sysdata.fwnode,
1576 &hbus->msi_info,
1577 x86_vector_domain);
1578 if (!hbus->irq_domain) {
1579 dev_err(&hbus->hdev->device,
1580 "Failed to build an MSI IRQ domain\n");
1581 return -ENODEV;
1582 }
1583
1584 return 0;
1585}
1586
1587/**
1588 * get_bar_size() - Get the address space consumed by a BAR
1589 * @bar_val: Value that a BAR returned after -1 was written
1590 * to it.
1591 *
1592 * This function returns the size of the BAR, rounded up to 1
1593 * page. It has to be rounded up because the hypervisor's page
1594 * table entry that maps the BAR into the VM can't specify an
1595 * offset within a page. The invariant is that the hypervisor
1596 * must place any BARs of smaller than page length at the
1597 * beginning of a page.
1598 *
1599 * Return: Size in bytes of the consumed MMIO space.
1600 */
1601static u64 get_bar_size(u64 bar_val)
1602{
1603 return round_up((1 + ~(bar_val & PCI_BASE_ADDRESS_MEM_MASK)),
1604 PAGE_SIZE);
1605}
1606
1607/**
1608 * survey_child_resources() - Total all MMIO requirements
1609 * @hbus: Root PCI bus, as understood by this driver
1610 */
1611static void survey_child_resources(struct hv_pcibus_device *hbus)
1612{
1613 struct hv_pci_dev *hpdev;
1614 resource_size_t bar_size = 0;
1615 unsigned long flags;
1616 struct completion *event;
1617 u64 bar_val;
1618 int i;
1619
1620 /* If nobody is waiting on the answer, don't compute it. */
1621 event = xchg(&hbus->survey_event, NULL);
1622 if (!event)
1623 return;
1624
1625 /* If the answer has already been computed, go with it. */
1626 if (hbus->low_mmio_space || hbus->high_mmio_space) {
1627 complete(event);
1628 return;
1629 }
1630
1631 spin_lock_irqsave(&hbus->device_list_lock, flags);
1632
1633 /*
1634 * Due to an interesting quirk of the PCI spec, all memory regions
1635 * for a child device are a power of 2 in size and aligned in memory,
1636 * so it's sufficient to just add them up without tracking alignment.
1637 */
1638 list_for_each_entry(hpdev, &hbus->children, list_entry) {
Olivier Deprez157378f2022-04-04 15:47:50 +02001639 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001640 if (hpdev->probed_bar[i] & PCI_BASE_ADDRESS_SPACE_IO)
1641 dev_err(&hbus->hdev->device,
1642 "There's an I/O BAR in this list!\n");
1643
1644 if (hpdev->probed_bar[i] != 0) {
1645 /*
1646 * A probed BAR has all the upper bits set that
1647 * can be changed.
1648 */
1649
1650 bar_val = hpdev->probed_bar[i];
1651 if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1652 bar_val |=
1653 ((u64)hpdev->probed_bar[++i] << 32);
1654 else
1655 bar_val |= 0xffffffff00000000ULL;
1656
1657 bar_size = get_bar_size(bar_val);
1658
1659 if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1660 hbus->high_mmio_space += bar_size;
1661 else
1662 hbus->low_mmio_space += bar_size;
1663 }
1664 }
1665 }
1666
1667 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1668 complete(event);
1669}
1670
1671/**
1672 * prepopulate_bars() - Fill in BARs with defaults
1673 * @hbus: Root PCI bus, as understood by this driver
1674 *
1675 * The core PCI driver code seems much, much happier if the BARs
1676 * for a device have values upon first scan. So fill them in.
1677 * The algorithm below works down from large sizes to small,
1678 * attempting to pack the assignments optimally. The assumption,
1679 * enforced in other parts of the code, is that the beginning of
1680 * the memory-mapped I/O space will be aligned on the largest
1681 * BAR size.
1682 */
1683static void prepopulate_bars(struct hv_pcibus_device *hbus)
1684{
1685 resource_size_t high_size = 0;
1686 resource_size_t low_size = 0;
1687 resource_size_t high_base = 0;
1688 resource_size_t low_base = 0;
1689 resource_size_t bar_size;
1690 struct hv_pci_dev *hpdev;
1691 unsigned long flags;
1692 u64 bar_val;
1693 u32 command;
1694 bool high;
1695 int i;
1696
1697 if (hbus->low_mmio_space) {
1698 low_size = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
1699 low_base = hbus->low_mmio_res->start;
1700 }
1701
1702 if (hbus->high_mmio_space) {
1703 high_size = 1ULL <<
1704 (63 - __builtin_clzll(hbus->high_mmio_space));
1705 high_base = hbus->high_mmio_res->start;
1706 }
1707
1708 spin_lock_irqsave(&hbus->device_list_lock, flags);
1709
Olivier Deprez157378f2022-04-04 15:47:50 +02001710 /*
1711 * Clear the memory enable bit, in case it's already set. This occurs
1712 * in the suspend path of hibernation, where the device is suspended,
1713 * resumed and suspended again: see hibernation_snapshot() and
1714 * hibernation_platform_enter().
1715 *
1716 * If the memory enable bit is already set, Hyper-V sliently ignores
1717 * the below BAR updates, and the related PCI device driver can not
1718 * work, because reading from the device register(s) always returns
1719 * 0xFFFFFFFF.
1720 */
1721 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1722 _hv_pcifront_read_config(hpdev, PCI_COMMAND, 2, &command);
1723 command &= ~PCI_COMMAND_MEMORY;
1724 _hv_pcifront_write_config(hpdev, PCI_COMMAND, 2, command);
1725 }
1726
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001727 /* Pick addresses for the BARs. */
1728 do {
1729 list_for_each_entry(hpdev, &hbus->children, list_entry) {
Olivier Deprez157378f2022-04-04 15:47:50 +02001730 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001731 bar_val = hpdev->probed_bar[i];
1732 if (bar_val == 0)
1733 continue;
1734 high = bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64;
1735 if (high) {
1736 bar_val |=
1737 ((u64)hpdev->probed_bar[i + 1]
1738 << 32);
1739 } else {
1740 bar_val |= 0xffffffffULL << 32;
1741 }
1742 bar_size = get_bar_size(bar_val);
1743 if (high) {
1744 if (high_size != bar_size) {
1745 i++;
1746 continue;
1747 }
1748 _hv_pcifront_write_config(hpdev,
1749 PCI_BASE_ADDRESS_0 + (4 * i),
1750 4,
1751 (u32)(high_base & 0xffffff00));
1752 i++;
1753 _hv_pcifront_write_config(hpdev,
1754 PCI_BASE_ADDRESS_0 + (4 * i),
1755 4, (u32)(high_base >> 32));
1756 high_base += bar_size;
1757 } else {
1758 if (low_size != bar_size)
1759 continue;
1760 _hv_pcifront_write_config(hpdev,
1761 PCI_BASE_ADDRESS_0 + (4 * i),
1762 4,
1763 (u32)(low_base & 0xffffff00));
1764 low_base += bar_size;
1765 }
1766 }
1767 if (high_size <= 1 && low_size <= 1) {
1768 /* Set the memory enable bit. */
1769 _hv_pcifront_read_config(hpdev, PCI_COMMAND, 2,
1770 &command);
1771 command |= PCI_COMMAND_MEMORY;
1772 _hv_pcifront_write_config(hpdev, PCI_COMMAND, 2,
1773 command);
1774 break;
1775 }
1776 }
1777
1778 high_size >>= 1;
1779 low_size >>= 1;
1780 } while (high_size || low_size);
1781
1782 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1783}
1784
1785/*
1786 * Assign entries in sysfs pci slot directory.
1787 *
1788 * Note that this function does not need to lock the children list
1789 * because it is called from pci_devices_present_work which
1790 * is serialized with hv_eject_device_work because they are on the
1791 * same ordered workqueue. Therefore hbus->children list will not change
1792 * even when pci_create_slot sleeps.
1793 */
1794static void hv_pci_assign_slots(struct hv_pcibus_device *hbus)
1795{
1796 struct hv_pci_dev *hpdev;
1797 char name[SLOT_NAME_SIZE];
1798 int slot_nr;
1799
1800 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1801 if (hpdev->pci_slot)
1802 continue;
1803
1804 slot_nr = PCI_SLOT(wslot_to_devfn(hpdev->desc.win_slot.slot));
1805 snprintf(name, SLOT_NAME_SIZE, "%u", hpdev->desc.ser);
1806 hpdev->pci_slot = pci_create_slot(hbus->pci_bus, slot_nr,
1807 name, NULL);
1808 if (IS_ERR(hpdev->pci_slot)) {
1809 pr_warn("pci_create slot %s failed\n", name);
1810 hpdev->pci_slot = NULL;
1811 }
1812 }
1813}
1814
David Brazdil0f672f62019-12-10 10:32:29 +00001815/*
1816 * Remove entries in sysfs pci slot directory.
1817 */
1818static void hv_pci_remove_slots(struct hv_pcibus_device *hbus)
1819{
1820 struct hv_pci_dev *hpdev;
1821
1822 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1823 if (!hpdev->pci_slot)
1824 continue;
1825 pci_destroy_slot(hpdev->pci_slot);
1826 hpdev->pci_slot = NULL;
1827 }
1828}
1829
Olivier Deprez157378f2022-04-04 15:47:50 +02001830/*
1831 * Set NUMA node for the devices on the bus
1832 */
1833static void hv_pci_assign_numa_node(struct hv_pcibus_device *hbus)
1834{
1835 struct pci_dev *dev;
1836 struct pci_bus *bus = hbus->pci_bus;
1837 struct hv_pci_dev *hv_dev;
1838
1839 list_for_each_entry(dev, &bus->devices, bus_list) {
1840 hv_dev = get_pcichild_wslot(hbus, devfn_to_wslot(dev->devfn));
1841 if (!hv_dev)
1842 continue;
1843
1844 if (hv_dev->desc.flags & HV_PCI_DEVICE_FLAG_NUMA_AFFINITY &&
1845 hv_dev->desc.virtual_numa_node < num_possible_nodes())
1846 /*
1847 * The kernel may boot with some NUMA nodes offline
1848 * (e.g. in a KDUMP kernel) or with NUMA disabled via
1849 * "numa=off". In those cases, adjust the host provided
1850 * NUMA node to a valid NUMA node used by the kernel.
1851 */
1852 set_dev_node(&dev->dev,
1853 numa_map_to_online_node(
1854 hv_dev->desc.virtual_numa_node));
1855
1856 put_pcichild(hv_dev);
1857 }
1858}
1859
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001860/**
1861 * create_root_hv_pci_bus() - Expose a new root PCI bus
1862 * @hbus: Root PCI bus, as understood by this driver
1863 *
1864 * Return: 0 on success, -errno on failure
1865 */
1866static int create_root_hv_pci_bus(struct hv_pcibus_device *hbus)
1867{
1868 /* Register the device */
1869 hbus->pci_bus = pci_create_root_bus(&hbus->hdev->device,
1870 0, /* bus number is always zero */
1871 &hv_pcifront_ops,
1872 &hbus->sysdata,
1873 &hbus->resources_for_children);
1874 if (!hbus->pci_bus)
1875 return -ENODEV;
1876
1877 hbus->pci_bus->msi = &hbus->msi_chip;
1878 hbus->pci_bus->msi->dev = &hbus->hdev->device;
1879
1880 pci_lock_rescan_remove();
1881 pci_scan_child_bus(hbus->pci_bus);
Olivier Deprez157378f2022-04-04 15:47:50 +02001882 hv_pci_assign_numa_node(hbus);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001883 pci_bus_assign_resources(hbus->pci_bus);
1884 hv_pci_assign_slots(hbus);
1885 pci_bus_add_devices(hbus->pci_bus);
1886 pci_unlock_rescan_remove();
1887 hbus->state = hv_pcibus_installed;
1888 return 0;
1889}
1890
1891struct q_res_req_compl {
1892 struct completion host_event;
1893 struct hv_pci_dev *hpdev;
1894};
1895
1896/**
1897 * q_resource_requirements() - Query Resource Requirements
1898 * @context: The completion context.
1899 * @resp: The response that came from the host.
1900 * @resp_packet_size: The size in bytes of resp.
1901 *
1902 * This function is invoked on completion of a Query Resource
1903 * Requirements packet.
1904 */
1905static void q_resource_requirements(void *context, struct pci_response *resp,
1906 int resp_packet_size)
1907{
1908 struct q_res_req_compl *completion = context;
1909 struct pci_q_res_req_response *q_res_req =
1910 (struct pci_q_res_req_response *)resp;
1911 int i;
1912
1913 if (resp->status < 0) {
1914 dev_err(&completion->hpdev->hbus->hdev->device,
1915 "query resource requirements failed: %x\n",
1916 resp->status);
1917 } else {
Olivier Deprez157378f2022-04-04 15:47:50 +02001918 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001919 completion->hpdev->probed_bar[i] =
1920 q_res_req->probed_bar[i];
1921 }
1922 }
1923
1924 complete(&completion->host_event);
1925}
1926
1927/**
1928 * new_pcichild_device() - Create a new child device
1929 * @hbus: The internal struct tracking this root PCI bus.
1930 * @desc: The information supplied so far from the host
1931 * about the device.
1932 *
1933 * This function creates the tracking structure for a new child
1934 * device and kicks off the process of figuring out what it is.
1935 *
1936 * Return: Pointer to the new tracking struct
1937 */
1938static struct hv_pci_dev *new_pcichild_device(struct hv_pcibus_device *hbus,
Olivier Deprez157378f2022-04-04 15:47:50 +02001939 struct hv_pcidev_description *desc)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001940{
1941 struct hv_pci_dev *hpdev;
1942 struct pci_child_message *res_req;
1943 struct q_res_req_compl comp_pkt;
1944 struct {
1945 struct pci_packet init_packet;
1946 u8 buffer[sizeof(struct pci_child_message)];
1947 } pkt;
1948 unsigned long flags;
1949 int ret;
1950
1951 hpdev = kzalloc(sizeof(*hpdev), GFP_KERNEL);
1952 if (!hpdev)
1953 return NULL;
1954
1955 hpdev->hbus = hbus;
1956
1957 memset(&pkt, 0, sizeof(pkt));
1958 init_completion(&comp_pkt.host_event);
1959 comp_pkt.hpdev = hpdev;
1960 pkt.init_packet.compl_ctxt = &comp_pkt;
1961 pkt.init_packet.completion_func = q_resource_requirements;
1962 res_req = (struct pci_child_message *)&pkt.init_packet.message;
1963 res_req->message_type.type = PCI_QUERY_RESOURCE_REQUIREMENTS;
1964 res_req->wslot.slot = desc->win_slot.slot;
1965
1966 ret = vmbus_sendpacket(hbus->hdev->channel, res_req,
1967 sizeof(struct pci_child_message),
1968 (unsigned long)&pkt.init_packet,
1969 VM_PKT_DATA_INBAND,
1970 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1971 if (ret)
1972 goto error;
1973
1974 if (wait_for_response(hbus->hdev, &comp_pkt.host_event))
1975 goto error;
1976
1977 hpdev->desc = *desc;
1978 refcount_set(&hpdev->refs, 1);
1979 get_pcichild(hpdev);
1980 spin_lock_irqsave(&hbus->device_list_lock, flags);
1981
1982 list_add_tail(&hpdev->list_entry, &hbus->children);
1983 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1984 return hpdev;
1985
1986error:
1987 kfree(hpdev);
1988 return NULL;
1989}
1990
1991/**
1992 * get_pcichild_wslot() - Find device from slot
1993 * @hbus: Root PCI bus, as understood by this driver
1994 * @wslot: Location on the bus
1995 *
1996 * This function looks up a PCI device and returns the internal
1997 * representation of it. It acquires a reference on it, so that
1998 * the device won't be deleted while somebody is using it. The
1999 * caller is responsible for calling put_pcichild() to release
2000 * this reference.
2001 *
2002 * Return: Internal representation of a PCI device
2003 */
2004static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
2005 u32 wslot)
2006{
2007 unsigned long flags;
2008 struct hv_pci_dev *iter, *hpdev = NULL;
2009
2010 spin_lock_irqsave(&hbus->device_list_lock, flags);
2011 list_for_each_entry(iter, &hbus->children, list_entry) {
2012 if (iter->desc.win_slot.slot == wslot) {
2013 hpdev = iter;
2014 get_pcichild(hpdev);
2015 break;
2016 }
2017 }
2018 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2019
2020 return hpdev;
2021}
2022
2023/**
2024 * pci_devices_present_work() - Handle new list of child devices
2025 * @work: Work struct embedded in struct hv_dr_work
2026 *
2027 * "Bus Relations" is the Windows term for "children of this
2028 * bus." The terminology is preserved here for people trying to
2029 * debug the interaction between Hyper-V and Linux. This
2030 * function is called when the parent partition reports a list
2031 * of functions that should be observed under this PCI Express
2032 * port (bus).
2033 *
2034 * This function updates the list, and must tolerate being
2035 * called multiple times with the same information. The typical
2036 * number of child devices is one, with very atypical cases
2037 * involving three or four, so the algorithms used here can be
2038 * simple and inefficient.
2039 *
2040 * It must also treat the omission of a previously observed device as
2041 * notification that the device no longer exists.
2042 *
2043 * Note that this function is serialized with hv_eject_device_work(),
2044 * because both are pushed to the ordered workqueue hbus->wq.
2045 */
2046static void pci_devices_present_work(struct work_struct *work)
2047{
2048 u32 child_no;
2049 bool found;
Olivier Deprez157378f2022-04-04 15:47:50 +02002050 struct hv_pcidev_description *new_desc;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002051 struct hv_pci_dev *hpdev;
2052 struct hv_pcibus_device *hbus;
2053 struct list_head removed;
2054 struct hv_dr_work *dr_wrk;
2055 struct hv_dr_state *dr = NULL;
2056 unsigned long flags;
2057
2058 dr_wrk = container_of(work, struct hv_dr_work, wrk);
2059 hbus = dr_wrk->bus;
2060 kfree(dr_wrk);
2061
2062 INIT_LIST_HEAD(&removed);
2063
2064 /* Pull this off the queue and process it if it was the last one. */
2065 spin_lock_irqsave(&hbus->device_list_lock, flags);
2066 while (!list_empty(&hbus->dr_list)) {
2067 dr = list_first_entry(&hbus->dr_list, struct hv_dr_state,
2068 list_entry);
2069 list_del(&dr->list_entry);
2070
2071 /* Throw this away if the list still has stuff in it. */
2072 if (!list_empty(&hbus->dr_list)) {
2073 kfree(dr);
2074 continue;
2075 }
2076 }
2077 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2078
2079 if (!dr) {
2080 put_hvpcibus(hbus);
2081 return;
2082 }
2083
2084 /* First, mark all existing children as reported missing. */
2085 spin_lock_irqsave(&hbus->device_list_lock, flags);
2086 list_for_each_entry(hpdev, &hbus->children, list_entry) {
2087 hpdev->reported_missing = true;
2088 }
2089 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2090
2091 /* Next, add back any reported devices. */
2092 for (child_no = 0; child_no < dr->device_count; child_no++) {
2093 found = false;
2094 new_desc = &dr->func[child_no];
2095
2096 spin_lock_irqsave(&hbus->device_list_lock, flags);
2097 list_for_each_entry(hpdev, &hbus->children, list_entry) {
2098 if ((hpdev->desc.win_slot.slot == new_desc->win_slot.slot) &&
2099 (hpdev->desc.v_id == new_desc->v_id) &&
2100 (hpdev->desc.d_id == new_desc->d_id) &&
2101 (hpdev->desc.ser == new_desc->ser)) {
2102 hpdev->reported_missing = false;
2103 found = true;
2104 }
2105 }
2106 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2107
2108 if (!found) {
2109 hpdev = new_pcichild_device(hbus, new_desc);
2110 if (!hpdev)
2111 dev_err(&hbus->hdev->device,
2112 "couldn't record a child device.\n");
2113 }
2114 }
2115
2116 /* Move missing children to a list on the stack. */
2117 spin_lock_irqsave(&hbus->device_list_lock, flags);
2118 do {
2119 found = false;
2120 list_for_each_entry(hpdev, &hbus->children, list_entry) {
2121 if (hpdev->reported_missing) {
2122 found = true;
2123 put_pcichild(hpdev);
2124 list_move_tail(&hpdev->list_entry, &removed);
2125 break;
2126 }
2127 }
2128 } while (found);
2129 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2130
2131 /* Delete everything that should no longer exist. */
2132 while (!list_empty(&removed)) {
2133 hpdev = list_first_entry(&removed, struct hv_pci_dev,
2134 list_entry);
2135 list_del(&hpdev->list_entry);
David Brazdil0f672f62019-12-10 10:32:29 +00002136
2137 if (hpdev->pci_slot)
2138 pci_destroy_slot(hpdev->pci_slot);
2139
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002140 put_pcichild(hpdev);
2141 }
2142
2143 switch (hbus->state) {
2144 case hv_pcibus_installed:
2145 /*
2146 * Tell the core to rescan bus
2147 * because there may have been changes.
2148 */
2149 pci_lock_rescan_remove();
2150 pci_scan_child_bus(hbus->pci_bus);
Olivier Deprez157378f2022-04-04 15:47:50 +02002151 hv_pci_assign_numa_node(hbus);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002152 hv_pci_assign_slots(hbus);
2153 pci_unlock_rescan_remove();
2154 break;
2155
2156 case hv_pcibus_init:
2157 case hv_pcibus_probed:
2158 survey_child_resources(hbus);
2159 break;
2160
2161 default:
2162 break;
2163 }
2164
2165 put_hvpcibus(hbus);
2166 kfree(dr);
2167}
2168
2169/**
Olivier Deprez157378f2022-04-04 15:47:50 +02002170 * hv_pci_start_relations_work() - Queue work to start device discovery
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002171 * @hbus: Root PCI bus, as understood by this driver
Olivier Deprez157378f2022-04-04 15:47:50 +02002172 * @dr: The list of children returned from host
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002173 *
Olivier Deprez157378f2022-04-04 15:47:50 +02002174 * Return: 0 on success, -errno on failure
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002175 */
Olivier Deprez157378f2022-04-04 15:47:50 +02002176static int hv_pci_start_relations_work(struct hv_pcibus_device *hbus,
2177 struct hv_dr_state *dr)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002178{
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002179 struct hv_dr_work *dr_wrk;
2180 unsigned long flags;
2181 bool pending_dr;
2182
Olivier Deprez157378f2022-04-04 15:47:50 +02002183 if (hbus->state == hv_pcibus_removing) {
2184 dev_info(&hbus->hdev->device,
2185 "PCI VMBus BUS_RELATIONS: ignored\n");
2186 return -ENOENT;
2187 }
2188
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002189 dr_wrk = kzalloc(sizeof(*dr_wrk), GFP_NOWAIT);
2190 if (!dr_wrk)
Olivier Deprez157378f2022-04-04 15:47:50 +02002191 return -ENOMEM;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002192
2193 INIT_WORK(&dr_wrk->wrk, pci_devices_present_work);
2194 dr_wrk->bus = hbus;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002195
2196 spin_lock_irqsave(&hbus->device_list_lock, flags);
2197 /*
2198 * If pending_dr is true, we have already queued a work,
2199 * which will see the new dr. Otherwise, we need to
2200 * queue a new work.
2201 */
2202 pending_dr = !list_empty(&hbus->dr_list);
2203 list_add_tail(&dr->list_entry, &hbus->dr_list);
2204 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2205
2206 if (pending_dr) {
2207 kfree(dr_wrk);
2208 } else {
2209 get_hvpcibus(hbus);
2210 queue_work(hbus->wq, &dr_wrk->wrk);
2211 }
Olivier Deprez157378f2022-04-04 15:47:50 +02002212
2213 return 0;
2214}
2215
2216/**
2217 * hv_pci_devices_present() - Handle list of new children
2218 * @hbus: Root PCI bus, as understood by this driver
2219 * @relations: Packet from host listing children
2220 *
2221 * Process a new list of devices on the bus. The list of devices is
2222 * discovered by VSP and sent to us via VSP message PCI_BUS_RELATIONS,
2223 * whenever a new list of devices for this bus appears.
2224 */
2225static void hv_pci_devices_present(struct hv_pcibus_device *hbus,
2226 struct pci_bus_relations *relations)
2227{
2228 struct hv_dr_state *dr;
2229 int i;
2230
2231 dr = kzalloc(struct_size(dr, func, relations->device_count),
2232 GFP_NOWAIT);
2233 if (!dr)
2234 return;
2235
2236 dr->device_count = relations->device_count;
2237 for (i = 0; i < dr->device_count; i++) {
2238 dr->func[i].v_id = relations->func[i].v_id;
2239 dr->func[i].d_id = relations->func[i].d_id;
2240 dr->func[i].rev = relations->func[i].rev;
2241 dr->func[i].prog_intf = relations->func[i].prog_intf;
2242 dr->func[i].subclass = relations->func[i].subclass;
2243 dr->func[i].base_class = relations->func[i].base_class;
2244 dr->func[i].subsystem_id = relations->func[i].subsystem_id;
2245 dr->func[i].win_slot = relations->func[i].win_slot;
2246 dr->func[i].ser = relations->func[i].ser;
2247 }
2248
2249 if (hv_pci_start_relations_work(hbus, dr))
2250 kfree(dr);
2251}
2252
2253/**
2254 * hv_pci_devices_present2() - Handle list of new children
2255 * @hbus: Root PCI bus, as understood by this driver
2256 * @relations: Packet from host listing children
2257 *
2258 * This function is the v2 version of hv_pci_devices_present()
2259 */
2260static void hv_pci_devices_present2(struct hv_pcibus_device *hbus,
2261 struct pci_bus_relations2 *relations)
2262{
2263 struct hv_dr_state *dr;
2264 int i;
2265
2266 dr = kzalloc(struct_size(dr, func, relations->device_count),
2267 GFP_NOWAIT);
2268 if (!dr)
2269 return;
2270
2271 dr->device_count = relations->device_count;
2272 for (i = 0; i < dr->device_count; i++) {
2273 dr->func[i].v_id = relations->func[i].v_id;
2274 dr->func[i].d_id = relations->func[i].d_id;
2275 dr->func[i].rev = relations->func[i].rev;
2276 dr->func[i].prog_intf = relations->func[i].prog_intf;
2277 dr->func[i].subclass = relations->func[i].subclass;
2278 dr->func[i].base_class = relations->func[i].base_class;
2279 dr->func[i].subsystem_id = relations->func[i].subsystem_id;
2280 dr->func[i].win_slot = relations->func[i].win_slot;
2281 dr->func[i].ser = relations->func[i].ser;
2282 dr->func[i].flags = relations->func[i].flags;
2283 dr->func[i].virtual_numa_node =
2284 relations->func[i].virtual_numa_node;
2285 }
2286
2287 if (hv_pci_start_relations_work(hbus, dr))
2288 kfree(dr);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002289}
2290
2291/**
2292 * hv_eject_device_work() - Asynchronously handles ejection
2293 * @work: Work struct embedded in internal device struct
2294 *
2295 * This function handles ejecting a device. Windows will
2296 * attempt to gracefully eject a device, waiting 60 seconds to
2297 * hear back from the guest OS that this completed successfully.
2298 * If this timer expires, the device will be forcibly removed.
2299 */
2300static void hv_eject_device_work(struct work_struct *work)
2301{
2302 struct pci_eject_response *ejct_pkt;
David Brazdil0f672f62019-12-10 10:32:29 +00002303 struct hv_pcibus_device *hbus;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002304 struct hv_pci_dev *hpdev;
2305 struct pci_dev *pdev;
2306 unsigned long flags;
2307 int wslot;
2308 struct {
2309 struct pci_packet pkt;
2310 u8 buffer[sizeof(struct pci_eject_response)];
2311 } ctxt;
2312
2313 hpdev = container_of(work, struct hv_pci_dev, wrk);
David Brazdil0f672f62019-12-10 10:32:29 +00002314 hbus = hpdev->hbus;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002315
2316 WARN_ON(hpdev->state != hv_pcichild_ejecting);
2317
2318 /*
2319 * Ejection can come before or after the PCI bus has been set up, so
2320 * attempt to find it and tear down the bus state, if it exists. This
2321 * must be done without constructs like pci_domain_nr(hbus->pci_bus)
2322 * because hbus->pci_bus may not exist yet.
2323 */
2324 wslot = wslot_to_devfn(hpdev->desc.win_slot.slot);
David Brazdil0f672f62019-12-10 10:32:29 +00002325 pdev = pci_get_domain_bus_and_slot(hbus->sysdata.domain, 0, wslot);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002326 if (pdev) {
2327 pci_lock_rescan_remove();
2328 pci_stop_and_remove_bus_device(pdev);
2329 pci_dev_put(pdev);
2330 pci_unlock_rescan_remove();
2331 }
2332
David Brazdil0f672f62019-12-10 10:32:29 +00002333 spin_lock_irqsave(&hbus->device_list_lock, flags);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002334 list_del(&hpdev->list_entry);
David Brazdil0f672f62019-12-10 10:32:29 +00002335 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002336
2337 if (hpdev->pci_slot)
2338 pci_destroy_slot(hpdev->pci_slot);
2339
2340 memset(&ctxt, 0, sizeof(ctxt));
2341 ejct_pkt = (struct pci_eject_response *)&ctxt.pkt.message;
2342 ejct_pkt->message_type.type = PCI_EJECTION_COMPLETE;
2343 ejct_pkt->wslot.slot = hpdev->desc.win_slot.slot;
David Brazdil0f672f62019-12-10 10:32:29 +00002344 vmbus_sendpacket(hbus->hdev->channel, ejct_pkt,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002345 sizeof(*ejct_pkt), (unsigned long)&ctxt.pkt,
2346 VM_PKT_DATA_INBAND, 0);
2347
David Brazdil0f672f62019-12-10 10:32:29 +00002348 /* For the get_pcichild() in hv_pci_eject_device() */
2349 put_pcichild(hpdev);
2350 /* For the two refs got in new_pcichild_device() */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002351 put_pcichild(hpdev);
2352 put_pcichild(hpdev);
David Brazdil0f672f62019-12-10 10:32:29 +00002353 /* hpdev has been freed. Do not use it any more. */
2354
2355 put_hvpcibus(hbus);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002356}
2357
2358/**
2359 * hv_pci_eject_device() - Handles device ejection
2360 * @hpdev: Internal device tracking struct
2361 *
2362 * This function is invoked when an ejection packet arrives. It
2363 * just schedules work so that we don't re-enter the packet
2364 * delivery code handling the ejection.
2365 */
2366static void hv_pci_eject_device(struct hv_pci_dev *hpdev)
2367{
Olivier Deprez157378f2022-04-04 15:47:50 +02002368 struct hv_pcibus_device *hbus = hpdev->hbus;
2369 struct hv_device *hdev = hbus->hdev;
2370
2371 if (hbus->state == hv_pcibus_removing) {
2372 dev_info(&hdev->device, "PCI VMBus EJECT: ignored\n");
2373 return;
2374 }
2375
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002376 hpdev->state = hv_pcichild_ejecting;
2377 get_pcichild(hpdev);
2378 INIT_WORK(&hpdev->wrk, hv_eject_device_work);
Olivier Deprez157378f2022-04-04 15:47:50 +02002379 get_hvpcibus(hbus);
2380 queue_work(hbus->wq, &hpdev->wrk);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002381}
2382
2383/**
2384 * hv_pci_onchannelcallback() - Handles incoming packets
2385 * @context: Internal bus tracking struct
2386 *
2387 * This function is invoked whenever the host sends a packet to
2388 * this channel (which is private to this root PCI bus).
2389 */
2390static void hv_pci_onchannelcallback(void *context)
2391{
2392 const int packet_size = 0x100;
2393 int ret;
2394 struct hv_pcibus_device *hbus = context;
2395 u32 bytes_recvd;
2396 u64 req_id;
2397 struct vmpacket_descriptor *desc;
2398 unsigned char *buffer;
2399 int bufferlen = packet_size;
2400 struct pci_packet *comp_packet;
2401 struct pci_response *response;
2402 struct pci_incoming_message *new_message;
2403 struct pci_bus_relations *bus_rel;
Olivier Deprez157378f2022-04-04 15:47:50 +02002404 struct pci_bus_relations2 *bus_rel2;
David Brazdil0f672f62019-12-10 10:32:29 +00002405 struct pci_dev_inval_block *inval;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002406 struct pci_dev_incoming *dev_message;
2407 struct hv_pci_dev *hpdev;
2408
2409 buffer = kmalloc(bufferlen, GFP_ATOMIC);
2410 if (!buffer)
2411 return;
2412
2413 while (1) {
2414 ret = vmbus_recvpacket_raw(hbus->hdev->channel, buffer,
2415 bufferlen, &bytes_recvd, &req_id);
2416
2417 if (ret == -ENOBUFS) {
2418 kfree(buffer);
2419 /* Handle large packet */
2420 bufferlen = bytes_recvd;
2421 buffer = kmalloc(bytes_recvd, GFP_ATOMIC);
2422 if (!buffer)
2423 return;
2424 continue;
2425 }
2426
2427 /* Zero length indicates there are no more packets. */
2428 if (ret || !bytes_recvd)
2429 break;
2430
2431 /*
2432 * All incoming packets must be at least as large as a
2433 * response.
2434 */
2435 if (bytes_recvd <= sizeof(struct pci_response))
2436 continue;
2437 desc = (struct vmpacket_descriptor *)buffer;
2438
2439 switch (desc->type) {
2440 case VM_PKT_COMP:
2441
2442 /*
2443 * The host is trusted, and thus it's safe to interpret
2444 * this transaction ID as a pointer.
2445 */
2446 comp_packet = (struct pci_packet *)req_id;
2447 response = (struct pci_response *)buffer;
2448 comp_packet->completion_func(comp_packet->compl_ctxt,
2449 response,
2450 bytes_recvd);
2451 break;
2452
2453 case VM_PKT_DATA_INBAND:
2454
2455 new_message = (struct pci_incoming_message *)buffer;
2456 switch (new_message->message_type.type) {
2457 case PCI_BUS_RELATIONS:
2458
2459 bus_rel = (struct pci_bus_relations *)buffer;
2460 if (bytes_recvd <
Olivier Deprez157378f2022-04-04 15:47:50 +02002461 struct_size(bus_rel, func,
2462 bus_rel->device_count)) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002463 dev_err(&hbus->hdev->device,
2464 "bus relations too small\n");
2465 break;
2466 }
2467
2468 hv_pci_devices_present(hbus, bus_rel);
2469 break;
2470
Olivier Deprez157378f2022-04-04 15:47:50 +02002471 case PCI_BUS_RELATIONS2:
2472
2473 bus_rel2 = (struct pci_bus_relations2 *)buffer;
2474 if (bytes_recvd <
2475 struct_size(bus_rel2, func,
2476 bus_rel2->device_count)) {
2477 dev_err(&hbus->hdev->device,
2478 "bus relations v2 too small\n");
2479 break;
2480 }
2481
2482 hv_pci_devices_present2(hbus, bus_rel2);
2483 break;
2484
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002485 case PCI_EJECT:
2486
2487 dev_message = (struct pci_dev_incoming *)buffer;
2488 hpdev = get_pcichild_wslot(hbus,
2489 dev_message->wslot.slot);
2490 if (hpdev) {
2491 hv_pci_eject_device(hpdev);
2492 put_pcichild(hpdev);
2493 }
2494 break;
2495
David Brazdil0f672f62019-12-10 10:32:29 +00002496 case PCI_INVALIDATE_BLOCK:
2497
2498 inval = (struct pci_dev_inval_block *)buffer;
2499 hpdev = get_pcichild_wslot(hbus,
2500 inval->wslot.slot);
2501 if (hpdev) {
2502 if (hpdev->block_invalidate) {
2503 hpdev->block_invalidate(
2504 hpdev->invalidate_context,
2505 inval->block_mask);
2506 }
2507 put_pcichild(hpdev);
2508 }
2509 break;
2510
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002511 default:
2512 dev_warn(&hbus->hdev->device,
2513 "Unimplemented protocol message %x\n",
2514 new_message->message_type.type);
2515 break;
2516 }
2517 break;
2518
2519 default:
2520 dev_err(&hbus->hdev->device,
2521 "unhandled packet type %d, tid %llx len %d\n",
2522 desc->type, req_id, bytes_recvd);
2523 break;
2524 }
2525 }
2526
2527 kfree(buffer);
2528}
2529
2530/**
2531 * hv_pci_protocol_negotiation() - Set up protocol
Olivier Deprez157378f2022-04-04 15:47:50 +02002532 * @hdev: VMBus's tracking struct for this root PCI bus.
2533 * @version: Array of supported channel protocol versions in
2534 * the order of probing - highest go first.
2535 * @num_version: Number of elements in the version array.
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002536 *
2537 * This driver is intended to support running on Windows 10
2538 * (server) and later versions. It will not run on earlier
2539 * versions, as they assume that many of the operations which
2540 * Linux needs accomplished with a spinlock held were done via
2541 * asynchronous messaging via VMBus. Windows 10 increases the
2542 * surface area of PCI emulation so that these actions can take
2543 * place by suspending a virtual processor for their duration.
2544 *
2545 * This function negotiates the channel protocol version,
2546 * failing if the host doesn't support the necessary protocol
2547 * level.
2548 */
Olivier Deprez157378f2022-04-04 15:47:50 +02002549static int hv_pci_protocol_negotiation(struct hv_device *hdev,
2550 enum pci_protocol_version_t version[],
2551 int num_version)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002552{
Olivier Deprez157378f2022-04-04 15:47:50 +02002553 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002554 struct pci_version_request *version_req;
2555 struct hv_pci_compl comp_pkt;
2556 struct pci_packet *pkt;
2557 int ret;
2558 int i;
2559
2560 /*
2561 * Initiate the handshake with the host and negotiate
2562 * a version that the host can support. We start with the
2563 * highest version number and go down if the host cannot
2564 * support it.
2565 */
2566 pkt = kzalloc(sizeof(*pkt) + sizeof(*version_req), GFP_KERNEL);
2567 if (!pkt)
2568 return -ENOMEM;
2569
2570 init_completion(&comp_pkt.host_event);
2571 pkt->completion_func = hv_pci_generic_compl;
2572 pkt->compl_ctxt = &comp_pkt;
2573 version_req = (struct pci_version_request *)&pkt->message;
2574 version_req->message_type.type = PCI_QUERY_PROTOCOL_VERSION;
2575
Olivier Deprez157378f2022-04-04 15:47:50 +02002576 for (i = 0; i < num_version; i++) {
2577 version_req->protocol_version = version[i];
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002578 ret = vmbus_sendpacket(hdev->channel, version_req,
2579 sizeof(struct pci_version_request),
2580 (unsigned long)pkt, VM_PKT_DATA_INBAND,
2581 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2582 if (!ret)
2583 ret = wait_for_response(hdev, &comp_pkt.host_event);
2584
2585 if (ret) {
2586 dev_err(&hdev->device,
2587 "PCI Pass-through VSP failed to request version: %d",
2588 ret);
2589 goto exit;
2590 }
2591
2592 if (comp_pkt.completion_status >= 0) {
Olivier Deprez157378f2022-04-04 15:47:50 +02002593 hbus->protocol_version = version[i];
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002594 dev_info(&hdev->device,
2595 "PCI VMBus probing: Using version %#x\n",
Olivier Deprez157378f2022-04-04 15:47:50 +02002596 hbus->protocol_version);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002597 goto exit;
2598 }
2599
2600 if (comp_pkt.completion_status != STATUS_REVISION_MISMATCH) {
2601 dev_err(&hdev->device,
2602 "PCI Pass-through VSP failed version request: %#x",
2603 comp_pkt.completion_status);
2604 ret = -EPROTO;
2605 goto exit;
2606 }
2607
2608 reinit_completion(&comp_pkt.host_event);
2609 }
2610
2611 dev_err(&hdev->device,
2612 "PCI pass-through VSP failed to find supported version");
2613 ret = -EPROTO;
2614
2615exit:
2616 kfree(pkt);
2617 return ret;
2618}
2619
2620/**
2621 * hv_pci_free_bridge_windows() - Release memory regions for the
2622 * bus
2623 * @hbus: Root PCI bus, as understood by this driver
2624 */
2625static void hv_pci_free_bridge_windows(struct hv_pcibus_device *hbus)
2626{
2627 /*
2628 * Set the resources back to the way they looked when they
2629 * were allocated by setting IORESOURCE_BUSY again.
2630 */
2631
2632 if (hbus->low_mmio_space && hbus->low_mmio_res) {
2633 hbus->low_mmio_res->flags |= IORESOURCE_BUSY;
2634 vmbus_free_mmio(hbus->low_mmio_res->start,
2635 resource_size(hbus->low_mmio_res));
2636 }
2637
2638 if (hbus->high_mmio_space && hbus->high_mmio_res) {
2639 hbus->high_mmio_res->flags |= IORESOURCE_BUSY;
2640 vmbus_free_mmio(hbus->high_mmio_res->start,
2641 resource_size(hbus->high_mmio_res));
2642 }
2643}
2644
2645/**
2646 * hv_pci_allocate_bridge_windows() - Allocate memory regions
2647 * for the bus
2648 * @hbus: Root PCI bus, as understood by this driver
2649 *
2650 * This function calls vmbus_allocate_mmio(), which is itself a
2651 * bit of a compromise. Ideally, we might change the pnp layer
2652 * in the kernel such that it comprehends either PCI devices
2653 * which are "grandchildren of ACPI," with some intermediate bus
2654 * node (in this case, VMBus) or change it such that it
2655 * understands VMBus. The pnp layer, however, has been declared
2656 * deprecated, and not subject to change.
2657 *
2658 * The workaround, implemented here, is to ask VMBus to allocate
2659 * MMIO space for this bus. VMBus itself knows which ranges are
2660 * appropriate by looking at its own ACPI objects. Then, after
2661 * these ranges are claimed, they're modified to look like they
2662 * would have looked if the ACPI and pnp code had allocated
2663 * bridge windows. These descriptors have to exist in this form
2664 * in order to satisfy the code which will get invoked when the
2665 * endpoint PCI function driver calls request_mem_region() or
2666 * request_mem_region_exclusive().
2667 *
2668 * Return: 0 on success, -errno on failure
2669 */
2670static int hv_pci_allocate_bridge_windows(struct hv_pcibus_device *hbus)
2671{
2672 resource_size_t align;
2673 int ret;
2674
2675 if (hbus->low_mmio_space) {
2676 align = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
2677 ret = vmbus_allocate_mmio(&hbus->low_mmio_res, hbus->hdev, 0,
2678 (u64)(u32)0xffffffff,
2679 hbus->low_mmio_space,
2680 align, false);
2681 if (ret) {
2682 dev_err(&hbus->hdev->device,
2683 "Need %#llx of low MMIO space. Consider reconfiguring the VM.\n",
2684 hbus->low_mmio_space);
2685 return ret;
2686 }
2687
2688 /* Modify this resource to become a bridge window. */
2689 hbus->low_mmio_res->flags |= IORESOURCE_WINDOW;
2690 hbus->low_mmio_res->flags &= ~IORESOURCE_BUSY;
2691 pci_add_resource(&hbus->resources_for_children,
2692 hbus->low_mmio_res);
2693 }
2694
2695 if (hbus->high_mmio_space) {
2696 align = 1ULL << (63 - __builtin_clzll(hbus->high_mmio_space));
2697 ret = vmbus_allocate_mmio(&hbus->high_mmio_res, hbus->hdev,
2698 0x100000000, -1,
2699 hbus->high_mmio_space, align,
2700 false);
2701 if (ret) {
2702 dev_err(&hbus->hdev->device,
2703 "Need %#llx of high MMIO space. Consider reconfiguring the VM.\n",
2704 hbus->high_mmio_space);
2705 goto release_low_mmio;
2706 }
2707
2708 /* Modify this resource to become a bridge window. */
2709 hbus->high_mmio_res->flags |= IORESOURCE_WINDOW;
2710 hbus->high_mmio_res->flags &= ~IORESOURCE_BUSY;
2711 pci_add_resource(&hbus->resources_for_children,
2712 hbus->high_mmio_res);
2713 }
2714
2715 return 0;
2716
2717release_low_mmio:
2718 if (hbus->low_mmio_res) {
2719 vmbus_free_mmio(hbus->low_mmio_res->start,
2720 resource_size(hbus->low_mmio_res));
2721 }
2722
2723 return ret;
2724}
2725
2726/**
2727 * hv_allocate_config_window() - Find MMIO space for PCI Config
2728 * @hbus: Root PCI bus, as understood by this driver
2729 *
2730 * This function claims memory-mapped I/O space for accessing
2731 * configuration space for the functions on this bus.
2732 *
2733 * Return: 0 on success, -errno on failure
2734 */
2735static int hv_allocate_config_window(struct hv_pcibus_device *hbus)
2736{
2737 int ret;
2738
2739 /*
2740 * Set up a region of MMIO space to use for accessing configuration
2741 * space.
2742 */
2743 ret = vmbus_allocate_mmio(&hbus->mem_config, hbus->hdev, 0, -1,
2744 PCI_CONFIG_MMIO_LENGTH, 0x1000, false);
2745 if (ret)
2746 return ret;
2747
2748 /*
2749 * vmbus_allocate_mmio() gets used for allocating both device endpoint
2750 * resource claims (those which cannot be overlapped) and the ranges
2751 * which are valid for the children of this bus, which are intended
2752 * to be overlapped by those children. Set the flag on this claim
2753 * meaning that this region can't be overlapped.
2754 */
2755
2756 hbus->mem_config->flags |= IORESOURCE_BUSY;
2757
2758 return 0;
2759}
2760
2761static void hv_free_config_window(struct hv_pcibus_device *hbus)
2762{
2763 vmbus_free_mmio(hbus->mem_config->start, PCI_CONFIG_MMIO_LENGTH);
2764}
2765
Olivier Deprez157378f2022-04-04 15:47:50 +02002766static int hv_pci_bus_exit(struct hv_device *hdev, bool keep_devs);
2767
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002768/**
2769 * hv_pci_enter_d0() - Bring the "bus" into the D0 power state
2770 * @hdev: VMBus's tracking struct for this root PCI bus
2771 *
2772 * Return: 0 on success, -errno on failure
2773 */
2774static int hv_pci_enter_d0(struct hv_device *hdev)
2775{
2776 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2777 struct pci_bus_d0_entry *d0_entry;
2778 struct hv_pci_compl comp_pkt;
2779 struct pci_packet *pkt;
2780 int ret;
2781
2782 /*
2783 * Tell the host that the bus is ready to use, and moved into the
2784 * powered-on state. This includes telling the host which region
2785 * of memory-mapped I/O space has been chosen for configuration space
2786 * access.
2787 */
2788 pkt = kzalloc(sizeof(*pkt) + sizeof(*d0_entry), GFP_KERNEL);
2789 if (!pkt)
2790 return -ENOMEM;
2791
2792 init_completion(&comp_pkt.host_event);
2793 pkt->completion_func = hv_pci_generic_compl;
2794 pkt->compl_ctxt = &comp_pkt;
2795 d0_entry = (struct pci_bus_d0_entry *)&pkt->message;
2796 d0_entry->message_type.type = PCI_BUS_D0ENTRY;
2797 d0_entry->mmio_base = hbus->mem_config->start;
2798
2799 ret = vmbus_sendpacket(hdev->channel, d0_entry, sizeof(*d0_entry),
2800 (unsigned long)pkt, VM_PKT_DATA_INBAND,
2801 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2802 if (!ret)
2803 ret = wait_for_response(hdev, &comp_pkt.host_event);
2804
2805 if (ret)
2806 goto exit;
2807
2808 if (comp_pkt.completion_status < 0) {
2809 dev_err(&hdev->device,
2810 "PCI Pass-through VSP failed D0 Entry with status %x\n",
2811 comp_pkt.completion_status);
2812 ret = -EPROTO;
2813 goto exit;
2814 }
2815
2816 ret = 0;
2817
2818exit:
2819 kfree(pkt);
2820 return ret;
2821}
2822
2823/**
2824 * hv_pci_query_relations() - Ask host to send list of child
2825 * devices
2826 * @hdev: VMBus's tracking struct for this root PCI bus
2827 *
2828 * Return: 0 on success, -errno on failure
2829 */
2830static int hv_pci_query_relations(struct hv_device *hdev)
2831{
2832 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2833 struct pci_message message;
2834 struct completion comp;
2835 int ret;
2836
2837 /* Ask the host to send along the list of child devices */
2838 init_completion(&comp);
2839 if (cmpxchg(&hbus->survey_event, NULL, &comp))
2840 return -ENOTEMPTY;
2841
2842 memset(&message, 0, sizeof(message));
2843 message.type = PCI_QUERY_BUS_RELATIONS;
2844
2845 ret = vmbus_sendpacket(hdev->channel, &message, sizeof(message),
2846 0, VM_PKT_DATA_INBAND, 0);
2847 if (!ret)
2848 ret = wait_for_response(hdev, &comp);
2849
2850 return ret;
2851}
2852
2853/**
2854 * hv_send_resources_allocated() - Report local resource choices
2855 * @hdev: VMBus's tracking struct for this root PCI bus
2856 *
2857 * The host OS is expecting to be sent a request as a message
2858 * which contains all the resources that the device will use.
2859 * The response contains those same resources, "translated"
2860 * which is to say, the values which should be used by the
2861 * hardware, when it delivers an interrupt. (MMIO resources are
2862 * used in local terms.) This is nice for Windows, and lines up
2863 * with the FDO/PDO split, which doesn't exist in Linux. Linux
2864 * is deeply expecting to scan an emulated PCI configuration
2865 * space. So this message is sent here only to drive the state
2866 * machine on the host forward.
2867 *
2868 * Return: 0 on success, -errno on failure
2869 */
2870static int hv_send_resources_allocated(struct hv_device *hdev)
2871{
2872 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2873 struct pci_resources_assigned *res_assigned;
2874 struct pci_resources_assigned2 *res_assigned2;
2875 struct hv_pci_compl comp_pkt;
2876 struct hv_pci_dev *hpdev;
2877 struct pci_packet *pkt;
2878 size_t size_res;
Olivier Deprez157378f2022-04-04 15:47:50 +02002879 int wslot;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002880 int ret;
2881
Olivier Deprez157378f2022-04-04 15:47:50 +02002882 size_res = (hbus->protocol_version < PCI_PROTOCOL_VERSION_1_2)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002883 ? sizeof(*res_assigned) : sizeof(*res_assigned2);
2884
2885 pkt = kmalloc(sizeof(*pkt) + size_res, GFP_KERNEL);
2886 if (!pkt)
2887 return -ENOMEM;
2888
2889 ret = 0;
2890
2891 for (wslot = 0; wslot < 256; wslot++) {
2892 hpdev = get_pcichild_wslot(hbus, wslot);
2893 if (!hpdev)
2894 continue;
2895
2896 memset(pkt, 0, sizeof(*pkt) + size_res);
2897 init_completion(&comp_pkt.host_event);
2898 pkt->completion_func = hv_pci_generic_compl;
2899 pkt->compl_ctxt = &comp_pkt;
2900
Olivier Deprez157378f2022-04-04 15:47:50 +02002901 if (hbus->protocol_version < PCI_PROTOCOL_VERSION_1_2) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002902 res_assigned =
2903 (struct pci_resources_assigned *)&pkt->message;
2904 res_assigned->message_type.type =
2905 PCI_RESOURCES_ASSIGNED;
2906 res_assigned->wslot.slot = hpdev->desc.win_slot.slot;
2907 } else {
2908 res_assigned2 =
2909 (struct pci_resources_assigned2 *)&pkt->message;
2910 res_assigned2->message_type.type =
2911 PCI_RESOURCES_ASSIGNED2;
2912 res_assigned2->wslot.slot = hpdev->desc.win_slot.slot;
2913 }
2914 put_pcichild(hpdev);
2915
2916 ret = vmbus_sendpacket(hdev->channel, &pkt->message,
2917 size_res, (unsigned long)pkt,
2918 VM_PKT_DATA_INBAND,
2919 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2920 if (!ret)
2921 ret = wait_for_response(hdev, &comp_pkt.host_event);
2922 if (ret)
2923 break;
2924
2925 if (comp_pkt.completion_status < 0) {
2926 ret = -EPROTO;
2927 dev_err(&hdev->device,
2928 "resource allocated returned 0x%x",
2929 comp_pkt.completion_status);
2930 break;
2931 }
Olivier Deprez157378f2022-04-04 15:47:50 +02002932
2933 hbus->wslot_res_allocated = wslot;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002934 }
2935
2936 kfree(pkt);
2937 return ret;
2938}
2939
2940/**
2941 * hv_send_resources_released() - Report local resources
2942 * released
2943 * @hdev: VMBus's tracking struct for this root PCI bus
2944 *
2945 * Return: 0 on success, -errno on failure
2946 */
2947static int hv_send_resources_released(struct hv_device *hdev)
2948{
2949 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2950 struct pci_child_message pkt;
2951 struct hv_pci_dev *hpdev;
Olivier Deprez157378f2022-04-04 15:47:50 +02002952 int wslot;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002953 int ret;
2954
Olivier Deprez157378f2022-04-04 15:47:50 +02002955 for (wslot = hbus->wslot_res_allocated; wslot >= 0; wslot--) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002956 hpdev = get_pcichild_wslot(hbus, wslot);
2957 if (!hpdev)
2958 continue;
2959
2960 memset(&pkt, 0, sizeof(pkt));
2961 pkt.message_type.type = PCI_RESOURCES_RELEASED;
2962 pkt.wslot.slot = hpdev->desc.win_slot.slot;
2963
2964 put_pcichild(hpdev);
2965
2966 ret = vmbus_sendpacket(hdev->channel, &pkt, sizeof(pkt), 0,
2967 VM_PKT_DATA_INBAND, 0);
2968 if (ret)
2969 return ret;
Olivier Deprez157378f2022-04-04 15:47:50 +02002970
2971 hbus->wslot_res_allocated = wslot - 1;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002972 }
2973
Olivier Deprez157378f2022-04-04 15:47:50 +02002974 hbus->wslot_res_allocated = -1;
2975
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002976 return 0;
2977}
2978
2979static void get_hvpcibus(struct hv_pcibus_device *hbus)
2980{
2981 refcount_inc(&hbus->remove_lock);
2982}
2983
2984static void put_hvpcibus(struct hv_pcibus_device *hbus)
2985{
2986 if (refcount_dec_and_test(&hbus->remove_lock))
2987 complete(&hbus->remove_event);
2988}
2989
David Brazdil0f672f62019-12-10 10:32:29 +00002990#define HVPCI_DOM_MAP_SIZE (64 * 1024)
2991static DECLARE_BITMAP(hvpci_dom_map, HVPCI_DOM_MAP_SIZE);
2992
2993/*
2994 * PCI domain number 0 is used by emulated devices on Gen1 VMs, so define 0
2995 * as invalid for passthrough PCI devices of this driver.
2996 */
2997#define HVPCI_DOM_INVALID 0
2998
2999/**
3000 * hv_get_dom_num() - Get a valid PCI domain number
3001 * Check if the PCI domain number is in use, and return another number if
3002 * it is in use.
3003 *
3004 * @dom: Requested domain number
3005 *
3006 * return: domain number on success, HVPCI_DOM_INVALID on failure
3007 */
3008static u16 hv_get_dom_num(u16 dom)
3009{
3010 unsigned int i;
3011
3012 if (test_and_set_bit(dom, hvpci_dom_map) == 0)
3013 return dom;
3014
3015 for_each_clear_bit(i, hvpci_dom_map, HVPCI_DOM_MAP_SIZE) {
3016 if (test_and_set_bit(i, hvpci_dom_map) == 0)
3017 return i;
3018 }
3019
3020 return HVPCI_DOM_INVALID;
3021}
3022
3023/**
3024 * hv_put_dom_num() - Mark the PCI domain number as free
3025 * @dom: Domain number to be freed
3026 */
3027static void hv_put_dom_num(u16 dom)
3028{
3029 clear_bit(dom, hvpci_dom_map);
3030}
3031
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003032/**
3033 * hv_pci_probe() - New VMBus channel probe, for a root PCI bus
3034 * @hdev: VMBus's tracking struct for this root PCI bus
3035 * @dev_id: Identifies the device itself
3036 *
3037 * Return: 0 on success, -errno on failure
3038 */
3039static int hv_pci_probe(struct hv_device *hdev,
3040 const struct hv_vmbus_device_id *dev_id)
3041{
3042 struct hv_pcibus_device *hbus;
David Brazdil0f672f62019-12-10 10:32:29 +00003043 u16 dom_req, dom;
3044 char *name;
Olivier Deprez157378f2022-04-04 15:47:50 +02003045 bool enter_d0_retry = true;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003046 int ret;
3047
3048 /*
3049 * hv_pcibus_device contains the hypercall arguments for retargeting in
3050 * hv_irq_unmask(). Those must not cross a page boundary.
3051 */
Olivier Deprez157378f2022-04-04 15:47:50 +02003052 BUILD_BUG_ON(sizeof(*hbus) > HV_HYP_PAGE_SIZE);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003053
Olivier Deprez157378f2022-04-04 15:47:50 +02003054 /*
3055 * With the recent 59bb47985c1d ("mm, sl[aou]b: guarantee natural
3056 * alignment for kmalloc(power-of-two)"), kzalloc() is able to allocate
3057 * a 4KB buffer that is guaranteed to be 4KB-aligned. Here the size and
3058 * alignment of hbus is important because hbus's field
3059 * retarget_msi_interrupt_params must not cross a 4KB page boundary.
3060 *
3061 * Here we prefer kzalloc to get_zeroed_page(), because a buffer
3062 * allocated by the latter is not tracked and scanned by kmemleak, and
3063 * hence kmemleak reports the pointer contained in the hbus buffer
3064 * (i.e. the hpdev struct, which is created in new_pcichild_device() and
3065 * is tracked by hbus->children) as memory leak (false positive).
3066 *
3067 * If the kernel doesn't have 59bb47985c1d, get_zeroed_page() *must* be
3068 * used to allocate the hbus buffer and we can avoid the kmemleak false
3069 * positive by using kmemleak_alloc() and kmemleak_free() to ask
3070 * kmemleak to track and scan the hbus buffer.
3071 */
3072 hbus = kzalloc(HV_HYP_PAGE_SIZE, GFP_KERNEL);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003073 if (!hbus)
3074 return -ENOMEM;
3075 hbus->state = hv_pcibus_init;
Olivier Deprez157378f2022-04-04 15:47:50 +02003076 hbus->wslot_res_allocated = -1;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003077
3078 /*
David Brazdil0f672f62019-12-10 10:32:29 +00003079 * The PCI bus "domain" is what is called "segment" in ACPI and other
3080 * specs. Pull it from the instance ID, to get something usually
3081 * unique. In rare cases of collision, we will find out another number
3082 * not in use.
3083 *
3084 * Note that, since this code only runs in a Hyper-V VM, Hyper-V
3085 * together with this guest driver can guarantee that (1) The only
3086 * domain used by Gen1 VMs for something that looks like a physical
3087 * PCI bus (which is actually emulated by the hypervisor) is domain 0.
3088 * (2) There will be no overlap between domains (after fixing possible
3089 * collisions) in the same VM.
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003090 */
David Brazdil0f672f62019-12-10 10:32:29 +00003091 dom_req = hdev->dev_instance.b[5] << 8 | hdev->dev_instance.b[4];
3092 dom = hv_get_dom_num(dom_req);
3093
3094 if (dom == HVPCI_DOM_INVALID) {
3095 dev_err(&hdev->device,
3096 "Unable to use dom# 0x%hx or other numbers", dom_req);
3097 ret = -EINVAL;
3098 goto free_bus;
3099 }
3100
3101 if (dom != dom_req)
3102 dev_info(&hdev->device,
3103 "PCI dom# 0x%hx has collision, using 0x%hx",
3104 dom_req, dom);
3105
3106 hbus->sysdata.domain = dom;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003107
3108 hbus->hdev = hdev;
3109 refcount_set(&hbus->remove_lock, 1);
3110 INIT_LIST_HEAD(&hbus->children);
3111 INIT_LIST_HEAD(&hbus->dr_list);
3112 INIT_LIST_HEAD(&hbus->resources_for_children);
3113 spin_lock_init(&hbus->config_lock);
3114 spin_lock_init(&hbus->device_list_lock);
3115 spin_lock_init(&hbus->retarget_msi_interrupt_lock);
3116 init_completion(&hbus->remove_event);
3117 hbus->wq = alloc_ordered_workqueue("hv_pci_%x", 0,
3118 hbus->sysdata.domain);
3119 if (!hbus->wq) {
3120 ret = -ENOMEM;
David Brazdil0f672f62019-12-10 10:32:29 +00003121 goto free_dom;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003122 }
3123
3124 ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0,
3125 hv_pci_onchannelcallback, hbus);
3126 if (ret)
3127 goto destroy_wq;
3128
3129 hv_set_drvdata(hdev, hbus);
3130
Olivier Deprez157378f2022-04-04 15:47:50 +02003131 ret = hv_pci_protocol_negotiation(hdev, pci_protocol_versions,
3132 ARRAY_SIZE(pci_protocol_versions));
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003133 if (ret)
3134 goto close;
3135
3136 ret = hv_allocate_config_window(hbus);
3137 if (ret)
3138 goto close;
3139
3140 hbus->cfg_addr = ioremap(hbus->mem_config->start,
3141 PCI_CONFIG_MMIO_LENGTH);
3142 if (!hbus->cfg_addr) {
3143 dev_err(&hdev->device,
3144 "Unable to map a virtual address for config space\n");
3145 ret = -ENOMEM;
3146 goto free_config;
3147 }
3148
David Brazdil0f672f62019-12-10 10:32:29 +00003149 name = kasprintf(GFP_KERNEL, "%pUL", &hdev->dev_instance);
3150 if (!name) {
3151 ret = -ENOMEM;
3152 goto unmap;
3153 }
3154
3155 hbus->sysdata.fwnode = irq_domain_alloc_named_fwnode(name);
3156 kfree(name);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003157 if (!hbus->sysdata.fwnode) {
3158 ret = -ENOMEM;
3159 goto unmap;
3160 }
3161
3162 ret = hv_pcie_init_irq_domain(hbus);
3163 if (ret)
3164 goto free_fwnode;
3165
Olivier Deprez157378f2022-04-04 15:47:50 +02003166retry:
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003167 ret = hv_pci_query_relations(hdev);
3168 if (ret)
3169 goto free_irq_domain;
3170
3171 ret = hv_pci_enter_d0(hdev);
Olivier Deprez157378f2022-04-04 15:47:50 +02003172 /*
3173 * In certain case (Kdump) the pci device of interest was
3174 * not cleanly shut down and resource is still held on host
3175 * side, the host could return invalid device status.
3176 * We need to explicitly request host to release the resource
3177 * and try to enter D0 again.
3178 * Since the hv_pci_bus_exit() call releases structures
3179 * of all its child devices, we need to start the retry from
3180 * hv_pci_query_relations() call, requesting host to send
3181 * the synchronous child device relations message before this
3182 * information is needed in hv_send_resources_allocated()
3183 * call later.
3184 */
3185 if (ret == -EPROTO && enter_d0_retry) {
3186 enter_d0_retry = false;
3187
3188 dev_err(&hdev->device, "Retrying D0 Entry\n");
3189
3190 /*
3191 * Hv_pci_bus_exit() calls hv_send_resources_released()
3192 * to free up resources of its child devices.
3193 * In the kdump kernel we need to set the
3194 * wslot_res_allocated to 255 so it scans all child
3195 * devices to release resources allocated in the
3196 * normal kernel before panic happened.
3197 */
3198 hbus->wslot_res_allocated = 255;
3199 ret = hv_pci_bus_exit(hdev, true);
3200
3201 if (ret == 0)
3202 goto retry;
3203
3204 dev_err(&hdev->device,
3205 "Retrying D0 failed with ret %d\n", ret);
3206 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003207 if (ret)
3208 goto free_irq_domain;
3209
3210 ret = hv_pci_allocate_bridge_windows(hbus);
3211 if (ret)
Olivier Deprez157378f2022-04-04 15:47:50 +02003212 goto exit_d0;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003213
3214 ret = hv_send_resources_allocated(hdev);
3215 if (ret)
3216 goto free_windows;
3217
3218 prepopulate_bars(hbus);
3219
3220 hbus->state = hv_pcibus_probed;
3221
3222 ret = create_root_hv_pci_bus(hbus);
3223 if (ret)
3224 goto free_windows;
3225
3226 return 0;
3227
3228free_windows:
3229 hv_pci_free_bridge_windows(hbus);
Olivier Deprez157378f2022-04-04 15:47:50 +02003230exit_d0:
3231 (void) hv_pci_bus_exit(hdev, true);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003232free_irq_domain:
3233 irq_domain_remove(hbus->irq_domain);
3234free_fwnode:
3235 irq_domain_free_fwnode(hbus->sysdata.fwnode);
3236unmap:
3237 iounmap(hbus->cfg_addr);
3238free_config:
3239 hv_free_config_window(hbus);
3240close:
3241 vmbus_close(hdev->channel);
3242destroy_wq:
3243 destroy_workqueue(hbus->wq);
David Brazdil0f672f62019-12-10 10:32:29 +00003244free_dom:
3245 hv_put_dom_num(hbus->sysdata.domain);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003246free_bus:
Olivier Deprez157378f2022-04-04 15:47:50 +02003247 kfree(hbus);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003248 return ret;
3249}
3250
Olivier Deprez157378f2022-04-04 15:47:50 +02003251static int hv_pci_bus_exit(struct hv_device *hdev, bool keep_devs)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003252{
3253 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
3254 struct {
3255 struct pci_packet teardown_packet;
3256 u8 buffer[sizeof(struct pci_message)];
3257 } pkt;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003258 struct hv_pci_compl comp_pkt;
Olivier Deprez157378f2022-04-04 15:47:50 +02003259 struct hv_pci_dev *hpdev, *tmp;
3260 unsigned long flags;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003261 int ret;
3262
3263 /*
3264 * After the host sends the RESCIND_CHANNEL message, it doesn't
3265 * access the per-channel ringbuffer any longer.
3266 */
3267 if (hdev->channel->rescind)
Olivier Deprez157378f2022-04-04 15:47:50 +02003268 return 0;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003269
Olivier Deprez157378f2022-04-04 15:47:50 +02003270 if (!keep_devs) {
3271 struct list_head removed;
3272
3273 /* Move all present children to the list on stack */
3274 INIT_LIST_HEAD(&removed);
3275 spin_lock_irqsave(&hbus->device_list_lock, flags);
3276 list_for_each_entry_safe(hpdev, tmp, &hbus->children, list_entry)
3277 list_move_tail(&hpdev->list_entry, &removed);
3278 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
3279
3280 /* Remove all children in the list */
3281 list_for_each_entry_safe(hpdev, tmp, &removed, list_entry) {
3282 list_del(&hpdev->list_entry);
3283 if (hpdev->pci_slot)
3284 pci_destroy_slot(hpdev->pci_slot);
3285 /* For the two refs got in new_pcichild_device() */
3286 put_pcichild(hpdev);
3287 put_pcichild(hpdev);
3288 }
3289 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003290
3291 ret = hv_send_resources_released(hdev);
Olivier Deprez157378f2022-04-04 15:47:50 +02003292 if (ret) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003293 dev_err(&hdev->device,
3294 "Couldn't send resources released packet(s)\n");
Olivier Deprez157378f2022-04-04 15:47:50 +02003295 return ret;
3296 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003297
3298 memset(&pkt.teardown_packet, 0, sizeof(pkt.teardown_packet));
3299 init_completion(&comp_pkt.host_event);
3300 pkt.teardown_packet.completion_func = hv_pci_generic_compl;
3301 pkt.teardown_packet.compl_ctxt = &comp_pkt;
3302 pkt.teardown_packet.message[0].type = PCI_BUS_D0EXIT;
3303
3304 ret = vmbus_sendpacket(hdev->channel, &pkt.teardown_packet.message,
3305 sizeof(struct pci_message),
3306 (unsigned long)&pkt.teardown_packet,
3307 VM_PKT_DATA_INBAND,
3308 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
Olivier Deprez157378f2022-04-04 15:47:50 +02003309 if (ret)
3310 return ret;
3311
3312 if (wait_for_completion_timeout(&comp_pkt.host_event, 10 * HZ) == 0)
3313 return -ETIMEDOUT;
3314
3315 return 0;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003316}
3317
3318/**
3319 * hv_pci_remove() - Remove routine for this VMBus channel
3320 * @hdev: VMBus's tracking struct for this root PCI bus
3321 *
3322 * Return: 0 on success, -errno on failure
3323 */
3324static int hv_pci_remove(struct hv_device *hdev)
3325{
3326 struct hv_pcibus_device *hbus;
Olivier Deprez157378f2022-04-04 15:47:50 +02003327 int ret;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003328
3329 hbus = hv_get_drvdata(hdev);
3330 if (hbus->state == hv_pcibus_installed) {
Olivier Deprez157378f2022-04-04 15:47:50 +02003331 tasklet_disable(&hdev->channel->callback_event);
3332 hbus->state = hv_pcibus_removing;
3333 tasklet_enable(&hdev->channel->callback_event);
3334 destroy_workqueue(hbus->wq);
3335 hbus->wq = NULL;
3336 /*
3337 * At this point, no work is running or can be scheduled
3338 * on hbus-wq. We can't race with hv_pci_devices_present()
3339 * or hv_pci_eject_device(), it's safe to proceed.
3340 */
3341
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003342 /* Remove the bus from PCI's point of view. */
3343 pci_lock_rescan_remove();
3344 pci_stop_root_bus(hbus->pci_bus);
David Brazdil0f672f62019-12-10 10:32:29 +00003345 hv_pci_remove_slots(hbus);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003346 pci_remove_root_bus(hbus->pci_bus);
3347 pci_unlock_rescan_remove();
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003348 }
3349
Olivier Deprez157378f2022-04-04 15:47:50 +02003350 ret = hv_pci_bus_exit(hdev, false);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003351
3352 vmbus_close(hdev->channel);
3353
3354 iounmap(hbus->cfg_addr);
3355 hv_free_config_window(hbus);
3356 pci_free_resource_list(&hbus->resources_for_children);
3357 hv_pci_free_bridge_windows(hbus);
3358 irq_domain_remove(hbus->irq_domain);
3359 irq_domain_free_fwnode(hbus->sysdata.fwnode);
3360 put_hvpcibus(hbus);
3361 wait_for_completion(&hbus->remove_event);
David Brazdil0f672f62019-12-10 10:32:29 +00003362
3363 hv_put_dom_num(hbus->sysdata.domain);
3364
Olivier Deprez157378f2022-04-04 15:47:50 +02003365 kfree(hbus);
3366 return ret;
3367}
3368
3369static int hv_pci_suspend(struct hv_device *hdev)
3370{
3371 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
3372 enum hv_pcibus_state old_state;
3373 int ret;
3374
3375 /*
3376 * hv_pci_suspend() must make sure there are no pending work items
3377 * before calling vmbus_close(), since it runs in a process context
3378 * as a callback in dpm_suspend(). When it starts to run, the channel
3379 * callback hv_pci_onchannelcallback(), which runs in a tasklet
3380 * context, can be still running concurrently and scheduling new work
3381 * items onto hbus->wq in hv_pci_devices_present() and
3382 * hv_pci_eject_device(), and the work item handlers can access the
3383 * vmbus channel, which can be being closed by hv_pci_suspend(), e.g.
3384 * the work item handler pci_devices_present_work() ->
3385 * new_pcichild_device() writes to the vmbus channel.
3386 *
3387 * To eliminate the race, hv_pci_suspend() disables the channel
3388 * callback tasklet, sets hbus->state to hv_pcibus_removing, and
3389 * re-enables the tasklet. This way, when hv_pci_suspend() proceeds,
3390 * it knows that no new work item can be scheduled, and then it flushes
3391 * hbus->wq and safely closes the vmbus channel.
3392 */
3393 tasklet_disable(&hdev->channel->callback_event);
3394
3395 /* Change the hbus state to prevent new work items. */
3396 old_state = hbus->state;
3397 if (hbus->state == hv_pcibus_installed)
3398 hbus->state = hv_pcibus_removing;
3399
3400 tasklet_enable(&hdev->channel->callback_event);
3401
3402 if (old_state != hv_pcibus_installed)
3403 return -EINVAL;
3404
3405 flush_workqueue(hbus->wq);
3406
3407 ret = hv_pci_bus_exit(hdev, true);
3408 if (ret)
3409 return ret;
3410
3411 vmbus_close(hdev->channel);
3412
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003413 return 0;
3414}
3415
Olivier Deprez157378f2022-04-04 15:47:50 +02003416static int hv_pci_restore_msi_msg(struct pci_dev *pdev, void *arg)
3417{
3418 struct msi_desc *entry;
3419 struct irq_data *irq_data;
3420
3421 for_each_pci_msi_entry(entry, pdev) {
3422 irq_data = irq_get_irq_data(entry->irq);
3423 if (WARN_ON_ONCE(!irq_data))
3424 return -EINVAL;
3425
3426 hv_compose_msi_msg(irq_data, &entry->msg);
3427 }
3428
3429 return 0;
3430}
3431
3432/*
3433 * Upon resume, pci_restore_msi_state() -> ... -> __pci_write_msi_msg()
3434 * directly writes the MSI/MSI-X registers via MMIO, but since Hyper-V
3435 * doesn't trap and emulate the MMIO accesses, here hv_compose_msi_msg()
3436 * must be used to ask Hyper-V to re-create the IOMMU Interrupt Remapping
3437 * Table entries.
3438 */
3439static void hv_pci_restore_msi_state(struct hv_pcibus_device *hbus)
3440{
3441 pci_walk_bus(hbus->pci_bus, hv_pci_restore_msi_msg, NULL);
3442}
3443
3444static int hv_pci_resume(struct hv_device *hdev)
3445{
3446 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
3447 enum pci_protocol_version_t version[1];
3448 int ret;
3449
3450 hbus->state = hv_pcibus_init;
3451
3452 ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0,
3453 hv_pci_onchannelcallback, hbus);
3454 if (ret)
3455 return ret;
3456
3457 /* Only use the version that was in use before hibernation. */
3458 version[0] = hbus->protocol_version;
3459 ret = hv_pci_protocol_negotiation(hdev, version, 1);
3460 if (ret)
3461 goto out;
3462
3463 ret = hv_pci_query_relations(hdev);
3464 if (ret)
3465 goto out;
3466
3467 ret = hv_pci_enter_d0(hdev);
3468 if (ret)
3469 goto out;
3470
3471 ret = hv_send_resources_allocated(hdev);
3472 if (ret)
3473 goto out;
3474
3475 prepopulate_bars(hbus);
3476
3477 hv_pci_restore_msi_state(hbus);
3478
3479 hbus->state = hv_pcibus_installed;
3480 return 0;
3481out:
3482 vmbus_close(hdev->channel);
3483 return ret;
3484}
3485
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003486static const struct hv_vmbus_device_id hv_pci_id_table[] = {
3487 /* PCI Pass-through Class ID */
3488 /* 44C4F61D-4444-4400-9D52-802E27EDE19F */
3489 { HV_PCIE_GUID, },
3490 { },
3491};
3492
3493MODULE_DEVICE_TABLE(vmbus, hv_pci_id_table);
3494
3495static struct hv_driver hv_pci_drv = {
3496 .name = "hv_pci",
3497 .id_table = hv_pci_id_table,
3498 .probe = hv_pci_probe,
3499 .remove = hv_pci_remove,
Olivier Deprez157378f2022-04-04 15:47:50 +02003500 .suspend = hv_pci_suspend,
3501 .resume = hv_pci_resume,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003502};
3503
3504static void __exit exit_hv_pci_drv(void)
3505{
3506 vmbus_driver_unregister(&hv_pci_drv);
David Brazdil0f672f62019-12-10 10:32:29 +00003507
3508 hvpci_block_ops.read_block = NULL;
3509 hvpci_block_ops.write_block = NULL;
3510 hvpci_block_ops.reg_blk_invalidate = NULL;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003511}
3512
3513static int __init init_hv_pci_drv(void)
3514{
Olivier Deprez0e641232021-09-23 10:07:05 +02003515 if (!hv_is_hyperv_initialized())
3516 return -ENODEV;
3517
David Brazdil0f672f62019-12-10 10:32:29 +00003518 /* Set the invalid domain number's bit, so it will not be used */
3519 set_bit(HVPCI_DOM_INVALID, hvpci_dom_map);
3520
3521 /* Initialize PCI block r/w interface */
3522 hvpci_block_ops.read_block = hv_read_config_block;
3523 hvpci_block_ops.write_block = hv_write_config_block;
3524 hvpci_block_ops.reg_blk_invalidate = hv_register_block_invalidate;
3525
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003526 return vmbus_driver_register(&hv_pci_drv);
3527}
3528
3529module_init(init_hv_pci_drv);
3530module_exit(exit_hv_pci_drv);
3531
3532MODULE_DESCRIPTION("Hyper-V PCI");
3533MODULE_LICENSE("GPL v2");