Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * FPU signal frame handling routines. |
| 4 | */ |
| 5 | |
| 6 | #include <linux/compat.h> |
| 7 | #include <linux/cpu.h> |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 8 | #include <linux/pagemap.h> |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 9 | |
| 10 | #include <asm/fpu/internal.h> |
| 11 | #include <asm/fpu/signal.h> |
| 12 | #include <asm/fpu/regset.h> |
| 13 | #include <asm/fpu/xstate.h> |
| 14 | |
| 15 | #include <asm/sigframe.h> |
| 16 | #include <asm/trace/fpu.h> |
| 17 | |
| 18 | static struct _fpx_sw_bytes fx_sw_reserved, fx_sw_reserved_ia32; |
| 19 | |
| 20 | /* |
| 21 | * Check for the presence of extended state information in the |
| 22 | * user fpstate pointer in the sigcontext. |
| 23 | */ |
| 24 | static inline int check_for_xstate(struct fxregs_state __user *buf, |
| 25 | void __user *fpstate, |
| 26 | struct _fpx_sw_bytes *fx_sw) |
| 27 | { |
| 28 | int min_xstate_size = sizeof(struct fxregs_state) + |
| 29 | sizeof(struct xstate_header); |
| 30 | unsigned int magic2; |
| 31 | |
| 32 | if (__copy_from_user(fx_sw, &buf->sw_reserved[0], sizeof(*fx_sw))) |
| 33 | return -1; |
| 34 | |
| 35 | /* Check for the first magic field and other error scenarios. */ |
| 36 | if (fx_sw->magic1 != FP_XSTATE_MAGIC1 || |
| 37 | fx_sw->xstate_size < min_xstate_size || |
| 38 | fx_sw->xstate_size > fpu_user_xstate_size || |
| 39 | fx_sw->xstate_size > fx_sw->extended_size) |
| 40 | return -1; |
| 41 | |
| 42 | /* |
| 43 | * Check for the presence of second magic word at the end of memory |
| 44 | * layout. This detects the case where the user just copied the legacy |
| 45 | * fpstate layout with out copying the extended state information |
| 46 | * in the memory layout. |
| 47 | */ |
| 48 | if (__get_user(magic2, (__u32 __user *)(fpstate + fx_sw->xstate_size)) |
| 49 | || magic2 != FP_XSTATE_MAGIC2) |
| 50 | return -1; |
| 51 | |
| 52 | return 0; |
| 53 | } |
| 54 | |
| 55 | /* |
| 56 | * Signal frame handlers. |
| 57 | */ |
| 58 | static inline int save_fsave_header(struct task_struct *tsk, void __user *buf) |
| 59 | { |
| 60 | if (use_fxsr()) { |
| 61 | struct xregs_state *xsave = &tsk->thread.fpu.state.xsave; |
| 62 | struct user_i387_ia32_struct env; |
| 63 | struct _fpstate_32 __user *fp = buf; |
| 64 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 65 | fpregs_lock(); |
| 66 | if (!test_thread_flag(TIF_NEED_FPU_LOAD)) |
| 67 | copy_fxregs_to_kernel(&tsk->thread.fpu); |
| 68 | fpregs_unlock(); |
| 69 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 70 | convert_from_fxsr(&env, tsk); |
| 71 | |
| 72 | if (__copy_to_user(buf, &env, sizeof(env)) || |
| 73 | __put_user(xsave->i387.swd, &fp->status) || |
| 74 | __put_user(X86_FXSR_MAGIC, &fp->magic)) |
| 75 | return -1; |
| 76 | } else { |
| 77 | struct fregs_state __user *fp = buf; |
| 78 | u32 swd; |
| 79 | if (__get_user(swd, &fp->swd) || __put_user(swd, &fp->status)) |
| 80 | return -1; |
| 81 | } |
| 82 | |
| 83 | return 0; |
| 84 | } |
| 85 | |
| 86 | static inline int save_xstate_epilog(void __user *buf, int ia32_frame) |
| 87 | { |
| 88 | struct xregs_state __user *x = buf; |
| 89 | struct _fpx_sw_bytes *sw_bytes; |
| 90 | u32 xfeatures; |
| 91 | int err; |
| 92 | |
| 93 | /* Setup the bytes not touched by the [f]xsave and reserved for SW. */ |
| 94 | sw_bytes = ia32_frame ? &fx_sw_reserved_ia32 : &fx_sw_reserved; |
| 95 | err = __copy_to_user(&x->i387.sw_reserved, sw_bytes, sizeof(*sw_bytes)); |
| 96 | |
| 97 | if (!use_xsave()) |
| 98 | return err; |
| 99 | |
| 100 | err |= __put_user(FP_XSTATE_MAGIC2, |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 101 | (__u32 __user *)(buf + fpu_user_xstate_size)); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 102 | |
| 103 | /* |
| 104 | * Read the xfeatures which we copied (directly from the cpu or |
| 105 | * from the state in task struct) to the user buffers. |
| 106 | */ |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 107 | err |= __get_user(xfeatures, (__u32 __user *)&x->header.xfeatures); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 108 | |
| 109 | /* |
| 110 | * For legacy compatible, we always set FP/SSE bits in the bit |
| 111 | * vector while saving the state to the user context. This will |
| 112 | * enable us capturing any changes(during sigreturn) to |
| 113 | * the FP/SSE bits by the legacy applications which don't touch |
| 114 | * xfeatures in the xsave header. |
| 115 | * |
| 116 | * xsave aware apps can change the xfeatures in the xsave |
| 117 | * header as well as change any contents in the memory layout. |
| 118 | * xrestore as part of sigreturn will capture all the changes. |
| 119 | */ |
| 120 | xfeatures |= XFEATURE_MASK_FPSSE; |
| 121 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 122 | err |= __put_user(xfeatures, (__u32 __user *)&x->header.xfeatures); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 123 | |
| 124 | return err; |
| 125 | } |
| 126 | |
| 127 | static inline int copy_fpregs_to_sigframe(struct xregs_state __user *buf) |
| 128 | { |
| 129 | int err; |
| 130 | |
| 131 | if (use_xsave()) |
| 132 | err = copy_xregs_to_user(buf); |
| 133 | else if (use_fxsr()) |
| 134 | err = copy_fxregs_to_user((struct fxregs_state __user *) buf); |
| 135 | else |
| 136 | err = copy_fregs_to_user((struct fregs_state __user *) buf); |
| 137 | |
| 138 | if (unlikely(err) && __clear_user(buf, fpu_user_xstate_size)) |
| 139 | err = -EFAULT; |
| 140 | return err; |
| 141 | } |
| 142 | |
| 143 | /* |
| 144 | * Save the fpu, extended register state to the user signal frame. |
| 145 | * |
| 146 | * 'buf_fx' is the 64-byte aligned pointer at which the [f|fx|x]save |
| 147 | * state is copied. |
| 148 | * 'buf' points to the 'buf_fx' or to the fsave header followed by 'buf_fx'. |
| 149 | * |
| 150 | * buf == buf_fx for 64-bit frames and 32-bit fsave frame. |
| 151 | * buf != buf_fx for 32-bit frames with fxstate. |
| 152 | * |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 153 | * Try to save it directly to the user frame with disabled page fault handler. |
| 154 | * If this fails then do the slow path where the FPU state is first saved to |
| 155 | * task's fpu->state and then copy it to the user frame pointed to by the |
| 156 | * aligned pointer 'buf_fx'. |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 157 | * |
| 158 | * If this is a 32-bit frame with fxstate, put a fsave header before |
| 159 | * the aligned state at 'buf_fx'. |
| 160 | * |
| 161 | * For [f]xsave state, update the SW reserved fields in the [f]xsave frame |
| 162 | * indicating the absence/presence of the extended state to the user. |
| 163 | */ |
| 164 | int copy_fpstate_to_sigframe(void __user *buf, void __user *buf_fx, int size) |
| 165 | { |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 166 | struct task_struct *tsk = current; |
| 167 | int ia32_fxstate = (buf != buf_fx); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 168 | int ret; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 169 | |
| 170 | ia32_fxstate &= (IS_ENABLED(CONFIG_X86_32) || |
| 171 | IS_ENABLED(CONFIG_IA32_EMULATION)); |
| 172 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 173 | if (!static_cpu_has(X86_FEATURE_FPU)) { |
| 174 | struct user_i387_ia32_struct fp; |
| 175 | fpregs_soft_get(current, NULL, (struct membuf){.p = &fp, |
| 176 | .left = sizeof(fp)}); |
| 177 | return copy_to_user(buf, &fp, sizeof(fp)) ? -EFAULT : 0; |
| 178 | } |
| 179 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 180 | if (!access_ok(buf, size)) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 181 | return -EACCES; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 182 | retry: |
| 183 | /* |
| 184 | * Load the FPU registers if they are not valid for the current task. |
| 185 | * With a valid FPU state we can attempt to save the state directly to |
| 186 | * userland's stack frame which will likely succeed. If it does not, |
| 187 | * resolve the fault in the user memory and try again. |
| 188 | */ |
| 189 | fpregs_lock(); |
| 190 | if (test_thread_flag(TIF_NEED_FPU_LOAD)) |
| 191 | __fpregs_load_activate(); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 192 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 193 | pagefault_disable(); |
| 194 | ret = copy_fpregs_to_sigframe(buf_fx); |
| 195 | pagefault_enable(); |
| 196 | fpregs_unlock(); |
| 197 | |
| 198 | if (ret) { |
| 199 | if (!fault_in_pages_writeable(buf_fx, fpu_user_xstate_size)) |
| 200 | goto retry; |
| 201 | return -EFAULT; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 202 | } |
| 203 | |
| 204 | /* Save the fsave header for the 32-bit frames. */ |
| 205 | if ((ia32_fxstate || !use_fxsr()) && save_fsave_header(tsk, buf)) |
| 206 | return -1; |
| 207 | |
| 208 | if (use_fxsr() && save_xstate_epilog(buf_fx, ia32_fxstate)) |
| 209 | return -1; |
| 210 | |
| 211 | return 0; |
| 212 | } |
| 213 | |
| 214 | static inline void |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 215 | sanitize_restored_user_xstate(union fpregs_state *state, |
| 216 | struct user_i387_ia32_struct *ia32_env, |
| 217 | u64 user_xfeatures, int fx_only) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 218 | { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 219 | struct xregs_state *xsave = &state->xsave; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 220 | struct xstate_header *header = &xsave->header; |
| 221 | |
| 222 | if (use_xsave()) { |
| 223 | /* |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 224 | * Clear all feature bits which are not set in |
| 225 | * user_xfeatures and clear all extended features |
| 226 | * for fx_only mode. |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 227 | */ |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 228 | u64 mask = fx_only ? XFEATURE_MASK_FPSSE : user_xfeatures; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 229 | |
| 230 | /* |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 231 | * Supervisor state has to be preserved. The sigframe |
| 232 | * restore can only modify user features, i.e. @mask |
| 233 | * cannot contain them. |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 234 | */ |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 235 | header->xfeatures &= mask | xfeatures_mask_supervisor(); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 236 | } |
| 237 | |
| 238 | if (use_fxsr()) { |
| 239 | /* |
| 240 | * mscsr reserved bits must be masked to zero for security |
| 241 | * reasons. |
| 242 | */ |
| 243 | xsave->i387.mxcsr &= mxcsr_feature_mask; |
| 244 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 245 | if (ia32_env) |
| 246 | convert_to_fxsr(&state->fxsave, ia32_env); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 247 | } |
| 248 | } |
| 249 | |
| 250 | /* |
| 251 | * Restore the extended state if present. Otherwise, restore the FP/SSE state. |
| 252 | */ |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 253 | static int copy_user_to_fpregs_zeroing(void __user *buf, u64 xbv, int fx_only) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 254 | { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 255 | u64 init_bv; |
| 256 | int r; |
| 257 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 258 | if (use_xsave()) { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 259 | if (fx_only) { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 260 | init_bv = xfeatures_mask_user() & ~XFEATURE_MASK_FPSSE; |
| 261 | |
| 262 | r = copy_user_to_fxregs(buf); |
| 263 | if (!r) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 264 | copy_kernel_to_xregs(&init_fpstate.xsave, init_bv); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 265 | return r; |
| 266 | } else { |
| 267 | init_bv = xfeatures_mask_user() & ~xbv; |
| 268 | |
| 269 | r = copy_user_to_xregs(buf, xbv); |
| 270 | if (!r && unlikely(init_bv)) |
| 271 | copy_kernel_to_xregs(&init_fpstate.xsave, init_bv); |
| 272 | return r; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 273 | } |
| 274 | } else if (use_fxsr()) { |
| 275 | return copy_user_to_fxregs(buf); |
| 276 | } else |
| 277 | return copy_user_to_fregs(buf); |
| 278 | } |
| 279 | |
| 280 | static int __fpu__restore_sig(void __user *buf, void __user *buf_fx, int size) |
| 281 | { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 282 | struct user_i387_ia32_struct *envp = NULL; |
| 283 | int state_size = fpu_kernel_xstate_size; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 284 | int ia32_fxstate = (buf != buf_fx); |
| 285 | struct task_struct *tsk = current; |
| 286 | struct fpu *fpu = &tsk->thread.fpu; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 287 | struct user_i387_ia32_struct env; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 288 | u64 user_xfeatures = 0; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 289 | int fx_only = 0; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 290 | int ret = 0; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 291 | |
| 292 | ia32_fxstate &= (IS_ENABLED(CONFIG_X86_32) || |
| 293 | IS_ENABLED(CONFIG_IA32_EMULATION)); |
| 294 | |
| 295 | if (!buf) { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 296 | fpu__clear_user_states(fpu); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 297 | return 0; |
| 298 | } |
| 299 | |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 300 | if (!access_ok(buf, size)) { |
| 301 | ret = -EACCES; |
| 302 | goto out; |
| 303 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 304 | |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 305 | if (!static_cpu_has(X86_FEATURE_FPU)) { |
| 306 | ret = fpregs_soft_set(current, NULL, 0, |
| 307 | sizeof(struct user_i387_ia32_struct), |
| 308 | NULL, buf); |
| 309 | goto out; |
| 310 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 311 | |
| 312 | if (use_xsave()) { |
| 313 | struct _fpx_sw_bytes fx_sw_user; |
| 314 | if (unlikely(check_for_xstate(buf_fx, buf_fx, &fx_sw_user))) { |
| 315 | /* |
| 316 | * Couldn't find the extended state information in the |
| 317 | * memory layout. Restore just the FP/SSE and init all |
| 318 | * the other extended state. |
| 319 | */ |
| 320 | state_size = sizeof(struct fxregs_state); |
| 321 | fx_only = 1; |
| 322 | trace_x86_fpu_xstate_check_failed(fpu); |
| 323 | } else { |
| 324 | state_size = fx_sw_user.xstate_size; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 325 | user_xfeatures = fx_sw_user.xfeatures; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 326 | } |
| 327 | } |
| 328 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 329 | if ((unsigned long)buf_fx % 64) |
| 330 | fx_only = 1; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 331 | |
| 332 | if (!ia32_fxstate) { |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 333 | /* |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 334 | * Attempt to restore the FPU registers directly from user |
| 335 | * memory. For that to succeed, the user access cannot cause |
| 336 | * page faults. If it does, fall back to the slow path below, |
| 337 | * going through the kernel buffer with the enabled pagefault |
| 338 | * handler. |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 339 | */ |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 340 | fpregs_lock(); |
| 341 | pagefault_disable(); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 342 | ret = copy_user_to_fpregs_zeroing(buf_fx, user_xfeatures, fx_only); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 343 | pagefault_enable(); |
| 344 | if (!ret) { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 345 | |
| 346 | /* |
| 347 | * Restore supervisor states: previous context switch |
| 348 | * etc has done XSAVES and saved the supervisor states |
| 349 | * in the kernel buffer from which they can be restored |
| 350 | * now. |
| 351 | * |
| 352 | * We cannot do a single XRSTORS here - which would |
| 353 | * be nice - because the rest of the FPU registers are |
| 354 | * being restored from a user buffer directly. The |
| 355 | * single XRSTORS happens below, when the user buffer |
| 356 | * has been copied to the kernel one. |
| 357 | */ |
| 358 | if (test_thread_flag(TIF_NEED_FPU_LOAD) && |
| 359 | xfeatures_mask_supervisor()) |
| 360 | copy_kernel_to_xregs(&fpu->state.xsave, |
| 361 | xfeatures_mask_supervisor()); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 362 | fpregs_mark_activate(); |
| 363 | fpregs_unlock(); |
| 364 | return 0; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 365 | } |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 366 | |
| 367 | /* |
| 368 | * The above did an FPU restore operation, restricted to |
| 369 | * the user portion of the registers, and failed, but the |
| 370 | * microcode might have modified the FPU registers |
| 371 | * nevertheless. |
| 372 | * |
| 373 | * If the FPU registers do not belong to current, then |
| 374 | * invalidate the FPU register state otherwise the task might |
| 375 | * preempt current and return to user space with corrupted |
| 376 | * FPU registers. |
| 377 | * |
| 378 | * In case current owns the FPU registers then no further |
| 379 | * action is required. The fixup below will handle it |
| 380 | * correctly. |
| 381 | */ |
| 382 | if (test_thread_flag(TIF_NEED_FPU_LOAD)) |
| 383 | __cpu_invalidate_fpregs_state(); |
| 384 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 385 | fpregs_unlock(); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 386 | } else { |
| 387 | /* |
| 388 | * For 32-bit frames with fxstate, copy the fxstate so it can |
| 389 | * be reconstructed later. |
| 390 | */ |
| 391 | ret = __copy_from_user(&env, buf, sizeof(env)); |
| 392 | if (ret) |
| 393 | goto out; |
| 394 | envp = &env; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 395 | } |
| 396 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 397 | /* |
| 398 | * By setting TIF_NEED_FPU_LOAD it is ensured that our xstate is |
| 399 | * not modified on context switch and that the xstate is considered |
| 400 | * to be loaded again on return to userland (overriding last_cpu avoids |
| 401 | * the optimisation). |
| 402 | */ |
| 403 | fpregs_lock(); |
| 404 | |
| 405 | if (!test_thread_flag(TIF_NEED_FPU_LOAD)) { |
| 406 | |
| 407 | /* |
| 408 | * Supervisor states are not modified by user space input. Save |
| 409 | * current supervisor states first and invalidate the FPU regs. |
| 410 | */ |
| 411 | if (xfeatures_mask_supervisor()) |
| 412 | copy_supervisor_to_kernel(&fpu->state.xsave); |
| 413 | set_thread_flag(TIF_NEED_FPU_LOAD); |
| 414 | } |
| 415 | __fpu_invalidate_fpregs_state(fpu); |
| 416 | fpregs_unlock(); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 417 | |
| 418 | if (use_xsave() && !fx_only) { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 419 | u64 init_bv = xfeatures_mask_user() & ~user_xfeatures; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 420 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 421 | ret = copy_user_to_xstate(&fpu->state.xsave, buf_fx); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 422 | if (ret) |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 423 | goto out; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 424 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 425 | sanitize_restored_user_xstate(&fpu->state, envp, user_xfeatures, |
| 426 | fx_only); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 427 | |
| 428 | fpregs_lock(); |
| 429 | if (unlikely(init_bv)) |
| 430 | copy_kernel_to_xregs(&init_fpstate.xsave, init_bv); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 431 | |
| 432 | /* |
| 433 | * Restore previously saved supervisor xstates along with |
| 434 | * copied-in user xstates. |
| 435 | */ |
| 436 | ret = copy_kernel_to_xregs_err(&fpu->state.xsave, |
| 437 | user_xfeatures | xfeatures_mask_supervisor()); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 438 | |
| 439 | } else if (use_fxsr()) { |
| 440 | ret = __copy_from_user(&fpu->state.fxsave, buf_fx, state_size); |
| 441 | if (ret) { |
| 442 | ret = -EFAULT; |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 443 | goto out; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 444 | } |
| 445 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 446 | sanitize_restored_user_xstate(&fpu->state, envp, user_xfeatures, |
| 447 | fx_only); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 448 | |
| 449 | fpregs_lock(); |
| 450 | if (use_xsave()) { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 451 | u64 init_bv; |
| 452 | |
| 453 | init_bv = xfeatures_mask_user() & ~XFEATURE_MASK_FPSSE; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 454 | copy_kernel_to_xregs(&init_fpstate.xsave, init_bv); |
| 455 | } |
| 456 | |
| 457 | ret = copy_kernel_to_fxregs_err(&fpu->state.fxsave); |
| 458 | } else { |
| 459 | ret = __copy_from_user(&fpu->state.fsave, buf_fx, state_size); |
| 460 | if (ret) |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 461 | goto out; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 462 | |
| 463 | fpregs_lock(); |
| 464 | ret = copy_kernel_to_fregs_err(&fpu->state.fsave); |
| 465 | } |
| 466 | if (!ret) |
| 467 | fpregs_mark_activate(); |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 468 | else |
| 469 | fpregs_deactivate(fpu); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 470 | fpregs_unlock(); |
| 471 | |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 472 | out: |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 473 | if (ret) |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 474 | fpu__clear_user_states(fpu); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 475 | return ret; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 476 | } |
| 477 | |
| 478 | static inline int xstate_sigframe_size(void) |
| 479 | { |
| 480 | return use_xsave() ? fpu_user_xstate_size + FP_XSTATE_MAGIC2_SIZE : |
| 481 | fpu_user_xstate_size; |
| 482 | } |
| 483 | |
| 484 | /* |
| 485 | * Restore FPU state from a sigframe: |
| 486 | */ |
| 487 | int fpu__restore_sig(void __user *buf, int ia32_frame) |
| 488 | { |
| 489 | void __user *buf_fx = buf; |
| 490 | int size = xstate_sigframe_size(); |
| 491 | |
| 492 | if (ia32_frame && use_fxsr()) { |
| 493 | buf_fx = buf + sizeof(struct fregs_state); |
| 494 | size += sizeof(struct fregs_state); |
| 495 | } |
| 496 | |
| 497 | return __fpu__restore_sig(buf, buf_fx, size); |
| 498 | } |
| 499 | |
| 500 | unsigned long |
| 501 | fpu__alloc_mathframe(unsigned long sp, int ia32_frame, |
| 502 | unsigned long *buf_fx, unsigned long *size) |
| 503 | { |
| 504 | unsigned long frame_size = xstate_sigframe_size(); |
| 505 | |
| 506 | *buf_fx = sp = round_down(sp - frame_size, 64); |
| 507 | if (ia32_frame && use_fxsr()) { |
| 508 | frame_size += sizeof(struct fregs_state); |
| 509 | sp -= sizeof(struct fregs_state); |
| 510 | } |
| 511 | |
| 512 | *size = frame_size; |
| 513 | |
| 514 | return sp; |
| 515 | } |
| 516 | /* |
| 517 | * Prepare the SW reserved portion of the fxsave memory layout, indicating |
| 518 | * the presence of the extended state information in the memory layout |
| 519 | * pointed by the fpstate pointer in the sigcontext. |
| 520 | * This will be saved when ever the FP and extended state context is |
| 521 | * saved on the user stack during the signal handler delivery to the user. |
| 522 | */ |
| 523 | void fpu__init_prepare_fx_sw_frame(void) |
| 524 | { |
| 525 | int size = fpu_user_xstate_size + FP_XSTATE_MAGIC2_SIZE; |
| 526 | |
| 527 | fx_sw_reserved.magic1 = FP_XSTATE_MAGIC1; |
| 528 | fx_sw_reserved.extended_size = size; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 529 | fx_sw_reserved.xfeatures = xfeatures_mask_user(); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 530 | fx_sw_reserved.xstate_size = fpu_user_xstate_size; |
| 531 | |
| 532 | if (IS_ENABLED(CONFIG_IA32_EMULATION) || |
| 533 | IS_ENABLED(CONFIG_X86_32)) { |
| 534 | int fsave_header_size = sizeof(struct fregs_state); |
| 535 | |
| 536 | fx_sw_reserved_ia32 = fx_sw_reserved; |
| 537 | fx_sw_reserved_ia32.extended_size = size + fsave_header_size; |
| 538 | } |
| 539 | } |
| 540 | |