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David Brazdil0f672f62019-12-10 10:32:29 +00001/* SPDX-License-Identifier: GPL-2.0-or-later */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002/*
3 * This file contains miscellaneous low-level functions.
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 *
6 * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
7 * and Paul Mackerras.
8 *
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009 */
10
11#include <linux/sys.h>
12#include <asm/unistd.h>
13#include <asm/errno.h>
14#include <asm/reg.h>
15#include <asm/page.h>
16#include <asm/cache.h>
17#include <asm/cputable.h>
18#include <asm/mmu.h>
19#include <asm/ppc_asm.h>
20#include <asm/thread_info.h>
21#include <asm/asm-offsets.h>
22#include <asm/processor.h>
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000023#include <asm/bug.h>
24#include <asm/ptrace.h>
25#include <asm/export.h>
26#include <asm/feature-fixups.h>
27
28 .text
29
30/*
31 * We store the saved ksp_limit in the unused part
32 * of the STACK_FRAME_OVERHEAD
33 */
34_GLOBAL(call_do_softirq)
35 mflr r0
36 stw r0,4(r1)
37 lwz r10,THREAD+KSP_LIMIT(r2)
David Brazdil0f672f62019-12-10 10:32:29 +000038 stw r3, THREAD+KSP_LIMIT(r2)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000039 stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r3)
40 mr r1,r3
41 stw r10,8(r1)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000042 bl __do_softirq
43 lwz r10,8(r1)
44 lwz r1,0(r1)
45 lwz r0,4(r1)
46 stw r10,THREAD+KSP_LIMIT(r2)
47 mtlr r0
48 blr
49
50/*
David Brazdil0f672f62019-12-10 10:32:29 +000051 * void call_do_irq(struct pt_regs *regs, void *sp);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000052 */
53_GLOBAL(call_do_irq)
54 mflr r0
55 stw r0,4(r1)
56 lwz r10,THREAD+KSP_LIMIT(r2)
David Brazdil0f672f62019-12-10 10:32:29 +000057 stw r4, THREAD+KSP_LIMIT(r2)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000058 stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r4)
59 mr r1,r4
60 stw r10,8(r1)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000061 bl __do_irq
62 lwz r10,8(r1)
63 lwz r1,0(r1)
64 lwz r0,4(r1)
65 stw r10,THREAD+KSP_LIMIT(r2)
66 mtlr r0
67 blr
68
69/*
70 * This returns the high 64 bits of the product of two 64-bit numbers.
71 */
72_GLOBAL(mulhdu)
73 cmpwi r6,0
74 cmpwi cr1,r3,0
75 mr r10,r4
76 mulhwu r4,r4,r5
77 beq 1f
78 mulhwu r0,r10,r6
79 mullw r7,r10,r5
80 addc r7,r0,r7
81 addze r4,r4
821: beqlr cr1 /* all done if high part of A is 0 */
83 mullw r9,r3,r5
84 mulhwu r10,r3,r5
85 beq 2f
86 mullw r0,r3,r6
87 mulhwu r8,r3,r6
88 addc r7,r0,r7
89 adde r4,r4,r8
90 addze r10,r10
912: addc r4,r4,r9
92 addze r3,r10
93 blr
94
95/*
96 * reloc_got2 runs through the .got2 section adding an offset
97 * to each entry.
98 */
99_GLOBAL(reloc_got2)
100 mflr r11
101 lis r7,__got2_start@ha
102 addi r7,r7,__got2_start@l
103 lis r8,__got2_end@ha
104 addi r8,r8,__got2_end@l
105 subf r8,r7,r8
106 srwi. r8,r8,2
107 beqlr
108 mtctr r8
109 bl 1f
1101: mflr r0
111 lis r4,1b@ha
112 addi r4,r4,1b@l
113 subf r0,r4,r0
114 add r7,r0,r7
1152: lwz r0,0(r7)
116 add r0,r0,r3
117 stw r0,0(r7)
118 addi r7,r7,4
119 bdnz 2b
120 mtlr r11
121 blr
122
123/*
124 * call_setup_cpu - call the setup_cpu function for this cpu
125 * r3 = data offset, r24 = cpu number
126 *
127 * Setup function is called with:
128 * r3 = data offset
129 * r4 = ptr to CPU spec (relocated)
130 */
131_GLOBAL(call_setup_cpu)
132 addis r4,r3,cur_cpu_spec@ha
133 addi r4,r4,cur_cpu_spec@l
134 lwz r4,0(r4)
135 add r4,r4,r3
136 lwz r5,CPU_SPEC_SETUP(r4)
137 cmpwi 0,r5,0
138 add r5,r5,r3
139 beqlr
140 mtctr r5
141 bctr
142
David Brazdil0f672f62019-12-10 10:32:29 +0000143#if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_PPC_BOOK3S_32)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000144
145/* This gets called by via-pmu.c to switch the PLL selection
146 * on 750fx CPU. This function should really be moved to some
147 * other place (as most of the cpufreq code in via-pmu
148 */
149_GLOBAL(low_choose_750fx_pll)
150 /* Clear MSR:EE */
151 mfmsr r7
152 rlwinm r0,r7,0,17,15
153 mtmsr r0
154
155 /* If switching to PLL1, disable HID0:BTIC */
156 cmplwi cr0,r3,0
157 beq 1f
158 mfspr r5,SPRN_HID0
159 rlwinm r5,r5,0,27,25
160 sync
161 mtspr SPRN_HID0,r5
162 isync
163 sync
164
1651:
166 /* Calc new HID1 value */
167 mfspr r4,SPRN_HID1 /* Build a HID1:PS bit from parameter */
168 rlwinm r5,r3,16,15,15 /* Clear out HID1:PS from value read */
169 rlwinm r4,r4,0,16,14 /* Could have I used rlwimi here ? */
170 or r4,r4,r5
171 mtspr SPRN_HID1,r4
172
David Brazdil0f672f62019-12-10 10:32:29 +0000173#ifdef CONFIG_SMP
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000174 /* Store new HID1 image */
David Brazdil0f672f62019-12-10 10:32:29 +0000175 lwz r6,TASK_CPU(r2)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000176 slwi r6,r6,2
David Brazdil0f672f62019-12-10 10:32:29 +0000177#else
178 li r6, 0
179#endif
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000180 addis r6,r6,nap_save_hid1@ha
181 stw r4,nap_save_hid1@l(r6)
182
183 /* If switching to PLL0, enable HID0:BTIC */
184 cmplwi cr0,r3,0
185 bne 1f
186 mfspr r5,SPRN_HID0
187 ori r5,r5,HID0_BTIC
188 sync
189 mtspr SPRN_HID0,r5
190 isync
191 sync
192
1931:
194 /* Return */
195 mtmsr r7
196 blr
197
198_GLOBAL(low_choose_7447a_dfs)
199 /* Clear MSR:EE */
200 mfmsr r7
201 rlwinm r0,r7,0,17,15
202 mtmsr r0
203
204 /* Calc new HID1 value */
205 mfspr r4,SPRN_HID1
206 insrwi r4,r3,1,9 /* insert parameter into bit 9 */
207 sync
208 mtspr SPRN_HID1,r4
209 sync
210 isync
211
212 /* Return */
213 mtmsr r7
214 blr
215
David Brazdil0f672f62019-12-10 10:32:29 +0000216#endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_PPC_BOOK3S_32 */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000217
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000218#ifdef CONFIG_40x
219
220/*
221 * Do an IO access in real mode
222 */
223_GLOBAL(real_readb)
224 mfmsr r7
225 rlwinm r0,r7,0,~MSR_DR
226 sync
227 mtmsr r0
228 sync
229 isync
230 lbz r3,0(r3)
231 sync
232 mtmsr r7
233 sync
234 isync
235 blr
Olivier Deprez157378f2022-04-04 15:47:50 +0200236_ASM_NOKPROBE_SYMBOL(real_readb)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000237
238 /*
239 * Do an IO access in real mode
240 */
241_GLOBAL(real_writeb)
242 mfmsr r7
243 rlwinm r0,r7,0,~MSR_DR
244 sync
245 mtmsr r0
246 sync
247 isync
248 stb r3,0(r4)
249 sync
250 mtmsr r7
251 sync
252 isync
253 blr
Olivier Deprez157378f2022-04-04 15:47:50 +0200254_ASM_NOKPROBE_SYMBOL(real_writeb)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000255
256#endif /* CONFIG_40x */
257
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000258/*
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000259 * Copy a whole page. We use the dcbz instruction on the destination
260 * to reduce memory traffic (it eliminates the unnecessary reads of
261 * the destination into cache). This requires that the destination
262 * is cacheable.
263 */
264#define COPY_16_BYTES \
265 lwz r6,4(r4); \
266 lwz r7,8(r4); \
267 lwz r8,12(r4); \
268 lwzu r9,16(r4); \
269 stw r6,4(r3); \
270 stw r7,8(r3); \
271 stw r8,12(r3); \
272 stwu r9,16(r3)
273
274_GLOBAL(copy_page)
David Brazdil0f672f62019-12-10 10:32:29 +0000275 rlwinm r5, r3, 0, L1_CACHE_BYTES - 1
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000276 addi r3,r3,-4
David Brazdil0f672f62019-12-10 10:32:29 +0000277
2780: twnei r5, 0 /* WARN if r3 is not cache aligned */
279 EMIT_BUG_ENTRY 0b,__FILE__,__LINE__, BUGFLAG_WARNING
280
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000281 addi r4,r4,-4
282
283 li r5,4
284
285#if MAX_COPY_PREFETCH > 1
286 li r0,MAX_COPY_PREFETCH
287 li r11,4
288 mtctr r0
28911: dcbt r11,r4
290 addi r11,r11,L1_CACHE_BYTES
291 bdnz 11b
292#else /* MAX_COPY_PREFETCH == 1 */
293 dcbt r5,r4
294 li r11,L1_CACHE_BYTES+4
295#endif /* MAX_COPY_PREFETCH */
296 li r0,PAGE_SIZE/L1_CACHE_BYTES - MAX_COPY_PREFETCH
297 crclr 4*cr0+eq
2982:
299 mtctr r0
3001:
301 dcbt r11,r4
302 dcbz r5,r3
303 COPY_16_BYTES
304#if L1_CACHE_BYTES >= 32
305 COPY_16_BYTES
306#if L1_CACHE_BYTES >= 64
307 COPY_16_BYTES
308 COPY_16_BYTES
309#if L1_CACHE_BYTES >= 128
310 COPY_16_BYTES
311 COPY_16_BYTES
312 COPY_16_BYTES
313 COPY_16_BYTES
314#endif
315#endif
316#endif
317 bdnz 1b
318 beqlr
319 crnot 4*cr0+eq,4*cr0+eq
320 li r0,MAX_COPY_PREFETCH
321 li r11,4
322 b 2b
323EXPORT_SYMBOL(copy_page)
324
325/*
326 * Extended precision shifts.
327 *
328 * Updated to be valid for shift counts from 0 to 63 inclusive.
329 * -- Gabriel
330 *
331 * R3/R4 has 64 bit value
332 * R5 has shift count
333 * result in R3/R4
334 *
335 * ashrdi3: arithmetic right shift (sign propagation)
336 * lshrdi3: logical right shift
337 * ashldi3: left shift
338 */
339_GLOBAL(__ashrdi3)
340 subfic r6,r5,32
341 srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count
342 addi r7,r5,32 # could be xori, or addi with -32
343 slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
344 rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0
345 sraw r7,r3,r7 # t2 = MSW >> (count-32)
346 or r4,r4,r6 # LSW |= t1
347 slw r7,r7,r8 # t2 = (count < 32) ? 0 : t2
348 sraw r3,r3,r5 # MSW = MSW >> count
349 or r4,r4,r7 # LSW |= t2
350 blr
351EXPORT_SYMBOL(__ashrdi3)
352
353_GLOBAL(__ashldi3)
354 subfic r6,r5,32
355 slw r3,r3,r5 # MSW = count > 31 ? 0 : MSW << count
356 addi r7,r5,32 # could be xori, or addi with -32
357 srw r6,r4,r6 # t1 = count > 31 ? 0 : LSW >> (32-count)
358 slw r7,r4,r7 # t2 = count < 32 ? 0 : LSW << (count-32)
359 or r3,r3,r6 # MSW |= t1
360 slw r4,r4,r5 # LSW = LSW << count
361 or r3,r3,r7 # MSW |= t2
362 blr
363EXPORT_SYMBOL(__ashldi3)
364
365_GLOBAL(__lshrdi3)
366 subfic r6,r5,32
367 srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count
368 addi r7,r5,32 # could be xori, or addi with -32
369 slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
370 srw r7,r3,r7 # t2 = count < 32 ? 0 : MSW >> (count-32)
371 or r4,r4,r6 # LSW |= t1
372 srw r3,r3,r5 # MSW = MSW >> count
373 or r4,r4,r7 # LSW |= t2
374 blr
375EXPORT_SYMBOL(__lshrdi3)
376
377/*
378 * 64-bit comparison: __cmpdi2(s64 a, s64 b)
379 * Returns 0 if a < b, 1 if a == b, 2 if a > b.
380 */
381_GLOBAL(__cmpdi2)
382 cmpw r3,r5
383 li r3,1
384 bne 1f
385 cmplw r4,r6
386 beqlr
3871: li r3,0
388 bltlr
389 li r3,2
390 blr
391EXPORT_SYMBOL(__cmpdi2)
392/*
393 * 64-bit comparison: __ucmpdi2(u64 a, u64 b)
394 * Returns 0 if a < b, 1 if a == b, 2 if a > b.
395 */
396_GLOBAL(__ucmpdi2)
397 cmplw r3,r5
398 li r3,1
399 bne 1f
400 cmplw r4,r6
401 beqlr
4021: li r3,0
403 bltlr
404 li r3,2
405 blr
406EXPORT_SYMBOL(__ucmpdi2)
407
408_GLOBAL(__bswapdi2)
409 rotlwi r9,r4,8
410 rotlwi r10,r3,8
411 rlwimi r9,r4,24,0,7
412 rlwimi r10,r3,24,0,7
413 rlwimi r9,r4,24,16,23
414 rlwimi r10,r3,24,16,23
415 mr r3,r9
416 mr r4,r10
417 blr
418EXPORT_SYMBOL(__bswapdi2)
419
420#ifdef CONFIG_SMP
421_GLOBAL(start_secondary_resume)
422 /* Reset stack */
David Brazdil0f672f62019-12-10 10:32:29 +0000423 rlwinm r1, r1, 0, 0, 31 - THREAD_SHIFT
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000424 addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
425 li r3,0
426 stw r3,0(r1) /* Zero the stack frame pointer */
427 bl start_secondary
428 b .
429#endif /* CONFIG_SMP */
430
431/*
432 * This routine is just here to keep GCC happy - sigh...
433 */
434_GLOBAL(__main)
435 blr