David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * arch/arm/include/asm/tlb.h |
| 4 | * |
| 5 | * Copyright (C) 2002 Russell King |
| 6 | * |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 7 | * Experimentation shows that on a StrongARM, it appears to be faster |
| 8 | * to use the "invalidate whole tlb" rather than "invalidate single |
| 9 | * tlb" for this. |
| 10 | * |
| 11 | * This appears true for both the process fork+exit case, as well as |
| 12 | * the munmap-large-area case. |
| 13 | */ |
| 14 | #ifndef __ASMARM_TLB_H |
| 15 | #define __ASMARM_TLB_H |
| 16 | |
| 17 | #include <asm/cacheflush.h> |
| 18 | |
| 19 | #ifndef CONFIG_MMU |
| 20 | |
| 21 | #include <linux/pagemap.h> |
| 22 | |
| 23 | #define tlb_flush(tlb) ((void) tlb) |
| 24 | |
| 25 | #include <asm-generic/tlb.h> |
| 26 | |
| 27 | #else /* !CONFIG_MMU */ |
| 28 | |
| 29 | #include <linux/swap.h> |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 30 | #include <asm/tlbflush.h> |
| 31 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 32 | static inline void __tlb_remove_table(void *_table) |
| 33 | { |
| 34 | free_page_and_swap_cache((struct page *)_table); |
| 35 | } |
| 36 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 37 | #include <asm-generic/tlb.h> |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 38 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 39 | static inline void |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 40 | __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, unsigned long addr) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 41 | { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 42 | pgtable_pte_page_dtor(pte); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 43 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 44 | #ifndef CONFIG_ARM_LPAE |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 45 | /* |
| 46 | * With the classic ARM MMU, a pte page has two corresponding pmd |
| 47 | * entries, each covering 1MB. |
| 48 | */ |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 49 | addr = (addr & PMD_MASK) + SZ_1M; |
| 50 | __tlb_adjust_range(tlb, addr - PAGE_SIZE, 2 * PAGE_SIZE); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 51 | #endif |
| 52 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 53 | tlb_remove_table(tlb, pte); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 54 | } |
| 55 | |
| 56 | static inline void |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 57 | __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp, unsigned long addr) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 58 | { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 59 | #ifdef CONFIG_ARM_LPAE |
| 60 | struct page *page = virt_to_page(pmdp); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 61 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 62 | pgtable_pmd_page_dtor(page); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 63 | tlb_remove_table(tlb, page); |
| 64 | #endif |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 65 | } |
| 66 | |
| 67 | #endif /* CONFIG_MMU */ |
| 68 | #endif |