Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) |
| 2 | /* |
| 3 | * Copyright (C) STMicroelectronics 2017 - All Rights Reserved |
| 4 | * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics. |
| 5 | */ |
| 6 | /dts-v1/; |
| 7 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 8 | #include "stm32mp157.dtsi" |
| 9 | #include "stm32mp15xc.dtsi" |
| 10 | #include "stm32mp15-pinctrl.dtsi" |
| 11 | #include "stm32mp15xxaa-pinctrl.dtsi" |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 12 | #include <dt-bindings/gpio/gpio.h> |
| 13 | #include <dt-bindings/mfd/st,stpmic1.h> |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 14 | |
| 15 | / { |
| 16 | model = "STMicroelectronics STM32MP157C eval daughter"; |
| 17 | compatible = "st,stm32mp157c-ed1", "st,stm32mp157"; |
| 18 | |
| 19 | chosen { |
| 20 | stdout-path = "serial0:115200n8"; |
| 21 | }; |
| 22 | |
| 23 | memory@c0000000 { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 24 | device_type = "memory"; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 25 | reg = <0xC0000000 0x40000000>; |
| 26 | }; |
| 27 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 28 | reserved-memory { |
| 29 | #address-cells = <1>; |
| 30 | #size-cells = <1>; |
| 31 | ranges; |
| 32 | |
| 33 | mcuram2: mcuram2@10000000 { |
| 34 | compatible = "shared-dma-pool"; |
| 35 | reg = <0x10000000 0x40000>; |
| 36 | no-map; |
| 37 | }; |
| 38 | |
| 39 | vdev0vring0: vdev0vring0@10040000 { |
| 40 | compatible = "shared-dma-pool"; |
| 41 | reg = <0x10040000 0x1000>; |
| 42 | no-map; |
| 43 | }; |
| 44 | |
| 45 | vdev0vring1: vdev0vring1@10041000 { |
| 46 | compatible = "shared-dma-pool"; |
| 47 | reg = <0x10041000 0x1000>; |
| 48 | no-map; |
| 49 | }; |
| 50 | |
| 51 | vdev0buffer: vdev0buffer@10042000 { |
| 52 | compatible = "shared-dma-pool"; |
| 53 | reg = <0x10042000 0x4000>; |
| 54 | no-map; |
| 55 | }; |
| 56 | |
| 57 | mcuram: mcuram@30000000 { |
| 58 | compatible = "shared-dma-pool"; |
| 59 | reg = <0x30000000 0x40000>; |
| 60 | no-map; |
| 61 | }; |
| 62 | |
| 63 | retram: retram@38000000 { |
| 64 | compatible = "shared-dma-pool"; |
| 65 | reg = <0x38000000 0x10000>; |
| 66 | no-map; |
| 67 | }; |
| 68 | |
| 69 | gpu_reserved: gpu@e8000000 { |
| 70 | reg = <0xe8000000 0x8000000>; |
| 71 | no-map; |
| 72 | }; |
| 73 | }; |
| 74 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 75 | aliases { |
| 76 | serial0 = &uart4; |
| 77 | }; |
| 78 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 79 | sd_switch: regulator-sd_switch { |
| 80 | compatible = "regulator-gpio"; |
| 81 | regulator-name = "sd_switch"; |
| 82 | regulator-min-microvolt = <1800000>; |
| 83 | regulator-max-microvolt = <2900000>; |
| 84 | regulator-type = "voltage"; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 85 | regulator-always-on; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 86 | |
| 87 | gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>; |
| 88 | gpios-states = <0>; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 89 | states = <1800000 0x1>, |
| 90 | <2900000 0x0>; |
| 91 | }; |
| 92 | |
| 93 | vin: vin { |
| 94 | compatible = "regulator-fixed"; |
| 95 | regulator-name = "vin"; |
| 96 | regulator-min-microvolt = <5000000>; |
| 97 | regulator-max-microvolt = <5000000>; |
| 98 | regulator-always-on; |
| 99 | }; |
| 100 | }; |
| 101 | |
| 102 | &adc { |
| 103 | /* ANA0, ANA1 are dedicated pins and don't need pinctrl: only in6. */ |
| 104 | pinctrl-0 = <&adc1_in6_pins_a>; |
| 105 | pinctrl-names = "default"; |
| 106 | vdd-supply = <&vdd>; |
| 107 | vdda-supply = <&vdda>; |
| 108 | vref-supply = <&vdda>; |
| 109 | status = "disabled"; |
| 110 | adc1: adc@0 { |
| 111 | st,adc-channels = <0 1 6>; |
| 112 | /* 16.5 ck_cycles sampling time */ |
| 113 | st,min-sample-time-nsecs = <400>; |
| 114 | status = "okay"; |
| 115 | }; |
| 116 | }; |
| 117 | |
| 118 | &dac { |
| 119 | pinctrl-names = "default"; |
| 120 | pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>; |
| 121 | vref-supply = <&vdda>; |
| 122 | status = "disabled"; |
| 123 | dac1: dac@1 { |
| 124 | status = "okay"; |
| 125 | }; |
| 126 | dac2: dac@2 { |
| 127 | status = "okay"; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 128 | }; |
| 129 | }; |
| 130 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 131 | &dts { |
| 132 | status = "okay"; |
| 133 | }; |
| 134 | |
| 135 | &gpu { |
| 136 | contiguous-area = <&gpu_reserved>; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 137 | }; |
| 138 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 139 | &i2c4 { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 140 | pinctrl-names = "default", "sleep"; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 141 | pinctrl-0 = <&i2c4_pins_a>; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 142 | pinctrl-1 = <&i2c4_sleep_pins_a>; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 143 | i2c-scl-rising-time-ns = <185>; |
| 144 | i2c-scl-falling-time-ns = <20>; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 145 | clock-frequency = <400000>; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 146 | status = "okay"; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 147 | /* spare dmas for other usage */ |
| 148 | /delete-property/dmas; |
| 149 | /delete-property/dma-names; |
| 150 | |
| 151 | pmic: stpmic@33 { |
| 152 | compatible = "st,stpmic1"; |
| 153 | reg = <0x33>; |
| 154 | interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; |
| 155 | interrupt-controller; |
| 156 | #interrupt-cells = <2>; |
| 157 | status = "okay"; |
| 158 | |
| 159 | regulators { |
| 160 | compatible = "st,stpmic1-regulators"; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 161 | buck1-supply = <&vin>; |
| 162 | buck2-supply = <&vin>; |
| 163 | buck3-supply = <&vin>; |
| 164 | buck4-supply = <&vin>; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 165 | ldo1-supply = <&v3v3>; |
| 166 | ldo2-supply = <&v3v3>; |
| 167 | ldo3-supply = <&vdd_ddr>; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 168 | ldo4-supply = <&vin>; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 169 | ldo5-supply = <&v3v3>; |
| 170 | ldo6-supply = <&v3v3>; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 171 | vref_ddr-supply = <&vin>; |
| 172 | boost-supply = <&vin>; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 173 | pwr_sw1-supply = <&bst_out>; |
| 174 | pwr_sw2-supply = <&bst_out>; |
| 175 | |
| 176 | vddcore: buck1 { |
| 177 | regulator-name = "vddcore"; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 178 | regulator-min-microvolt = <1200000>; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 179 | regulator-max-microvolt = <1350000>; |
| 180 | regulator-always-on; |
| 181 | regulator-initial-mode = <0>; |
| 182 | regulator-over-current-protection; |
| 183 | }; |
| 184 | |
| 185 | vdd_ddr: buck2 { |
| 186 | regulator-name = "vdd_ddr"; |
| 187 | regulator-min-microvolt = <1350000>; |
| 188 | regulator-max-microvolt = <1350000>; |
| 189 | regulator-always-on; |
| 190 | regulator-initial-mode = <0>; |
| 191 | regulator-over-current-protection; |
| 192 | }; |
| 193 | |
| 194 | vdd: buck3 { |
| 195 | regulator-name = "vdd"; |
| 196 | regulator-min-microvolt = <3300000>; |
| 197 | regulator-max-microvolt = <3300000>; |
| 198 | regulator-always-on; |
| 199 | st,mask-reset; |
| 200 | regulator-initial-mode = <0>; |
| 201 | regulator-over-current-protection; |
| 202 | }; |
| 203 | |
| 204 | v3v3: buck4 { |
| 205 | regulator-name = "v3v3"; |
| 206 | regulator-min-microvolt = <3300000>; |
| 207 | regulator-max-microvolt = <3300000>; |
| 208 | regulator-always-on; |
| 209 | regulator-over-current-protection; |
| 210 | regulator-initial-mode = <0>; |
| 211 | }; |
| 212 | |
| 213 | vdda: ldo1 { |
| 214 | regulator-name = "vdda"; |
| 215 | regulator-min-microvolt = <2900000>; |
| 216 | regulator-max-microvolt = <2900000>; |
| 217 | interrupts = <IT_CURLIM_LDO1 0>; |
| 218 | }; |
| 219 | |
| 220 | v2v8: ldo2 { |
| 221 | regulator-name = "v2v8"; |
| 222 | regulator-min-microvolt = <2800000>; |
| 223 | regulator-max-microvolt = <2800000>; |
| 224 | interrupts = <IT_CURLIM_LDO2 0>; |
| 225 | }; |
| 226 | |
| 227 | vtt_ddr: ldo3 { |
| 228 | regulator-name = "vtt_ddr"; |
| 229 | regulator-min-microvolt = <500000>; |
| 230 | regulator-max-microvolt = <750000>; |
| 231 | regulator-always-on; |
| 232 | regulator-over-current-protection; |
| 233 | }; |
| 234 | |
| 235 | vdd_usb: ldo4 { |
| 236 | regulator-name = "vdd_usb"; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 237 | interrupts = <IT_CURLIM_LDO4 0>; |
| 238 | }; |
| 239 | |
| 240 | vdd_sd: ldo5 { |
| 241 | regulator-name = "vdd_sd"; |
| 242 | regulator-min-microvolt = <2900000>; |
| 243 | regulator-max-microvolt = <2900000>; |
| 244 | interrupts = <IT_CURLIM_LDO5 0>; |
| 245 | regulator-boot-on; |
| 246 | }; |
| 247 | |
| 248 | v1v8: ldo6 { |
| 249 | regulator-name = "v1v8"; |
| 250 | regulator-min-microvolt = <1800000>; |
| 251 | regulator-max-microvolt = <1800000>; |
| 252 | interrupts = <IT_CURLIM_LDO6 0>; |
| 253 | }; |
| 254 | |
| 255 | vref_ddr: vref_ddr { |
| 256 | regulator-name = "vref_ddr"; |
| 257 | regulator-always-on; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 258 | }; |
| 259 | |
| 260 | bst_out: boost { |
| 261 | regulator-name = "bst_out"; |
| 262 | interrupts = <IT_OCP_BOOST 0>; |
| 263 | }; |
| 264 | |
| 265 | vbus_otg: pwr_sw1 { |
| 266 | regulator-name = "vbus_otg"; |
| 267 | interrupts = <IT_OCP_OTG 0>; |
| 268 | }; |
| 269 | |
| 270 | vbus_sw: pwr_sw2 { |
| 271 | regulator-name = "vbus_sw"; |
| 272 | interrupts = <IT_OCP_SWOUT 0>; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 273 | regulator-active-discharge = <1>; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 274 | }; |
| 275 | }; |
| 276 | |
| 277 | onkey { |
| 278 | compatible = "st,stpmic1-onkey"; |
| 279 | interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>; |
| 280 | interrupt-names = "onkey-falling", "onkey-rising"; |
| 281 | power-off-time-sec = <10>; |
| 282 | status = "okay"; |
| 283 | }; |
| 284 | |
| 285 | watchdog { |
| 286 | compatible = "st,stpmic1-wdt"; |
| 287 | status = "disabled"; |
| 288 | }; |
| 289 | }; |
| 290 | }; |
| 291 | |
| 292 | &ipcc { |
| 293 | status = "okay"; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 294 | }; |
| 295 | |
| 296 | &iwdg2 { |
| 297 | timeout-sec = <32>; |
| 298 | status = "okay"; |
| 299 | }; |
| 300 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 301 | &m4_rproc { |
| 302 | memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, |
| 303 | <&vdev0vring1>, <&vdev0buffer>; |
| 304 | mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; |
| 305 | mbox-names = "vq0", "vq1", "shutdown"; |
| 306 | interrupt-parent = <&exti>; |
| 307 | interrupts = <68 1>; |
| 308 | status = "okay"; |
| 309 | }; |
| 310 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 311 | &pwr_regulators { |
| 312 | vdd-supply = <&vdd>; |
| 313 | vdd_3v3_usbfs-supply = <&vdd_usb>; |
| 314 | }; |
| 315 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 316 | &rng1 { |
| 317 | status = "okay"; |
| 318 | }; |
| 319 | |
| 320 | &rtc { |
| 321 | status = "okay"; |
| 322 | }; |
| 323 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 324 | &sdmmc1 { |
| 325 | pinctrl-names = "default", "opendrain", "sleep"; |
| 326 | pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>; |
| 327 | pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>; |
| 328 | pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 329 | cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; |
| 330 | disable-wp; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 331 | st,sig-dir; |
| 332 | st,neg-edge; |
| 333 | st,use-ckin; |
| 334 | bus-width = <4>; |
| 335 | vmmc-supply = <&vdd_sd>; |
| 336 | vqmmc-supply = <&sd_switch>; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 337 | sd-uhs-sdr12; |
| 338 | sd-uhs-sdr25; |
| 339 | sd-uhs-sdr50; |
| 340 | sd-uhs-ddr50; |
| 341 | status = "okay"; |
| 342 | }; |
| 343 | |
| 344 | &sdmmc2 { |
| 345 | pinctrl-names = "default", "opendrain", "sleep"; |
| 346 | pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>; |
| 347 | pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>; |
| 348 | pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>; |
| 349 | non-removable; |
| 350 | no-sd; |
| 351 | no-sdio; |
| 352 | st,neg-edge; |
| 353 | bus-width = <8>; |
| 354 | vmmc-supply = <&v3v3>; |
| 355 | vqmmc-supply = <&vdd>; |
| 356 | mmc-ddr-3_3v; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 357 | status = "okay"; |
| 358 | }; |
| 359 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 360 | &timers6 { |
| 361 | status = "okay"; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 362 | /* spare dmas for other usage */ |
| 363 | /delete-property/dmas; |
| 364 | /delete-property/dma-names; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 365 | timer@5 { |
| 366 | status = "okay"; |
| 367 | }; |
| 368 | }; |
| 369 | |
| 370 | &uart4 { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 371 | pinctrl-names = "default", "sleep", "idle"; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 372 | pinctrl-0 = <&uart4_pins_a>; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 373 | pinctrl-1 = <&uart4_sleep_pins_a>; |
| 374 | pinctrl-2 = <&uart4_idle_pins_a>; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 375 | status = "okay"; |
| 376 | }; |
| 377 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 378 | &usbotg_hs { |
| 379 | vbus-supply = <&vbus_otg>; |
| 380 | }; |
| 381 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 382 | &usbphyc_port0 { |
| 383 | phy-supply = <&vdd_usb>; |
| 384 | vdda1v1-supply = <®11>; |
| 385 | vdda1v8-supply = <®18>; |
| 386 | }; |
| 387 | |
| 388 | &usbphyc_port1 { |
| 389 | phy-supply = <&vdd_usb>; |
| 390 | vdda1v1-supply = <®11>; |
| 391 | vdda1v8-supply = <®18>; |
| 392 | }; |