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review.trustedfirmware.org / hafnium / third_party / linux / 157378f43faad830e4aa3815bde5fa9f9a9f5be6 / . / arch / arm / boot / dts / omap3-echo.dts
blob: 93ffeddada1eb1a9c26c4d4da6dda5ff653e4239 [file] [log] [blame]
Olivier Deprez157378f2022-04-04 15:47:50 +0200[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2019 André Hentschel <nerv@dawncrow.de>
4 */
5/dts-v1/;
6
7#include "dm3725.dtsi"
8
9#include <dt-bindings/input/input.h>
10
11/ {
12 model = "Amazon Echo (first generation)";
13 compatible = "amazon,omap3-echo", "ti,omap3630", "ti,omap3";
14
15 cpus {
16 cpu@0 {
17 cpu0-supply = <&vdd1_reg>;
18 };
19 };
20
21 memory@80000000 {
22 device_type = "memory";
23 reg = <0x80000000 0xc600000>; /* 198 MB */
24 };
25
26 vcc5v: fixedregulator0 {
27 compatible = "regulator-fixed";
28 regulator-name = "vcc5v";
29 regulator-min-microvolt = <5000000>;
30 regulator-max-microvolt = <5000000>;
31 regulator-boot-on;
32 regulator-always-on;
33 };
34
35 vcc3v3: fixedregulator1 {
36 compatible = "regulator-fixed";
37 regulator-name = "vcc3v3";
38 regulator-min-microvolt = <3300000>;
39 regulator-max-microvolt = <3300000>;
40 regulator-boot-on;
41 regulator-always-on;
42 };
43
44 vcc1v8: fixedregulator2 {
45 compatible = "regulator-fixed";
46 regulator-name = "vcc1v8";
47 regulator-min-microvolt = <1800000>;
48 regulator-max-microvolt = <1800000>;
49 regulator-boot-on;
50 regulator-always-on;
51 };
52
53 sdio_pwrseq: sdio-pwrseq {
54 compatible = "mmc-pwrseq-simple";
55 reset-gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
56 post-power-on-delay-ms = <40>;
57 };
58
59 gpio-keys {
60 compatible = "gpio-keys";
61
62 pinctrl-names = "default";
63 pinctrl-0 = <&button_pins>;
64
65 mute-button {
66 label = "mute";
67 linux,code = <KEY_MUTE>;
68 gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; /* GPIO_70 */
69 wakeup-source;
70 };
71
72 help-button {
73 label = "help";
74 linux,code = <KEY_HELP>;
75 gpios = <&gpio3 8 GPIO_ACTIVE_LOW>; /* GPIO_72 */
76 wakeup-source;
77 };
78 };
79
80 rotary: rotary-encoder {
81 compatible = "rotary-encoder";
82 gpios = <
83 &gpio3 5 GPIO_ACTIVE_HIGH /* GPIO_69 */
84 &gpio3 12 GPIO_ACTIVE_HIGH /* GPIO_76 */
85 >;
86 linux,axis = <REL_X>;
87 rotary-encoder,relative-axis;
88 };
89};
90
91&i2c1 {
92 clock-frequency = <400000>;
93
94 tps: tps@2d {
95 reg = <0x2d>;
96 };
97};
98
99&i2c2 {
100 clock-frequency = <400000>;
101
102 lp5523A: lp5523A@32 {
103 compatible = "national,lp5523";
104 label = "q1";
105 reg = <0x32>;
106 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
107 enable-gpio = <&gpio4 13 GPIO_ACTIVE_HIGH>; /* GPIO_109 */
108
109 chan0 {
110 led-cur = /bits/ 8 <12>;
111 max-cur = /bits/ 8 <15>;
112 };
113 chan1 {
114 led-cur = /bits/ 8 <12>;
115 max-cur = /bits/ 8 <15>;
116 };
117 chan2 {
118 led-cur = /bits/ 8 <12>;
119 max-cur = /bits/ 8 <15>;
120 };
121 chan3 {
122 led-cur = /bits/ 8 <12>;
123 max-cur = /bits/ 8 <15>;
124 };
125 chan4 {
126 led-cur = /bits/ 8 <12>;
127 max-cur = /bits/ 8 <15>;
128 };
129 chan5 {
130 led-cur = /bits/ 8 <12>;
131 max-cur = /bits/ 8 <15>;
132 };
133 chan6 {
134 led-cur = /bits/ 8 <12>;
135 max-cur = /bits/ 8 <15>;
136 };
137 chan7 {
138 led-cur = /bits/ 8 <12>;
139 max-cur = /bits/ 8 <15>;
140 };
141 chan8 {
142 led-cur = /bits/ 8 <12>;
143 max-cur = /bits/ 8 <15>;
144 };
145 };
146
147 lp5523B: lp5523B@33 {
148 compatible = "national,lp5523";
149 label = "q3";
150 reg = <0x33>;
151 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
152
153 chan0 {
154 led-cur = /bits/ 8 <12>;
155 max-cur = /bits/ 8 <15>;
156 };
157 chan1 {
158 led-cur = /bits/ 8 <12>;
159 max-cur = /bits/ 8 <15>;
160 };
161 chan2 {
162 led-cur = /bits/ 8 <12>;
163 max-cur = /bits/ 8 <15>;
164 };
165 chan3 {
166 led-cur = /bits/ 8 <12>;
167 max-cur = /bits/ 8 <15>;
168 };
169 chan4 {
170 led-cur = /bits/ 8 <12>;
171 max-cur = /bits/ 8 <15>;
172 };
173 chan5 {
174 led-cur = /bits/ 8 <12>;
175 max-cur = /bits/ 8 <15>;
176 };
177 chan6 {
178 led-cur = /bits/ 8 <12>;
179 max-cur = /bits/ 8 <15>;
180 };
181 chan7 {
182 led-cur = /bits/ 8 <12>;
183 max-cur = /bits/ 8 <15>;
184 };
185 chan8 {
186 led-cur = /bits/ 8 <12>;
187 max-cur = /bits/ 8 <15>;
188 };
189 };
190
191 lp5523C: lp5523C@34 {
192 compatible = "national,lp5523";
193 label = "q4";
194 reg = <0x34>;
195 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
196
197 chan0 {
198 led-cur = /bits/ 8 <12>;
199 max-cur = /bits/ 8 <15>;
200 };
201 chan1 {
202 led-cur = /bits/ 8 <12>;
203 max-cur = /bits/ 8 <15>;
204 };
205 chan2 {
206 led-cur = /bits/ 8 <12>;
207 max-cur = /bits/ 8 <15>;
208 };
209 chan3 {
210 led-cur = /bits/ 8 <12>;
211 max-cur = /bits/ 8 <15>;
212 };
213 chan4 {
214 led-cur = /bits/ 8 <12>;
215 max-cur = /bits/ 8 <15>;
216 };
217 chan5 {
218 led-cur = /bits/ 8 <12>;
219 max-cur = /bits/ 8 <15>;
220 };
221 chan6 {
222 led-cur = /bits/ 8 <12>;
223 max-cur = /bits/ 8 <15>;
224 };
225 chan7 {
226 led-cur = /bits/ 8 <12>;
227 max-cur = /bits/ 8 <15>;
228 };
229 chan8 {
230 led-cur = /bits/ 8 <12>;
231 max-cur = /bits/ 8 <15>;
232 };
233 };
234
235 lp5523D: lp552D@35 {
236 compatible = "national,lp5523";
237 label = "q2";
238 reg = <0x35>;
239 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
240
241 chan0 {
242 led-cur = /bits/ 8 <12>;
243 max-cur = /bits/ 8 <15>;
244 };
245 chan1 {
246 led-cur = /bits/ 8 <12>;
247 max-cur = /bits/ 8 <15>;
248 };
249 chan2 {
250 led-cur = /bits/ 8 <12>;
251 max-cur = /bits/ 8 <15>;
252 };
253 chan3 {
254 led-cur = /bits/ 8 <12>;
255 max-cur = /bits/ 8 <15>;
256 };
257 chan4 {
258 led-cur = /bits/ 8 <12>;
259 max-cur = /bits/ 8 <15>;
260 };
261 chan5 {
262 led-cur = /bits/ 8 <12>;
263 max-cur = /bits/ 8 <15>;
264 };
265 chan6 {
266 led-cur = /bits/ 8 <12>;
267 max-cur = /bits/ 8 <15>;
268 };
269 chan7 {
270 led-cur = /bits/ 8 <12>;
271 max-cur = /bits/ 8 <15>;
272 };
273 chan8 {
274 led-cur = /bits/ 8 <12>;
275 max-cur = /bits/ 8 <15>;
276 };
277 };
278};
279
280#include "tps65910.dtsi"
281
282&omap3_pmx_core {
283 tps_pins: pinmux_tps_pins {
284 pinctrl-single,pins = <
285 OMAP3_CORE1_IOPAD(0x21e0, PIN_INPUT_PULLUP | PIN_OFF_INPUT_PULLUP | PIN_OFF_OUTPUT_LOW | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* sys_nirq.sys_nirq */
286 >;
287 };
288
289 button_pins: pinmux_button_pins {
290 pinctrl-single,pins = <
291 OMAP3_CORE1_IOPAD(0x20dc, PIN_INPUT | MUX_MODE4) /* dss_data0.gpio_70 */
292 OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4) /* dss_data2.gpio_72 */
293 >;
294 };
295
296 mmc1_pins: pinmux_mmc1_pins {
297 pinctrl-single,pins = <
298 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
299 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
300 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
301 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
302 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
303 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
304 >;
305 };
306
307 mmc2_pins: pinmux_mmc2_pins {
308 pinctrl-single,pins = <
309 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
310 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
311 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
312 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
313 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
314 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
315 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4.sdmmc2_dat4 */
316 OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5.sdmmc2_dat5 */
317 OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6.sdmmc2_dat6 */
318 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7.sdmmc2_dat7 */
319 >;
320 };
321};
322
323&omap3_pmx_core2 {
324 mmc3_pins: pinmux_mmc3_pins {
325 pinctrl-single,pins = <
326 OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_clk.sdmmc3_clk */
327 OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_ctl.sdmmc3_cmd */
328 OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d3.sdmmc3_dat3 */
329 OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d4.sdmmc3_dat0 */
330 OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d5.sdmmc3_dat1 */
331 OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d6.sdmmc3_dat2 */
332 >;
333 };
334};
335
336&mmc1 {
337 status = "okay";
338 bus-width = <4>;
339 pinctrl-names = "default";
340 pinctrl-0 = <&mmc1_pins>;
341 vmmc-supply = <&vmmc_reg>;
342};
343
344&mmc2 {
345 status = "okay";
346 bus-width = <8>;
347 pinctrl-names = "default";
348 pinctrl-0 = <&mmc2_pins>;
349 vmmc-supply = <&vmmc_reg>;
350};
351
352&mmc3 {
353 status = "okay";
354 bus-width = <4>;
355 pinctrl-names = "default";
356 pinctrl-0 = <&mmc3_pins>;
357 non-removable;
358 disable-wp;
359 mmc-pwrseq = <&sdio_pwrseq>;
360 vmmc-supply = <&vcc3v3>;
361 vqmmc-supply = <&vcc1v8>;
362};
363
364&tps {
365 pinctrl-names = "default";
366 pinctrl-0 = <&tps_pins>;
367
368 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
369 interrupt-parent = <&intc>;
370
371 ti,en-ck32k-xtal;
372 ti,system-power-controller;
373
374 vcc1-supply = <&vcc5v>;
375 vcc2-supply = <&vcc5v>;
376 vcc3-supply = <&vcc5v>;
377 vcc4-supply = <&vcc5v>;
378 vcc5-supply = <&vcc5v>;
379 vcc6-supply = <&vcc5v>;
380 vcc7-supply = <&vcc5v>;
381 vccio-supply = <&vcc5v>;
382
383 regulators {
384
385 vio_reg: regulator@1 {
386 regulator-min-microvolt = <1800000>;
387 regulator-max-microvolt = <1800000>;
388 regulator-always-on;
389 };
390
391 vdd1_reg: regulator@2 {
392 regulator-name = "vdd_mpu";
393 regulator-min-microvolt = <600000>;
394 regulator-max-microvolt = <1500000>;
395 regulator-boot-on;
396 regulator-always-on;
397 };
398
399 vdd2_reg: regulator@3 {
400 regulator-name = "vdd_dsp";
401 regulator-min-microvolt = <600000>;
402 regulator-max-microvolt = <1500000>;
403 regulator-always-on;
404 };
405
406 vdd3_reg: regulator@4 {
407 regulator-name = "vdd_core";
408 regulator-min-microvolt = <5000000>;
409 regulator-max-microvolt = <5000000>;
410 regulator-always-on;
411 };
412
413 vdig1_reg: regulator@5 {
414 regulator-min-microvolt = <1200000>;
415 regulator-max-microvolt = <2700000>;
416 regulator-always-on;
417 };
418
419 vdig2_reg: regulator@6 {
420 regulator-min-microvolt = <1000000>;
421 regulator-max-microvolt = <1800000>;
422 regulator-always-on;
423 };
424
425 vpll_reg: regulator@7 {
426 regulator-min-microvolt = <1000000>;
427 regulator-max-microvolt = <2500000>;
428 regulator-always-on;
429 };
430
431 vdac_reg: regulator@8 {
432 regulator-min-microvolt = <1100000>;
433 regulator-max-microvolt = <3300000>;
434 regulator-always-on;
435 };
436
437 vaux1_reg: regulator@9 {
438 regulator-min-microvolt = <1800000>;
439 regulator-max-microvolt = <2850000>;
440 regulator-always-on;
441 };
442
443 vaux2_reg: regulator@10 {
444 regulator-min-microvolt = <1800000>;
445 regulator-max-microvolt = <3300000>;
446 regulator-always-on;
447 };
448
449 vaux33_reg: regulator@11 {
450 regulator-min-microvolt = <1800000>;
451 regulator-max-microvolt = <3300000>;
452 regulator-always-on;
453 };
454
455 vmmc_reg: regulator@12 {
456 regulator-min-microvolt = <1800000>;
457 regulator-max-microvolt = <3000000>;
458 regulator-always-on;
459 };
460 };
461};