Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | FPGA Manager |
| 2 | ============ |
| 3 | |
| 4 | Overview |
| 5 | -------- |
| 6 | |
| 7 | The FPGA manager core exports a set of functions for programming an FPGA with |
| 8 | an image. The API is manufacturer agnostic. All manufacturer specifics are |
| 9 | hidden away in a low level driver which registers a set of ops with the core. |
| 10 | The FPGA image data itself is very manufacturer specific, but for our purposes |
| 11 | it's just binary data. The FPGA manager core won't parse it. |
| 12 | |
| 13 | The FPGA image to be programmed can be in a scatter gather list, a single |
| 14 | contiguous buffer, or a firmware file. Because allocating contiguous kernel |
| 15 | memory for the buffer should be avoided, users are encouraged to use a scatter |
| 16 | gather list instead if possible. |
| 17 | |
| 18 | The particulars for programming the image are presented in a structure (struct |
| 19 | fpga_image_info). This struct contains parameters such as pointers to the |
| 20 | FPGA image as well as image-specific particulars such as whether the image was |
| 21 | built for full or partial reconfiguration. |
| 22 | |
| 23 | How to support a new FPGA device |
| 24 | -------------------------------- |
| 25 | |
| 26 | To add another FPGA manager, write a driver that implements a set of ops. The |
| 27 | probe function calls fpga_mgr_register(), such as:: |
| 28 | |
| 29 | static const struct fpga_manager_ops socfpga_fpga_ops = { |
| 30 | .write_init = socfpga_fpga_ops_configure_init, |
| 31 | .write = socfpga_fpga_ops_configure_write, |
| 32 | .write_complete = socfpga_fpga_ops_configure_complete, |
| 33 | .state = socfpga_fpga_ops_state, |
| 34 | }; |
| 35 | |
| 36 | static int socfpga_fpga_probe(struct platform_device *pdev) |
| 37 | { |
| 38 | struct device *dev = &pdev->dev; |
| 39 | struct socfpga_fpga_priv *priv; |
| 40 | struct fpga_manager *mgr; |
| 41 | int ret; |
| 42 | |
| 43 | priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); |
| 44 | if (!priv) |
| 45 | return -ENOMEM; |
| 46 | |
| 47 | /* |
| 48 | * do ioremaps, get interrupts, etc. and save |
| 49 | * them in priv |
| 50 | */ |
| 51 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 52 | mgr = devm_fpga_mgr_create(dev, "Altera SOCFPGA FPGA Manager", |
| 53 | &socfpga_fpga_ops, priv); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 54 | if (!mgr) |
| 55 | return -ENOMEM; |
| 56 | |
| 57 | platform_set_drvdata(pdev, mgr); |
| 58 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 59 | return fpga_mgr_register(mgr); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 60 | } |
| 61 | |
| 62 | static int socfpga_fpga_remove(struct platform_device *pdev) |
| 63 | { |
| 64 | struct fpga_manager *mgr = platform_get_drvdata(pdev); |
| 65 | |
| 66 | fpga_mgr_unregister(mgr); |
| 67 | |
| 68 | return 0; |
| 69 | } |
| 70 | |
| 71 | |
| 72 | The ops will implement whatever device specific register writes are needed to |
| 73 | do the programming sequence for this particular FPGA. These ops return 0 for |
| 74 | success or negative error codes otherwise. |
| 75 | |
| 76 | The programming sequence is:: |
| 77 | 1. .write_init |
| 78 | 2. .write or .write_sg (may be called once or multiple times) |
| 79 | 3. .write_complete |
| 80 | |
| 81 | The .write_init function will prepare the FPGA to receive the image data. The |
| 82 | buffer passed into .write_init will be at most .initial_header_size bytes long; |
| 83 | if the whole bitstream is not immediately available then the core code will |
| 84 | buffer up at least this much before starting. |
| 85 | |
| 86 | The .write function writes a buffer to the FPGA. The buffer may be contain the |
| 87 | whole FPGA image or may be a smaller chunk of an FPGA image. In the latter |
| 88 | case, this function is called multiple times for successive chunks. This interface |
| 89 | is suitable for drivers which use PIO. |
| 90 | |
| 91 | The .write_sg version behaves the same as .write except the input is a sg_table |
| 92 | scatter list. This interface is suitable for drivers which use DMA. |
| 93 | |
| 94 | The .write_complete function is called after all the image has been written |
| 95 | to put the FPGA into operating mode. |
| 96 | |
| 97 | The ops include a .state function which will determine the state the FPGA is in |
| 98 | and return a code of type enum fpga_mgr_states. It doesn't result in a change |
| 99 | in state. |
| 100 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 101 | API for implementing a new FPGA Manager driver |
| 102 | ---------------------------------------------- |
| 103 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 104 | * ``fpga_mgr_states`` — Values for :c:expr:`fpga_manager->state`. |
| 105 | * struct fpga_manager — the FPGA manager struct |
| 106 | * struct fpga_manager_ops — Low level FPGA manager driver ops |
| 107 | * devm_fpga_mgr_create() — Allocate and init a manager struct |
| 108 | * fpga_mgr_register() — Register an FPGA manager |
| 109 | * fpga_mgr_unregister() — Unregister an FPGA manager |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 110 | |
| 111 | .. kernel-doc:: include/linux/fpga/fpga-mgr.h |
| 112 | :functions: fpga_mgr_states |
| 113 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 114 | .. kernel-doc:: include/linux/fpga/fpga-mgr.h |
| 115 | :functions: fpga_manager |
| 116 | |
| 117 | .. kernel-doc:: include/linux/fpga/fpga-mgr.h |
| 118 | :functions: fpga_manager_ops |
| 119 | |
| 120 | .. kernel-doc:: drivers/fpga/fpga-mgr.c |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 121 | :functions: devm_fpga_mgr_create |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 122 | |
| 123 | .. kernel-doc:: drivers/fpga/fpga-mgr.c |
| 124 | :functions: fpga_mgr_register |
| 125 | |
| 126 | .. kernel-doc:: drivers/fpga/fpga-mgr.c |
| 127 | :functions: fpga_mgr_unregister |