Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | /* |
| 2 | * HW exception handling |
| 3 | * |
| 4 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> |
| 5 | * Copyright (C) 2008 PetaLogix |
| 6 | * |
| 7 | * This file is subject to the terms and conditions of the GNU General |
| 8 | * Public License. See the file COPYING in the main directory of this |
| 9 | * archive for more details. |
| 10 | */ |
| 11 | |
| 12 | /* |
| 13 | * This file handles the architecture-dependent parts of hardware exceptions |
| 14 | */ |
| 15 | |
| 16 | #include <linux/export.h> |
| 17 | #include <linux/kernel.h> |
| 18 | #include <linux/signal.h> |
| 19 | #include <linux/sched.h> |
| 20 | #include <linux/sched/debug.h> |
| 21 | #include <linux/kallsyms.h> |
| 22 | |
| 23 | #include <asm/exceptions.h> |
| 24 | #include <asm/entry.h> /* For KM CPU var */ |
| 25 | #include <linux/uaccess.h> |
| 26 | #include <linux/errno.h> |
| 27 | #include <linux/ptrace.h> |
| 28 | #include <asm/current.h> |
| 29 | #include <asm/cacheflush.h> |
| 30 | |
| 31 | #define MICROBLAZE_ILL_OPCODE_EXCEPTION 0x02 |
| 32 | #define MICROBLAZE_IBUS_EXCEPTION 0x03 |
| 33 | #define MICROBLAZE_DBUS_EXCEPTION 0x04 |
| 34 | #define MICROBLAZE_DIV_ZERO_EXCEPTION 0x05 |
| 35 | #define MICROBLAZE_FPU_EXCEPTION 0x06 |
| 36 | #define MICROBLAZE_PRIVILEGED_EXCEPTION 0x07 |
| 37 | |
| 38 | static DEFINE_SPINLOCK(die_lock); |
| 39 | |
| 40 | void die(const char *str, struct pt_regs *fp, long err) |
| 41 | { |
| 42 | console_verbose(); |
| 43 | spin_lock_irq(&die_lock); |
| 44 | pr_warn("Oops: %s, sig: %ld\n", str, err); |
| 45 | show_regs(fp); |
| 46 | spin_unlock_irq(&die_lock); |
| 47 | /* do_exit() should take care of panic'ing from an interrupt |
| 48 | * context so we don't handle it here |
| 49 | */ |
| 50 | do_exit(err); |
| 51 | } |
| 52 | |
| 53 | /* for user application debugging */ |
| 54 | asmlinkage void sw_exception(struct pt_regs *regs) |
| 55 | { |
| 56 | _exception(SIGTRAP, regs, TRAP_BRKPT, regs->r16); |
| 57 | flush_dcache_range(regs->r16, regs->r16 + 0x4); |
| 58 | flush_icache_range(regs->r16, regs->r16 + 0x4); |
| 59 | } |
| 60 | |
| 61 | void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr) |
| 62 | { |
| 63 | if (kernel_mode(regs)) |
| 64 | die("Exception in kernel mode", regs, signr); |
| 65 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 66 | force_sig_fault(signr, code, (void __user *)addr); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 67 | } |
| 68 | |
| 69 | asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, |
| 70 | int fsr, int addr) |
| 71 | { |
| 72 | #ifdef CONFIG_MMU |
| 73 | addr = regs->pc; |
| 74 | #endif |
| 75 | |
| 76 | #if 0 |
| 77 | pr_warn("Exception %02x in %s mode, FSR=%08x PC=%08x ESR=%08x\n", |
| 78 | type, user_mode(regs) ? "user" : "kernel", fsr, |
| 79 | (unsigned int) regs->pc, (unsigned int) regs->esr); |
| 80 | #endif |
| 81 | |
| 82 | switch (type & 0x1F) { |
| 83 | case MICROBLAZE_ILL_OPCODE_EXCEPTION: |
| 84 | if (user_mode(regs)) { |
| 85 | pr_debug("Illegal opcode exception in user mode\n"); |
| 86 | _exception(SIGILL, regs, ILL_ILLOPC, addr); |
| 87 | return; |
| 88 | } |
| 89 | pr_warn("Illegal opcode exception in kernel mode.\n"); |
| 90 | die("opcode exception", regs, SIGBUS); |
| 91 | break; |
| 92 | case MICROBLAZE_IBUS_EXCEPTION: |
| 93 | if (user_mode(regs)) { |
| 94 | pr_debug("Instruction bus error exception in user mode\n"); |
| 95 | _exception(SIGBUS, regs, BUS_ADRERR, addr); |
| 96 | return; |
| 97 | } |
| 98 | pr_warn("Instruction bus error exception in kernel mode.\n"); |
| 99 | die("bus exception", regs, SIGBUS); |
| 100 | break; |
| 101 | case MICROBLAZE_DBUS_EXCEPTION: |
| 102 | if (user_mode(regs)) { |
| 103 | pr_debug("Data bus error exception in user mode\n"); |
| 104 | _exception(SIGBUS, regs, BUS_ADRERR, addr); |
| 105 | return; |
| 106 | } |
| 107 | pr_warn("Data bus error exception in kernel mode.\n"); |
| 108 | die("bus exception", regs, SIGBUS); |
| 109 | break; |
| 110 | case MICROBLAZE_DIV_ZERO_EXCEPTION: |
| 111 | if (user_mode(regs)) { |
| 112 | pr_debug("Divide by zero exception in user mode\n"); |
| 113 | _exception(SIGFPE, regs, FPE_INTDIV, addr); |
| 114 | return; |
| 115 | } |
| 116 | pr_warn("Divide by zero exception in kernel mode.\n"); |
| 117 | die("Divide by zero exception", regs, SIGBUS); |
| 118 | break; |
| 119 | case MICROBLAZE_FPU_EXCEPTION: |
| 120 | pr_debug("FPU exception\n"); |
| 121 | /* IEEE FP exception */ |
| 122 | /* I removed fsr variable and use code var for storing fsr */ |
| 123 | if (fsr & FSR_IO) |
| 124 | fsr = FPE_FLTINV; |
| 125 | else if (fsr & FSR_OF) |
| 126 | fsr = FPE_FLTOVF; |
| 127 | else if (fsr & FSR_UF) |
| 128 | fsr = FPE_FLTUND; |
| 129 | else if (fsr & FSR_DZ) |
| 130 | fsr = FPE_FLTDIV; |
| 131 | else if (fsr & FSR_DO) |
| 132 | fsr = FPE_FLTRES; |
| 133 | _exception(SIGFPE, regs, fsr, addr); |
| 134 | break; |
| 135 | |
| 136 | #ifdef CONFIG_MMU |
| 137 | case MICROBLAZE_PRIVILEGED_EXCEPTION: |
| 138 | pr_debug("Privileged exception\n"); |
| 139 | _exception(SIGILL, regs, ILL_PRVOPC, addr); |
| 140 | break; |
| 141 | #endif |
| 142 | default: |
| 143 | /* FIXME what to do in unexpected exception */ |
| 144 | pr_warn("Unexpected exception %02x PC=%08x in %s mode\n", |
| 145 | type, (unsigned int) addr, |
| 146 | kernel_mode(regs) ? "kernel" : "user"); |
| 147 | } |
| 148 | return; |
| 149 | } |