David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. |
| 4 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * i.MX27 specific CPU detection code |
| 9 | */ |
| 10 | |
| 11 | #include <linux/io.h> |
| 12 | #include <linux/module.h> |
| 13 | |
| 14 | #include "hardware.h" |
| 15 | |
| 16 | static int mx27_cpu_rev = -1; |
| 17 | static int mx27_cpu_partnumber; |
| 18 | |
| 19 | #define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */ |
| 20 | |
| 21 | static int mx27_read_cpu_rev(void) |
| 22 | { |
| 23 | u32 val; |
| 24 | /* |
| 25 | * now we have access to the IO registers. As we need |
| 26 | * the silicon revision very early we read it here to |
| 27 | * avoid any further hooks |
| 28 | */ |
| 29 | val = imx_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR + SYS_CHIP_ID)); |
| 30 | |
| 31 | mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF); |
| 32 | |
| 33 | switch (val >> 28) { |
| 34 | case 0: |
| 35 | return IMX_CHIP_REVISION_1_0; |
| 36 | case 1: |
| 37 | return IMX_CHIP_REVISION_2_0; |
| 38 | case 2: |
| 39 | return IMX_CHIP_REVISION_2_1; |
| 40 | default: |
| 41 | return IMX_CHIP_REVISION_UNKNOWN; |
| 42 | } |
| 43 | } |
| 44 | |
| 45 | /* |
| 46 | * Returns: |
| 47 | * the silicon revision of the cpu |
| 48 | * -EINVAL - not a mx27 |
| 49 | */ |
| 50 | int mx27_revision(void) |
| 51 | { |
| 52 | if (mx27_cpu_rev == -1) |
| 53 | mx27_cpu_rev = mx27_read_cpu_rev(); |
| 54 | |
| 55 | if (mx27_cpu_partnumber != 0x8821) |
| 56 | return -EINVAL; |
| 57 | |
| 58 | return mx27_cpu_rev; |
| 59 | } |
| 60 | EXPORT_SYMBOL(mx27_revision); |