blob: 856f0297dc7382d368b0c141774dc1394dcef5ef [file] [log] [blame]
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
5 *
6 * This file contains the core interrupt handling code, for irq-chip based
7 * architectures. Detailed information is available in
8 * Documentation/core-api/genericirq.rst
9 */
10
11#include <linux/irq.h>
12#include <linux/msi.h>
13#include <linux/module.h>
14#include <linux/interrupt.h>
15#include <linux/kernel_stat.h>
16#include <linux/irqdomain.h>
17
18#include <trace/events/irq.h>
19
20#include "internals.h"
21
22static irqreturn_t bad_chained_irq(int irq, void *dev_id)
23{
24 WARN_ONCE(1, "Chained irq %d should not call an action\n", irq);
25 return IRQ_NONE;
26}
27
28/*
29 * Chained handlers should never call action on their IRQ. This default
30 * action will emit warning if such thing happens.
31 */
32struct irqaction chained_action = {
33 .handler = bad_chained_irq,
34};
35
36/**
37 * irq_set_chip - set the irq chip for an irq
38 * @irq: irq number
39 * @chip: pointer to irq chip description structure
40 */
41int irq_set_chip(unsigned int irq, struct irq_chip *chip)
42{
43 unsigned long flags;
44 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
45
46 if (!desc)
47 return -EINVAL;
48
49 if (!chip)
50 chip = &no_irq_chip;
51
52 desc->irq_data.chip = chip;
53 irq_put_desc_unlock(desc, flags);
54 /*
55 * For !CONFIG_SPARSE_IRQ make the irq show up in
56 * allocated_irqs.
57 */
58 irq_mark_irq(irq);
59 return 0;
60}
61EXPORT_SYMBOL(irq_set_chip);
62
63/**
64 * irq_set_type - set the irq trigger type for an irq
65 * @irq: irq number
66 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
67 */
68int irq_set_irq_type(unsigned int irq, unsigned int type)
69{
70 unsigned long flags;
71 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
72 int ret = 0;
73
74 if (!desc)
75 return -EINVAL;
76
77 ret = __irq_set_trigger(desc, type);
78 irq_put_desc_busunlock(desc, flags);
79 return ret;
80}
81EXPORT_SYMBOL(irq_set_irq_type);
82
83/**
84 * irq_set_handler_data - set irq handler data for an irq
85 * @irq: Interrupt number
86 * @data: Pointer to interrupt specific data
87 *
88 * Set the hardware irq controller data for an irq
89 */
90int irq_set_handler_data(unsigned int irq, void *data)
91{
92 unsigned long flags;
93 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
94
95 if (!desc)
96 return -EINVAL;
97 desc->irq_common_data.handler_data = data;
98 irq_put_desc_unlock(desc, flags);
99 return 0;
100}
101EXPORT_SYMBOL(irq_set_handler_data);
102
103/**
104 * irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
105 * @irq_base: Interrupt number base
106 * @irq_offset: Interrupt number offset
107 * @entry: Pointer to MSI descriptor data
108 *
109 * Set the MSI descriptor entry for an irq at offset
110 */
111int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
112 struct msi_desc *entry)
113{
114 unsigned long flags;
115 struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
116
117 if (!desc)
118 return -EINVAL;
119 desc->irq_common_data.msi_desc = entry;
120 if (entry && !irq_offset)
121 entry->irq = irq_base;
122 irq_put_desc_unlock(desc, flags);
123 return 0;
124}
125
126/**
127 * irq_set_msi_desc - set MSI descriptor data for an irq
128 * @irq: Interrupt number
129 * @entry: Pointer to MSI descriptor data
130 *
131 * Set the MSI descriptor entry for an irq
132 */
133int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
134{
135 return irq_set_msi_desc_off(irq, 0, entry);
136}
137
138/**
139 * irq_set_chip_data - set irq chip data for an irq
140 * @irq: Interrupt number
141 * @data: Pointer to chip specific data
142 *
143 * Set the hardware irq chip data for an irq
144 */
145int irq_set_chip_data(unsigned int irq, void *data)
146{
147 unsigned long flags;
148 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
149
150 if (!desc)
151 return -EINVAL;
152 desc->irq_data.chip_data = data;
153 irq_put_desc_unlock(desc, flags);
154 return 0;
155}
156EXPORT_SYMBOL(irq_set_chip_data);
157
158struct irq_data *irq_get_irq_data(unsigned int irq)
159{
160 struct irq_desc *desc = irq_to_desc(irq);
161
162 return desc ? &desc->irq_data : NULL;
163}
164EXPORT_SYMBOL_GPL(irq_get_irq_data);
165
166static void irq_state_clr_disabled(struct irq_desc *desc)
167{
168 irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
169}
170
171static void irq_state_clr_masked(struct irq_desc *desc)
172{
173 irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
174}
175
176static void irq_state_clr_started(struct irq_desc *desc)
177{
178 irqd_clear(&desc->irq_data, IRQD_IRQ_STARTED);
179}
180
181static void irq_state_set_started(struct irq_desc *desc)
182{
183 irqd_set(&desc->irq_data, IRQD_IRQ_STARTED);
184}
185
186enum {
187 IRQ_STARTUP_NORMAL,
188 IRQ_STARTUP_MANAGED,
189 IRQ_STARTUP_ABORT,
190};
191
192#ifdef CONFIG_SMP
193static int
194__irq_startup_managed(struct irq_desc *desc, struct cpumask *aff, bool force)
195{
196 struct irq_data *d = irq_desc_get_irq_data(desc);
197
198 if (!irqd_affinity_is_managed(d))
199 return IRQ_STARTUP_NORMAL;
200
201 irqd_clr_managed_shutdown(d);
202
203 if (cpumask_any_and(aff, cpu_online_mask) >= nr_cpu_ids) {
204 /*
205 * Catch code which fiddles with enable_irq() on a managed
206 * and potentially shutdown IRQ. Chained interrupt
207 * installment or irq auto probing should not happen on
208 * managed irqs either.
209 */
210 if (WARN_ON_ONCE(force))
211 return IRQ_STARTUP_ABORT;
212 /*
213 * The interrupt was requested, but there is no online CPU
214 * in it's affinity mask. Put it into managed shutdown
215 * state and let the cpu hotplug mechanism start it up once
216 * a CPU in the mask becomes available.
217 */
218 return IRQ_STARTUP_ABORT;
219 }
220 /*
221 * Managed interrupts have reserved resources, so this should not
222 * happen.
223 */
224 if (WARN_ON(irq_domain_activate_irq(d, false)))
225 return IRQ_STARTUP_ABORT;
226 return IRQ_STARTUP_MANAGED;
227}
228#else
229static __always_inline int
230__irq_startup_managed(struct irq_desc *desc, struct cpumask *aff, bool force)
231{
232 return IRQ_STARTUP_NORMAL;
233}
234#endif
235
236static int __irq_startup(struct irq_desc *desc)
237{
238 struct irq_data *d = irq_desc_get_irq_data(desc);
239 int ret = 0;
240
241 /* Warn if this interrupt is not activated but try nevertheless */
242 WARN_ON_ONCE(!irqd_is_activated(d));
243
244 if (d->chip->irq_startup) {
245 ret = d->chip->irq_startup(d);
246 irq_state_clr_disabled(desc);
247 irq_state_clr_masked(desc);
248 } else {
249 irq_enable(desc);
250 }
251 irq_state_set_started(desc);
252 return ret;
253}
254
255int irq_startup(struct irq_desc *desc, bool resend, bool force)
256{
257 struct irq_data *d = irq_desc_get_irq_data(desc);
258 struct cpumask *aff = irq_data_get_affinity_mask(d);
259 int ret = 0;
260
261 desc->depth = 0;
262
263 if (irqd_is_started(d)) {
264 irq_enable(desc);
265 } else {
266 switch (__irq_startup_managed(desc, aff, force)) {
267 case IRQ_STARTUP_NORMAL:
Olivier Deprez0e641232021-09-23 10:07:05 +0200268 if (d->chip->flags & IRQCHIP_AFFINITY_PRE_STARTUP)
269 irq_setup_affinity(desc);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000270 ret = __irq_startup(desc);
Olivier Deprez0e641232021-09-23 10:07:05 +0200271 if (!(d->chip->flags & IRQCHIP_AFFINITY_PRE_STARTUP))
272 irq_setup_affinity(desc);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000273 break;
274 case IRQ_STARTUP_MANAGED:
275 irq_do_set_affinity(d, aff, false);
276 ret = __irq_startup(desc);
277 break;
278 case IRQ_STARTUP_ABORT:
279 irqd_set_managed_shutdown(d);
280 return 0;
281 }
282 }
283 if (resend)
284 check_irq_resend(desc);
285
286 return ret;
287}
288
289int irq_activate(struct irq_desc *desc)
290{
291 struct irq_data *d = irq_desc_get_irq_data(desc);
292
293 if (!irqd_affinity_is_managed(d))
294 return irq_domain_activate_irq(d, false);
295 return 0;
296}
297
298int irq_activate_and_startup(struct irq_desc *desc, bool resend)
299{
300 if (WARN_ON(irq_activate(desc)))
301 return 0;
302 return irq_startup(desc, resend, IRQ_START_FORCE);
303}
304
305static void __irq_disable(struct irq_desc *desc, bool mask);
306
307void irq_shutdown(struct irq_desc *desc)
308{
309 if (irqd_is_started(&desc->irq_data)) {
310 desc->depth = 1;
311 if (desc->irq_data.chip->irq_shutdown) {
312 desc->irq_data.chip->irq_shutdown(&desc->irq_data);
313 irq_state_set_disabled(desc);
314 irq_state_set_masked(desc);
315 } else {
316 __irq_disable(desc, true);
317 }
318 irq_state_clr_started(desc);
319 }
David Brazdil0f672f62019-12-10 10:32:29 +0000320}
321
322
323void irq_shutdown_and_deactivate(struct irq_desc *desc)
324{
325 irq_shutdown(desc);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000326 /*
327 * This must be called even if the interrupt was never started up,
328 * because the activation can happen before the interrupt is
329 * available for request/startup. It has it's own state tracking so
330 * it's safe to call it unconditionally.
331 */
332 irq_domain_deactivate_irq(&desc->irq_data);
333}
334
335void irq_enable(struct irq_desc *desc)
336{
337 if (!irqd_irq_disabled(&desc->irq_data)) {
338 unmask_irq(desc);
339 } else {
340 irq_state_clr_disabled(desc);
341 if (desc->irq_data.chip->irq_enable) {
342 desc->irq_data.chip->irq_enable(&desc->irq_data);
343 irq_state_clr_masked(desc);
344 } else {
345 unmask_irq(desc);
346 }
347 }
348}
349
350static void __irq_disable(struct irq_desc *desc, bool mask)
351{
352 if (irqd_irq_disabled(&desc->irq_data)) {
353 if (mask)
354 mask_irq(desc);
355 } else {
356 irq_state_set_disabled(desc);
357 if (desc->irq_data.chip->irq_disable) {
358 desc->irq_data.chip->irq_disable(&desc->irq_data);
359 irq_state_set_masked(desc);
360 } else if (mask) {
361 mask_irq(desc);
362 }
363 }
364}
365
366/**
367 * irq_disable - Mark interrupt disabled
368 * @desc: irq descriptor which should be disabled
369 *
370 * If the chip does not implement the irq_disable callback, we
371 * use a lazy disable approach. That means we mark the interrupt
372 * disabled, but leave the hardware unmasked. That's an
373 * optimization because we avoid the hardware access for the
374 * common case where no interrupt happens after we marked it
375 * disabled. If an interrupt happens, then the interrupt flow
376 * handler masks the line at the hardware level and marks it
377 * pending.
378 *
379 * If the interrupt chip does not implement the irq_disable callback,
380 * a driver can disable the lazy approach for a particular irq line by
381 * calling 'irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY)'. This can
382 * be used for devices which cannot disable the interrupt at the
383 * device level under certain circumstances and have to use
384 * disable_irq[_nosync] instead.
385 */
386void irq_disable(struct irq_desc *desc)
387{
388 __irq_disable(desc, irq_settings_disable_unlazy(desc));
389}
390
391void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
392{
393 if (desc->irq_data.chip->irq_enable)
394 desc->irq_data.chip->irq_enable(&desc->irq_data);
395 else
396 desc->irq_data.chip->irq_unmask(&desc->irq_data);
397 cpumask_set_cpu(cpu, desc->percpu_enabled);
398}
399
400void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
401{
402 if (desc->irq_data.chip->irq_disable)
403 desc->irq_data.chip->irq_disable(&desc->irq_data);
404 else
405 desc->irq_data.chip->irq_mask(&desc->irq_data);
406 cpumask_clear_cpu(cpu, desc->percpu_enabled);
407}
408
409static inline void mask_ack_irq(struct irq_desc *desc)
410{
411 if (desc->irq_data.chip->irq_mask_ack) {
412 desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
413 irq_state_set_masked(desc);
414 } else {
415 mask_irq(desc);
416 if (desc->irq_data.chip->irq_ack)
417 desc->irq_data.chip->irq_ack(&desc->irq_data);
418 }
419}
420
421void mask_irq(struct irq_desc *desc)
422{
423 if (irqd_irq_masked(&desc->irq_data))
424 return;
425
426 if (desc->irq_data.chip->irq_mask) {
427 desc->irq_data.chip->irq_mask(&desc->irq_data);
428 irq_state_set_masked(desc);
429 }
430}
431
432void unmask_irq(struct irq_desc *desc)
433{
434 if (!irqd_irq_masked(&desc->irq_data))
435 return;
436
437 if (desc->irq_data.chip->irq_unmask) {
438 desc->irq_data.chip->irq_unmask(&desc->irq_data);
439 irq_state_clr_masked(desc);
440 }
441}
442
443void unmask_threaded_irq(struct irq_desc *desc)
444{
445 struct irq_chip *chip = desc->irq_data.chip;
446
447 if (chip->flags & IRQCHIP_EOI_THREADED)
448 chip->irq_eoi(&desc->irq_data);
449
450 unmask_irq(desc);
451}
452
453/*
454 * handle_nested_irq - Handle a nested irq from a irq thread
455 * @irq: the interrupt number
456 *
457 * Handle interrupts which are nested into a threaded interrupt
458 * handler. The handler function is called inside the calling
459 * threads context.
460 */
461void handle_nested_irq(unsigned int irq)
462{
463 struct irq_desc *desc = irq_to_desc(irq);
464 struct irqaction *action;
465 irqreturn_t action_ret;
466
467 might_sleep();
468
469 raw_spin_lock_irq(&desc->lock);
470
471 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
472
473 action = desc->action;
474 if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
475 desc->istate |= IRQS_PENDING;
476 goto out_unlock;
477 }
478
479 kstat_incr_irqs_this_cpu(desc);
480 irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
481 raw_spin_unlock_irq(&desc->lock);
482
483 action_ret = IRQ_NONE;
484 for_each_action_of_desc(desc, action)
485 action_ret |= action->thread_fn(action->irq, action->dev_id);
486
487 if (!noirqdebug)
488 note_interrupt(desc, action_ret);
489
490 raw_spin_lock_irq(&desc->lock);
491 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
492
493out_unlock:
494 raw_spin_unlock_irq(&desc->lock);
495}
496EXPORT_SYMBOL_GPL(handle_nested_irq);
497
498static bool irq_check_poll(struct irq_desc *desc)
499{
500 if (!(desc->istate & IRQS_POLL_INPROGRESS))
501 return false;
502 return irq_wait_for_poll(desc);
503}
504
505static bool irq_may_run(struct irq_desc *desc)
506{
507 unsigned int mask = IRQD_IRQ_INPROGRESS | IRQD_WAKEUP_ARMED;
508
509 /*
510 * If the interrupt is not in progress and is not an armed
511 * wakeup interrupt, proceed.
512 */
513 if (!irqd_has_set(&desc->irq_data, mask))
514 return true;
515
516 /*
517 * If the interrupt is an armed wakeup source, mark it pending
518 * and suspended, disable it and notify the pm core about the
519 * event.
520 */
521 if (irq_pm_check_wakeup(desc))
522 return false;
523
524 /*
525 * Handle a potential concurrent poll on a different core.
526 */
527 return irq_check_poll(desc);
528}
529
530/**
531 * handle_simple_irq - Simple and software-decoded IRQs.
532 * @desc: the interrupt description structure for this irq
533 *
534 * Simple interrupts are either sent from a demultiplexing interrupt
535 * handler or come from hardware, where no interrupt hardware control
536 * is necessary.
537 *
538 * Note: The caller is expected to handle the ack, clear, mask and
539 * unmask issues if necessary.
540 */
541void handle_simple_irq(struct irq_desc *desc)
542{
543 raw_spin_lock(&desc->lock);
544
545 if (!irq_may_run(desc))
546 goto out_unlock;
547
548 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
549
550 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
551 desc->istate |= IRQS_PENDING;
552 goto out_unlock;
553 }
554
555 kstat_incr_irqs_this_cpu(desc);
556 handle_irq_event(desc);
557
558out_unlock:
559 raw_spin_unlock(&desc->lock);
560}
561EXPORT_SYMBOL_GPL(handle_simple_irq);
562
563/**
564 * handle_untracked_irq - Simple and software-decoded IRQs.
565 * @desc: the interrupt description structure for this irq
566 *
567 * Untracked interrupts are sent from a demultiplexing interrupt
568 * handler when the demultiplexer does not know which device it its
569 * multiplexed irq domain generated the interrupt. IRQ's handled
570 * through here are not subjected to stats tracking, randomness, or
571 * spurious interrupt detection.
572 *
573 * Note: Like handle_simple_irq, the caller is expected to handle
574 * the ack, clear, mask and unmask issues if necessary.
575 */
576void handle_untracked_irq(struct irq_desc *desc)
577{
578 unsigned int flags = 0;
579
580 raw_spin_lock(&desc->lock);
581
582 if (!irq_may_run(desc))
583 goto out_unlock;
584
585 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
586
587 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
588 desc->istate |= IRQS_PENDING;
589 goto out_unlock;
590 }
591
592 desc->istate &= ~IRQS_PENDING;
593 irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
594 raw_spin_unlock(&desc->lock);
595
596 __handle_irq_event_percpu(desc, &flags);
597
598 raw_spin_lock(&desc->lock);
599 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
600
601out_unlock:
602 raw_spin_unlock(&desc->lock);
603}
604EXPORT_SYMBOL_GPL(handle_untracked_irq);
605
606/*
607 * Called unconditionally from handle_level_irq() and only for oneshot
608 * interrupts from handle_fasteoi_irq()
609 */
610static void cond_unmask_irq(struct irq_desc *desc)
611{
612 /*
613 * We need to unmask in the following cases:
614 * - Standard level irq (IRQF_ONESHOT is not set)
615 * - Oneshot irq which did not wake the thread (caused by a
616 * spurious interrupt or a primary handler handling it
617 * completely).
618 */
619 if (!irqd_irq_disabled(&desc->irq_data) &&
620 irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
621 unmask_irq(desc);
622}
623
624/**
625 * handle_level_irq - Level type irq handler
626 * @desc: the interrupt description structure for this irq
627 *
628 * Level type interrupts are active as long as the hardware line has
629 * the active level. This may require to mask the interrupt and unmask
630 * it after the associated handler has acknowledged the device, so the
631 * interrupt line is back to inactive.
632 */
633void handle_level_irq(struct irq_desc *desc)
634{
635 raw_spin_lock(&desc->lock);
636 mask_ack_irq(desc);
637
638 if (!irq_may_run(desc))
639 goto out_unlock;
640
641 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
642
643 /*
644 * If its disabled or no action available
645 * keep it masked and get out of here
646 */
647 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
648 desc->istate |= IRQS_PENDING;
649 goto out_unlock;
650 }
651
652 kstat_incr_irqs_this_cpu(desc);
653 handle_irq_event(desc);
654
655 cond_unmask_irq(desc);
656
657out_unlock:
658 raw_spin_unlock(&desc->lock);
659}
660EXPORT_SYMBOL_GPL(handle_level_irq);
661
662#ifdef CONFIG_IRQ_PREFLOW_FASTEOI
663static inline void preflow_handler(struct irq_desc *desc)
664{
665 if (desc->preflow_handler)
666 desc->preflow_handler(&desc->irq_data);
667}
668#else
669static inline void preflow_handler(struct irq_desc *desc) { }
670#endif
671
672static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
673{
674 if (!(desc->istate & IRQS_ONESHOT)) {
675 chip->irq_eoi(&desc->irq_data);
676 return;
677 }
678 /*
679 * We need to unmask in the following cases:
680 * - Oneshot irq which did not wake the thread (caused by a
681 * spurious interrupt or a primary handler handling it
682 * completely).
683 */
684 if (!irqd_irq_disabled(&desc->irq_data) &&
685 irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
686 chip->irq_eoi(&desc->irq_data);
687 unmask_irq(desc);
688 } else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
689 chip->irq_eoi(&desc->irq_data);
690 }
691}
692
693/**
694 * handle_fasteoi_irq - irq handler for transparent controllers
695 * @desc: the interrupt description structure for this irq
696 *
697 * Only a single callback will be issued to the chip: an ->eoi()
698 * call when the interrupt has been serviced. This enables support
699 * for modern forms of interrupt handlers, which handle the flow
700 * details in hardware, transparently.
701 */
702void handle_fasteoi_irq(struct irq_desc *desc)
703{
704 struct irq_chip *chip = desc->irq_data.chip;
705
706 raw_spin_lock(&desc->lock);
707
708 if (!irq_may_run(desc))
709 goto out;
710
711 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
712
713 /*
714 * If its disabled or no action available
715 * then mask it and get out of here:
716 */
717 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
718 desc->istate |= IRQS_PENDING;
719 mask_irq(desc);
720 goto out;
721 }
722
723 kstat_incr_irqs_this_cpu(desc);
724 if (desc->istate & IRQS_ONESHOT)
725 mask_irq(desc);
726
727 preflow_handler(desc);
728 handle_irq_event(desc);
729
730 cond_unmask_eoi_irq(desc, chip);
731
732 raw_spin_unlock(&desc->lock);
733 return;
734out:
735 if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
736 chip->irq_eoi(&desc->irq_data);
737 raw_spin_unlock(&desc->lock);
738}
739EXPORT_SYMBOL_GPL(handle_fasteoi_irq);
740
741/**
David Brazdil0f672f62019-12-10 10:32:29 +0000742 * handle_fasteoi_nmi - irq handler for NMI interrupt lines
743 * @desc: the interrupt description structure for this irq
744 *
745 * A simple NMI-safe handler, considering the restrictions
746 * from request_nmi.
747 *
748 * Only a single callback will be issued to the chip: an ->eoi()
749 * call when the interrupt has been serviced. This enables support
750 * for modern forms of interrupt handlers, which handle the flow
751 * details in hardware, transparently.
752 */
753void handle_fasteoi_nmi(struct irq_desc *desc)
754{
755 struct irq_chip *chip = irq_desc_get_chip(desc);
756 struct irqaction *action = desc->action;
757 unsigned int irq = irq_desc_get_irq(desc);
758 irqreturn_t res;
759
760 __kstat_incr_irqs_this_cpu(desc);
761
762 trace_irq_handler_entry(irq, action);
763 /*
764 * NMIs cannot be shared, there is only one action.
765 */
766 res = action->handler(irq, action->dev_id);
767 trace_irq_handler_exit(irq, action, res);
768
769 if (chip->irq_eoi)
770 chip->irq_eoi(&desc->irq_data);
771}
772EXPORT_SYMBOL_GPL(handle_fasteoi_nmi);
773
774/**
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000775 * handle_edge_irq - edge type IRQ handler
776 * @desc: the interrupt description structure for this irq
777 *
778 * Interrupt occures on the falling and/or rising edge of a hardware
779 * signal. The occurrence is latched into the irq controller hardware
780 * and must be acked in order to be reenabled. After the ack another
781 * interrupt can happen on the same source even before the first one
782 * is handled by the associated event handler. If this happens it
783 * might be necessary to disable (mask) the interrupt depending on the
784 * controller hardware. This requires to reenable the interrupt inside
785 * of the loop which handles the interrupts which have arrived while
786 * the handler was running. If all pending interrupts are handled, the
787 * loop is left.
788 */
789void handle_edge_irq(struct irq_desc *desc)
790{
791 raw_spin_lock(&desc->lock);
792
793 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
794
795 if (!irq_may_run(desc)) {
796 desc->istate |= IRQS_PENDING;
797 mask_ack_irq(desc);
798 goto out_unlock;
799 }
800
801 /*
802 * If its disabled or no action available then mask it and get
803 * out of here.
804 */
805 if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
806 desc->istate |= IRQS_PENDING;
807 mask_ack_irq(desc);
808 goto out_unlock;
809 }
810
811 kstat_incr_irqs_this_cpu(desc);
812
813 /* Start handling the irq */
814 desc->irq_data.chip->irq_ack(&desc->irq_data);
815
816 do {
817 if (unlikely(!desc->action)) {
818 mask_irq(desc);
819 goto out_unlock;
820 }
821
822 /*
823 * When another irq arrived while we were handling
824 * one, we could have masked the irq.
825 * Renable it, if it was not disabled in meantime.
826 */
827 if (unlikely(desc->istate & IRQS_PENDING)) {
828 if (!irqd_irq_disabled(&desc->irq_data) &&
829 irqd_irq_masked(&desc->irq_data))
830 unmask_irq(desc);
831 }
832
833 handle_irq_event(desc);
834
835 } while ((desc->istate & IRQS_PENDING) &&
836 !irqd_irq_disabled(&desc->irq_data));
837
838out_unlock:
839 raw_spin_unlock(&desc->lock);
840}
841EXPORT_SYMBOL(handle_edge_irq);
842
843#ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
844/**
845 * handle_edge_eoi_irq - edge eoi type IRQ handler
846 * @desc: the interrupt description structure for this irq
847 *
848 * Similar as the above handle_edge_irq, but using eoi and w/o the
849 * mask/unmask logic.
850 */
851void handle_edge_eoi_irq(struct irq_desc *desc)
852{
853 struct irq_chip *chip = irq_desc_get_chip(desc);
854
855 raw_spin_lock(&desc->lock);
856
857 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
858
859 if (!irq_may_run(desc)) {
860 desc->istate |= IRQS_PENDING;
861 goto out_eoi;
862 }
863
864 /*
865 * If its disabled or no action available then mask it and get
866 * out of here.
867 */
868 if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
869 desc->istate |= IRQS_PENDING;
870 goto out_eoi;
871 }
872
873 kstat_incr_irqs_this_cpu(desc);
874
875 do {
876 if (unlikely(!desc->action))
877 goto out_eoi;
878
879 handle_irq_event(desc);
880
881 } while ((desc->istate & IRQS_PENDING) &&
882 !irqd_irq_disabled(&desc->irq_data));
883
884out_eoi:
885 chip->irq_eoi(&desc->irq_data);
886 raw_spin_unlock(&desc->lock);
887}
888#endif
889
890/**
891 * handle_percpu_irq - Per CPU local irq handler
892 * @desc: the interrupt description structure for this irq
893 *
894 * Per CPU interrupts on SMP machines without locking requirements
895 */
896void handle_percpu_irq(struct irq_desc *desc)
897{
898 struct irq_chip *chip = irq_desc_get_chip(desc);
899
David Brazdil0f672f62019-12-10 10:32:29 +0000900 /*
901 * PER CPU interrupts are not serialized. Do not touch
902 * desc->tot_count.
903 */
904 __kstat_incr_irqs_this_cpu(desc);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000905
906 if (chip->irq_ack)
907 chip->irq_ack(&desc->irq_data);
908
909 handle_irq_event_percpu(desc);
910
911 if (chip->irq_eoi)
912 chip->irq_eoi(&desc->irq_data);
913}
914
915/**
916 * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
917 * @desc: the interrupt description structure for this irq
918 *
919 * Per CPU interrupts on SMP machines without locking requirements. Same as
920 * handle_percpu_irq() above but with the following extras:
921 *
922 * action->percpu_dev_id is a pointer to percpu variables which
923 * contain the real device id for the cpu on which this handler is
924 * called
925 */
926void handle_percpu_devid_irq(struct irq_desc *desc)
927{
928 struct irq_chip *chip = irq_desc_get_chip(desc);
929 struct irqaction *action = desc->action;
930 unsigned int irq = irq_desc_get_irq(desc);
931 irqreturn_t res;
932
David Brazdil0f672f62019-12-10 10:32:29 +0000933 /*
934 * PER CPU interrupts are not serialized. Do not touch
935 * desc->tot_count.
936 */
937 __kstat_incr_irqs_this_cpu(desc);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000938
939 if (chip->irq_ack)
940 chip->irq_ack(&desc->irq_data);
941
942 if (likely(action)) {
943 trace_irq_handler_entry(irq, action);
944 res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
945 trace_irq_handler_exit(irq, action, res);
946 } else {
947 unsigned int cpu = smp_processor_id();
948 bool enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
949
950 if (enabled)
951 irq_percpu_disable(desc, cpu);
952
953 pr_err_once("Spurious%s percpu IRQ%u on CPU%u\n",
954 enabled ? " and unmasked" : "", irq, cpu);
955 }
956
957 if (chip->irq_eoi)
958 chip->irq_eoi(&desc->irq_data);
959}
960
David Brazdil0f672f62019-12-10 10:32:29 +0000961/**
962 * handle_percpu_devid_fasteoi_nmi - Per CPU local NMI handler with per cpu
963 * dev ids
964 * @desc: the interrupt description structure for this irq
965 *
966 * Similar to handle_fasteoi_nmi, but handling the dev_id cookie
967 * as a percpu pointer.
968 */
969void handle_percpu_devid_fasteoi_nmi(struct irq_desc *desc)
970{
971 struct irq_chip *chip = irq_desc_get_chip(desc);
972 struct irqaction *action = desc->action;
973 unsigned int irq = irq_desc_get_irq(desc);
974 irqreturn_t res;
975
976 __kstat_incr_irqs_this_cpu(desc);
977
978 trace_irq_handler_entry(irq, action);
979 res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
980 trace_irq_handler_exit(irq, action, res);
981
982 if (chip->irq_eoi)
983 chip->irq_eoi(&desc->irq_data);
984}
985
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000986static void
987__irq_do_set_handler(struct irq_desc *desc, irq_flow_handler_t handle,
988 int is_chained, const char *name)
989{
990 if (!handle) {
991 handle = handle_bad_irq;
992 } else {
993 struct irq_data *irq_data = &desc->irq_data;
994#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
995 /*
996 * With hierarchical domains we might run into a
997 * situation where the outermost chip is not yet set
998 * up, but the inner chips are there. Instead of
999 * bailing we install the handler, but obviously we
1000 * cannot enable/startup the interrupt at this point.
1001 */
1002 while (irq_data) {
1003 if (irq_data->chip != &no_irq_chip)
1004 break;
1005 /*
1006 * Bail out if the outer chip is not set up
David Brazdil0f672f62019-12-10 10:32:29 +00001007 * and the interrupt supposed to be started
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001008 * right away.
1009 */
1010 if (WARN_ON(is_chained))
1011 return;
1012 /* Try the parent */
1013 irq_data = irq_data->parent_data;
1014 }
1015#endif
1016 if (WARN_ON(!irq_data || irq_data->chip == &no_irq_chip))
1017 return;
1018 }
1019
1020 /* Uninstall? */
1021 if (handle == handle_bad_irq) {
1022 if (desc->irq_data.chip != &no_irq_chip)
1023 mask_ack_irq(desc);
1024 irq_state_set_disabled(desc);
1025 if (is_chained)
1026 desc->action = NULL;
1027 desc->depth = 1;
1028 }
1029 desc->handle_irq = handle;
1030 desc->name = name;
1031
1032 if (handle != handle_bad_irq && is_chained) {
1033 unsigned int type = irqd_get_trigger_type(&desc->irq_data);
1034
1035 /*
1036 * We're about to start this interrupt immediately,
1037 * hence the need to set the trigger configuration.
1038 * But the .set_type callback may have overridden the
1039 * flow handler, ignoring that we're dealing with a
1040 * chained interrupt. Reset it immediately because we
1041 * do know better.
1042 */
1043 if (type != IRQ_TYPE_NONE) {
1044 __irq_set_trigger(desc, type);
1045 desc->handle_irq = handle;
1046 }
1047
1048 irq_settings_set_noprobe(desc);
1049 irq_settings_set_norequest(desc);
1050 irq_settings_set_nothread(desc);
1051 desc->action = &chained_action;
1052 irq_activate_and_startup(desc, IRQ_RESEND);
1053 }
1054}
1055
1056void
1057__irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
1058 const char *name)
1059{
1060 unsigned long flags;
1061 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
1062
1063 if (!desc)
1064 return;
1065
1066 __irq_do_set_handler(desc, handle, is_chained, name);
1067 irq_put_desc_busunlock(desc, flags);
1068}
1069EXPORT_SYMBOL_GPL(__irq_set_handler);
1070
1071void
1072irq_set_chained_handler_and_data(unsigned int irq, irq_flow_handler_t handle,
1073 void *data)
1074{
1075 unsigned long flags;
1076 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
1077
1078 if (!desc)
1079 return;
1080
1081 desc->irq_common_data.handler_data = data;
1082 __irq_do_set_handler(desc, handle, 1, NULL);
1083
1084 irq_put_desc_busunlock(desc, flags);
1085}
1086EXPORT_SYMBOL_GPL(irq_set_chained_handler_and_data);
1087
1088void
1089irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
1090 irq_flow_handler_t handle, const char *name)
1091{
1092 irq_set_chip(irq, chip);
1093 __irq_set_handler(irq, handle, 0, name);
1094}
1095EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
1096
1097void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
1098{
1099 unsigned long flags, trigger, tmp;
1100 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
1101
1102 if (!desc)
1103 return;
1104
1105 /*
1106 * Warn when a driver sets the no autoenable flag on an already
1107 * active interrupt.
1108 */
1109 WARN_ON_ONCE(!desc->depth && (set & _IRQ_NOAUTOEN));
1110
1111 irq_settings_clr_and_set(desc, clr, set);
1112
1113 trigger = irqd_get_trigger_type(&desc->irq_data);
1114
1115 irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
1116 IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
1117 if (irq_settings_has_no_balance_set(desc))
1118 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1119 if (irq_settings_is_per_cpu(desc))
1120 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1121 if (irq_settings_can_move_pcntxt(desc))
1122 irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
1123 if (irq_settings_is_level(desc))
1124 irqd_set(&desc->irq_data, IRQD_LEVEL);
1125
1126 tmp = irq_settings_get_trigger_mask(desc);
1127 if (tmp != IRQ_TYPE_NONE)
1128 trigger = tmp;
1129
1130 irqd_set(&desc->irq_data, trigger);
1131
1132 irq_put_desc_unlock(desc, flags);
1133}
1134EXPORT_SYMBOL_GPL(irq_modify_status);
1135
1136/**
1137 * irq_cpu_online - Invoke all irq_cpu_online functions.
1138 *
1139 * Iterate through all irqs and invoke the chip.irq_cpu_online()
1140 * for each.
1141 */
1142void irq_cpu_online(void)
1143{
1144 struct irq_desc *desc;
1145 struct irq_chip *chip;
1146 unsigned long flags;
1147 unsigned int irq;
1148
1149 for_each_active_irq(irq) {
1150 desc = irq_to_desc(irq);
1151 if (!desc)
1152 continue;
1153
1154 raw_spin_lock_irqsave(&desc->lock, flags);
1155
1156 chip = irq_data_get_irq_chip(&desc->irq_data);
1157 if (chip && chip->irq_cpu_online &&
1158 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
1159 !irqd_irq_disabled(&desc->irq_data)))
1160 chip->irq_cpu_online(&desc->irq_data);
1161
1162 raw_spin_unlock_irqrestore(&desc->lock, flags);
1163 }
1164}
1165
1166/**
1167 * irq_cpu_offline - Invoke all irq_cpu_offline functions.
1168 *
1169 * Iterate through all irqs and invoke the chip.irq_cpu_offline()
1170 * for each.
1171 */
1172void irq_cpu_offline(void)
1173{
1174 struct irq_desc *desc;
1175 struct irq_chip *chip;
1176 unsigned long flags;
1177 unsigned int irq;
1178
1179 for_each_active_irq(irq) {
1180 desc = irq_to_desc(irq);
1181 if (!desc)
1182 continue;
1183
1184 raw_spin_lock_irqsave(&desc->lock, flags);
1185
1186 chip = irq_data_get_irq_chip(&desc->irq_data);
1187 if (chip && chip->irq_cpu_offline &&
1188 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
1189 !irqd_irq_disabled(&desc->irq_data)))
1190 chip->irq_cpu_offline(&desc->irq_data);
1191
1192 raw_spin_unlock_irqrestore(&desc->lock, flags);
1193 }
1194}
1195
1196#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1197
1198#ifdef CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS
1199/**
1200 * handle_fasteoi_ack_irq - irq handler for edge hierarchy
1201 * stacked on transparent controllers
1202 *
1203 * @desc: the interrupt description structure for this irq
1204 *
1205 * Like handle_fasteoi_irq(), but for use with hierarchy where
1206 * the irq_chip also needs to have its ->irq_ack() function
1207 * called.
1208 */
1209void handle_fasteoi_ack_irq(struct irq_desc *desc)
1210{
1211 struct irq_chip *chip = desc->irq_data.chip;
1212
1213 raw_spin_lock(&desc->lock);
1214
1215 if (!irq_may_run(desc))
1216 goto out;
1217
1218 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
1219
1220 /*
1221 * If its disabled or no action available
1222 * then mask it and get out of here:
1223 */
1224 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
1225 desc->istate |= IRQS_PENDING;
1226 mask_irq(desc);
1227 goto out;
1228 }
1229
1230 kstat_incr_irqs_this_cpu(desc);
1231 if (desc->istate & IRQS_ONESHOT)
1232 mask_irq(desc);
1233
1234 /* Start handling the irq */
1235 desc->irq_data.chip->irq_ack(&desc->irq_data);
1236
1237 preflow_handler(desc);
1238 handle_irq_event(desc);
1239
1240 cond_unmask_eoi_irq(desc, chip);
1241
1242 raw_spin_unlock(&desc->lock);
1243 return;
1244out:
1245 if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
1246 chip->irq_eoi(&desc->irq_data);
1247 raw_spin_unlock(&desc->lock);
1248}
1249EXPORT_SYMBOL_GPL(handle_fasteoi_ack_irq);
1250
1251/**
1252 * handle_fasteoi_mask_irq - irq handler for level hierarchy
1253 * stacked on transparent controllers
1254 *
1255 * @desc: the interrupt description structure for this irq
1256 *
1257 * Like handle_fasteoi_irq(), but for use with hierarchy where
1258 * the irq_chip also needs to have its ->irq_mask_ack() function
1259 * called.
1260 */
1261void handle_fasteoi_mask_irq(struct irq_desc *desc)
1262{
1263 struct irq_chip *chip = desc->irq_data.chip;
1264
1265 raw_spin_lock(&desc->lock);
1266 mask_ack_irq(desc);
1267
1268 if (!irq_may_run(desc))
1269 goto out;
1270
1271 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
1272
1273 /*
1274 * If its disabled or no action available
1275 * then mask it and get out of here:
1276 */
1277 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
1278 desc->istate |= IRQS_PENDING;
1279 mask_irq(desc);
1280 goto out;
1281 }
1282
1283 kstat_incr_irqs_this_cpu(desc);
1284 if (desc->istate & IRQS_ONESHOT)
1285 mask_irq(desc);
1286
1287 preflow_handler(desc);
1288 handle_irq_event(desc);
1289
1290 cond_unmask_eoi_irq(desc, chip);
1291
1292 raw_spin_unlock(&desc->lock);
1293 return;
1294out:
1295 if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
1296 chip->irq_eoi(&desc->irq_data);
1297 raw_spin_unlock(&desc->lock);
1298}
1299EXPORT_SYMBOL_GPL(handle_fasteoi_mask_irq);
1300
1301#endif /* CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS */
1302
1303/**
1304 * irq_chip_enable_parent - Enable the parent interrupt (defaults to unmask if
1305 * NULL)
1306 * @data: Pointer to interrupt specific data
1307 */
1308void irq_chip_enable_parent(struct irq_data *data)
1309{
1310 data = data->parent_data;
1311 if (data->chip->irq_enable)
1312 data->chip->irq_enable(data);
1313 else
1314 data->chip->irq_unmask(data);
1315}
1316EXPORT_SYMBOL_GPL(irq_chip_enable_parent);
1317
1318/**
1319 * irq_chip_disable_parent - Disable the parent interrupt (defaults to mask if
1320 * NULL)
1321 * @data: Pointer to interrupt specific data
1322 */
1323void irq_chip_disable_parent(struct irq_data *data)
1324{
1325 data = data->parent_data;
1326 if (data->chip->irq_disable)
1327 data->chip->irq_disable(data);
1328 else
1329 data->chip->irq_mask(data);
1330}
1331EXPORT_SYMBOL_GPL(irq_chip_disable_parent);
1332
1333/**
1334 * irq_chip_ack_parent - Acknowledge the parent interrupt
1335 * @data: Pointer to interrupt specific data
1336 */
1337void irq_chip_ack_parent(struct irq_data *data)
1338{
1339 data = data->parent_data;
1340 data->chip->irq_ack(data);
1341}
1342EXPORT_SYMBOL_GPL(irq_chip_ack_parent);
1343
1344/**
1345 * irq_chip_mask_parent - Mask the parent interrupt
1346 * @data: Pointer to interrupt specific data
1347 */
1348void irq_chip_mask_parent(struct irq_data *data)
1349{
1350 data = data->parent_data;
1351 data->chip->irq_mask(data);
1352}
1353EXPORT_SYMBOL_GPL(irq_chip_mask_parent);
1354
1355/**
David Brazdil0f672f62019-12-10 10:32:29 +00001356 * irq_chip_mask_ack_parent - Mask and acknowledge the parent interrupt
1357 * @data: Pointer to interrupt specific data
1358 */
1359void irq_chip_mask_ack_parent(struct irq_data *data)
1360{
1361 data = data->parent_data;
1362 data->chip->irq_mask_ack(data);
1363}
1364EXPORT_SYMBOL_GPL(irq_chip_mask_ack_parent);
1365
1366/**
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001367 * irq_chip_unmask_parent - Unmask the parent interrupt
1368 * @data: Pointer to interrupt specific data
1369 */
1370void irq_chip_unmask_parent(struct irq_data *data)
1371{
1372 data = data->parent_data;
1373 data->chip->irq_unmask(data);
1374}
1375EXPORT_SYMBOL_GPL(irq_chip_unmask_parent);
1376
1377/**
1378 * irq_chip_eoi_parent - Invoke EOI on the parent interrupt
1379 * @data: Pointer to interrupt specific data
1380 */
1381void irq_chip_eoi_parent(struct irq_data *data)
1382{
1383 data = data->parent_data;
1384 data->chip->irq_eoi(data);
1385}
1386EXPORT_SYMBOL_GPL(irq_chip_eoi_parent);
1387
1388/**
1389 * irq_chip_set_affinity_parent - Set affinity on the parent interrupt
1390 * @data: Pointer to interrupt specific data
1391 * @dest: The affinity mask to set
1392 * @force: Flag to enforce setting (disable online checks)
1393 *
1394 * Conditinal, as the underlying parent chip might not implement it.
1395 */
1396int irq_chip_set_affinity_parent(struct irq_data *data,
1397 const struct cpumask *dest, bool force)
1398{
1399 data = data->parent_data;
1400 if (data->chip->irq_set_affinity)
1401 return data->chip->irq_set_affinity(data, dest, force);
1402
1403 return -ENOSYS;
1404}
1405EXPORT_SYMBOL_GPL(irq_chip_set_affinity_parent);
1406
1407/**
1408 * irq_chip_set_type_parent - Set IRQ type on the parent interrupt
1409 * @data: Pointer to interrupt specific data
1410 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
1411 *
1412 * Conditional, as the underlying parent chip might not implement it.
1413 */
1414int irq_chip_set_type_parent(struct irq_data *data, unsigned int type)
1415{
1416 data = data->parent_data;
1417
1418 if (data->chip->irq_set_type)
1419 return data->chip->irq_set_type(data, type);
1420
1421 return -ENOSYS;
1422}
1423EXPORT_SYMBOL_GPL(irq_chip_set_type_parent);
1424
1425/**
1426 * irq_chip_retrigger_hierarchy - Retrigger an interrupt in hardware
1427 * @data: Pointer to interrupt specific data
1428 *
1429 * Iterate through the domain hierarchy of the interrupt and check
1430 * whether a hw retrigger function exists. If yes, invoke it.
1431 */
1432int irq_chip_retrigger_hierarchy(struct irq_data *data)
1433{
1434 for (data = data->parent_data; data; data = data->parent_data)
1435 if (data->chip && data->chip->irq_retrigger)
1436 return data->chip->irq_retrigger(data);
1437
1438 return 0;
1439}
1440
1441/**
1442 * irq_chip_set_vcpu_affinity_parent - Set vcpu affinity on the parent interrupt
1443 * @data: Pointer to interrupt specific data
1444 * @vcpu_info: The vcpu affinity information
1445 */
1446int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
1447{
1448 data = data->parent_data;
1449 if (data->chip->irq_set_vcpu_affinity)
1450 return data->chip->irq_set_vcpu_affinity(data, vcpu_info);
1451
1452 return -ENOSYS;
1453}
1454
1455/**
1456 * irq_chip_set_wake_parent - Set/reset wake-up on the parent interrupt
1457 * @data: Pointer to interrupt specific data
1458 * @on: Whether to set or reset the wake-up capability of this irq
1459 *
1460 * Conditional, as the underlying parent chip might not implement it.
1461 */
1462int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
1463{
1464 data = data->parent_data;
David Brazdil0f672f62019-12-10 10:32:29 +00001465
1466 if (data->chip->flags & IRQCHIP_SKIP_SET_WAKE)
1467 return 0;
1468
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001469 if (data->chip->irq_set_wake)
1470 return data->chip->irq_set_wake(data, on);
1471
1472 return -ENOSYS;
1473}
David Brazdil0f672f62019-12-10 10:32:29 +00001474EXPORT_SYMBOL_GPL(irq_chip_set_wake_parent);
1475
1476/**
1477 * irq_chip_request_resources_parent - Request resources on the parent interrupt
1478 * @data: Pointer to interrupt specific data
1479 */
1480int irq_chip_request_resources_parent(struct irq_data *data)
1481{
1482 data = data->parent_data;
1483
1484 if (data->chip->irq_request_resources)
1485 return data->chip->irq_request_resources(data);
1486
1487 return -ENOSYS;
1488}
1489EXPORT_SYMBOL_GPL(irq_chip_request_resources_parent);
1490
1491/**
1492 * irq_chip_release_resources_parent - Release resources on the parent interrupt
1493 * @data: Pointer to interrupt specific data
1494 */
1495void irq_chip_release_resources_parent(struct irq_data *data)
1496{
1497 data = data->parent_data;
1498 if (data->chip->irq_release_resources)
1499 data->chip->irq_release_resources(data);
1500}
1501EXPORT_SYMBOL_GPL(irq_chip_release_resources_parent);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001502#endif
1503
1504/**
1505 * irq_chip_compose_msi_msg - Componse msi message for a irq chip
1506 * @data: Pointer to interrupt specific data
1507 * @msg: Pointer to the MSI message
1508 *
1509 * For hierarchical domains we find the first chip in the hierarchy
1510 * which implements the irq_compose_msi_msg callback. For non
1511 * hierarchical we use the top level chip.
1512 */
1513int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
1514{
1515 struct irq_data *pos = NULL;
1516
1517#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1518 for (; data; data = data->parent_data)
1519#endif
1520 if (data->chip && data->chip->irq_compose_msi_msg)
1521 pos = data;
1522 if (!pos)
1523 return -ENOSYS;
1524
1525 pos->chip->irq_compose_msi_msg(pos, msg);
1526
1527 return 0;
1528}
1529
1530/**
1531 * irq_chip_pm_get - Enable power for an IRQ chip
1532 * @data: Pointer to interrupt specific data
1533 *
1534 * Enable the power to the IRQ chip referenced by the interrupt data
1535 * structure.
1536 */
1537int irq_chip_pm_get(struct irq_data *data)
1538{
1539 int retval;
1540
1541 if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device) {
1542 retval = pm_runtime_get_sync(data->chip->parent_device);
1543 if (retval < 0) {
1544 pm_runtime_put_noidle(data->chip->parent_device);
1545 return retval;
1546 }
1547 }
1548
1549 return 0;
1550}
1551
1552/**
1553 * irq_chip_pm_put - Disable power for an IRQ chip
1554 * @data: Pointer to interrupt specific data
1555 *
1556 * Disable the power to the IRQ chip referenced by the interrupt data
1557 * structure, belongs. Note that power will only be disabled, once this
1558 * function has been called for all IRQs that have called irq_chip_pm_get().
1559 */
1560int irq_chip_pm_put(struct irq_data *data)
1561{
1562 int retval = 0;
1563
1564 if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device)
1565 retval = pm_runtime_put(data->chip->parent_device);
1566
1567 return (retval < 0) ? retval : 0;
1568}