Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | |
| 3 | menu "PCI controller drivers" |
| 4 | depends on PCI |
| 5 | |
| 6 | config PCI_MVEBU |
| 7 | bool "Marvell EBU PCIe controller" |
| 8 | depends on ARCH_MVEBU || ARCH_DOVE || COMPILE_TEST |
| 9 | depends on MVEBU_MBUS |
| 10 | depends on ARM |
| 11 | depends on OF |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 12 | select PCI_BRIDGE_EMUL |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 13 | |
| 14 | config PCI_AARDVARK |
| 15 | bool "Aardvark PCIe controller" |
| 16 | depends on (ARCH_MVEBU && ARM64) || COMPILE_TEST |
| 17 | depends on OF |
| 18 | depends on PCI_MSI_IRQ_DOMAIN |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 19 | select PCI_BRIDGE_EMUL |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 20 | help |
| 21 | Add support for Aardvark 64bit PCIe Host Controller. This |
| 22 | controller is part of the South Bridge of the Marvel Armada |
| 23 | 3700 SoC. |
| 24 | |
| 25 | menu "Cadence PCIe controllers support" |
| 26 | |
| 27 | config PCIE_CADENCE |
| 28 | bool |
| 29 | |
| 30 | config PCIE_CADENCE_HOST |
| 31 | bool "Cadence PCIe host controller" |
| 32 | depends on OF |
| 33 | depends on PCI |
| 34 | select IRQ_DOMAIN |
| 35 | select PCIE_CADENCE |
| 36 | help |
| 37 | Say Y here if you want to support the Cadence PCIe controller in host |
| 38 | mode. This PCIe controller may be embedded into many different vendors |
| 39 | SoCs. |
| 40 | |
| 41 | config PCIE_CADENCE_EP |
| 42 | bool "Cadence PCIe endpoint controller" |
| 43 | depends on OF |
| 44 | depends on PCI_ENDPOINT |
| 45 | select PCIE_CADENCE |
| 46 | help |
| 47 | Say Y here if you want to support the Cadence PCIe controller in |
| 48 | endpoint mode. This PCIe controller may be embedded into many |
| 49 | different vendors SoCs. |
| 50 | |
| 51 | endmenu |
| 52 | |
| 53 | config PCIE_XILINX_NWL |
| 54 | bool "NWL PCIe Core" |
| 55 | depends on ARCH_ZYNQMP || COMPILE_TEST |
| 56 | depends on PCI_MSI_IRQ_DOMAIN |
| 57 | help |
| 58 | Say 'Y' here if you want kernel support for Xilinx |
| 59 | NWL PCIe controller. The controller can act as Root Port |
| 60 | or End Point. The current option selection will only |
| 61 | support root port enabling. |
| 62 | |
| 63 | config PCI_FTPCI100 |
| 64 | bool "Faraday Technology FTPCI100 PCI controller" |
| 65 | depends on OF |
| 66 | default ARCH_GEMINI |
| 67 | |
| 68 | config PCI_TEGRA |
| 69 | bool "NVIDIA Tegra PCIe controller" |
| 70 | depends on ARCH_TEGRA || COMPILE_TEST |
| 71 | depends on PCI_MSI_IRQ_DOMAIN |
| 72 | help |
| 73 | Say Y here if you want support for the PCIe host controller found |
| 74 | on NVIDIA Tegra SoCs. |
| 75 | |
| 76 | config PCI_RCAR_GEN2 |
| 77 | bool "Renesas R-Car Gen2 Internal PCI controller" |
| 78 | depends on ARCH_RENESAS || COMPILE_TEST |
| 79 | depends on ARM |
| 80 | help |
| 81 | Say Y here if you want internal PCI support on R-Car Gen2 SoC. |
| 82 | There are 3 internal PCI controllers available with a single |
| 83 | built-in EHCI/OHCI host controller present on each one. |
| 84 | |
| 85 | config PCIE_RCAR |
| 86 | bool "Renesas R-Car PCIe controller" |
| 87 | depends on ARCH_RENESAS || COMPILE_TEST |
| 88 | depends on PCI_MSI_IRQ_DOMAIN |
| 89 | help |
| 90 | Say Y here if you want PCIe controller support on R-Car SoCs. |
| 91 | |
| 92 | config PCI_HOST_COMMON |
| 93 | bool |
| 94 | select PCI_ECAM |
| 95 | |
| 96 | config PCI_HOST_GENERIC |
| 97 | bool "Generic PCI host controller" |
| 98 | depends on OF |
| 99 | select PCI_HOST_COMMON |
| 100 | select IRQ_DOMAIN |
| 101 | help |
| 102 | Say Y here if you want to support a simple generic PCI host |
| 103 | controller, such as the one emulated by kvmtool. |
| 104 | |
| 105 | config PCIE_XILINX |
| 106 | bool "Xilinx AXI PCIe host bridge support" |
| 107 | depends on OF || COMPILE_TEST |
| 108 | help |
| 109 | Say 'Y' here if you want kernel to support the Xilinx AXI PCIe |
| 110 | Host Bridge driver. |
| 111 | |
| 112 | config PCI_XGENE |
| 113 | bool "X-Gene PCIe controller" |
| 114 | depends on ARM64 || COMPILE_TEST |
| 115 | depends on OF || (ACPI && PCI_QUIRKS) |
| 116 | help |
| 117 | Say Y here if you want internal PCI support on APM X-Gene SoC. |
| 118 | There are 5 internal PCIe ports available. Each port is GEN3 capable |
| 119 | and have varied lanes from x1 to x8. |
| 120 | |
| 121 | config PCI_XGENE_MSI |
| 122 | bool "X-Gene v1 PCIe MSI feature" |
| 123 | depends on PCI_XGENE |
| 124 | depends on PCI_MSI_IRQ_DOMAIN |
| 125 | default y |
| 126 | help |
| 127 | Say Y here if you want PCIe MSI support for the APM X-Gene v1 SoC. |
| 128 | This MSI driver supports 5 PCIe ports on the APM X-Gene v1 SoC. |
| 129 | |
| 130 | config PCI_V3_SEMI |
| 131 | bool "V3 Semiconductor PCI controller" |
| 132 | depends on OF |
| 133 | depends on ARM || COMPILE_TEST |
| 134 | default ARCH_INTEGRATOR_AP |
| 135 | |
| 136 | config PCI_VERSATILE |
| 137 | bool "ARM Versatile PB PCI controller" |
| 138 | depends on ARCH_VERSATILE |
| 139 | |
| 140 | config PCIE_IPROC |
| 141 | tristate |
| 142 | help |
| 143 | This enables the iProc PCIe core controller support for Broadcom's |
| 144 | iProc family of SoCs. An appropriate bus interface driver needs |
| 145 | to be enabled to select this. |
| 146 | |
| 147 | config PCIE_IPROC_PLATFORM |
| 148 | tristate "Broadcom iProc PCIe platform bus driver" |
| 149 | depends on ARCH_BCM_IPROC || (ARM && COMPILE_TEST) |
| 150 | depends on OF |
| 151 | select PCIE_IPROC |
| 152 | default ARCH_BCM_IPROC |
| 153 | help |
| 154 | Say Y here if you want to use the Broadcom iProc PCIe controller |
| 155 | through the generic platform bus interface |
| 156 | |
| 157 | config PCIE_IPROC_BCMA |
| 158 | tristate "Broadcom iProc PCIe BCMA bus driver" |
| 159 | depends on ARM && (ARCH_BCM_IPROC || COMPILE_TEST) |
| 160 | select PCIE_IPROC |
| 161 | select BCMA |
| 162 | default ARCH_BCM_5301X |
| 163 | help |
| 164 | Say Y here if you want to use the Broadcom iProc PCIe controller |
| 165 | through the BCMA bus interface |
| 166 | |
| 167 | config PCIE_IPROC_MSI |
| 168 | bool "Broadcom iProc PCIe MSI support" |
| 169 | depends on PCIE_IPROC_PLATFORM || PCIE_IPROC_BCMA |
| 170 | depends on PCI_MSI_IRQ_DOMAIN |
| 171 | default ARCH_BCM_IPROC |
| 172 | help |
| 173 | Say Y here if you want to enable MSI support for Broadcom's iProc |
| 174 | PCIe controller |
| 175 | |
| 176 | config PCIE_ALTERA |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 177 | tristate "Altera PCIe controller" |
| 178 | depends on ARM || NIOS2 || ARM64 || COMPILE_TEST |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 179 | help |
| 180 | Say Y here if you want to enable PCIe controller support on Altera |
| 181 | FPGA. |
| 182 | |
| 183 | config PCIE_ALTERA_MSI |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 184 | tristate "Altera PCIe MSI feature" |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 185 | depends on PCIE_ALTERA |
| 186 | depends on PCI_MSI_IRQ_DOMAIN |
| 187 | help |
| 188 | Say Y here if you want PCIe MSI support for the Altera FPGA. |
| 189 | This MSI driver supports Altera MSI to GIC controller IP. |
| 190 | |
| 191 | config PCI_HOST_THUNDER_PEM |
| 192 | bool "Cavium Thunder PCIe controller to off-chip devices" |
| 193 | depends on ARM64 || COMPILE_TEST |
| 194 | depends on OF || (ACPI && PCI_QUIRKS) |
| 195 | select PCI_HOST_COMMON |
| 196 | help |
| 197 | Say Y here if you want PCIe support for CN88XX Cavium Thunder SoCs. |
| 198 | |
| 199 | config PCI_HOST_THUNDER_ECAM |
| 200 | bool "Cavium Thunder ECAM controller to on-chip devices on pass-1.x silicon" |
| 201 | depends on ARM64 || COMPILE_TEST |
| 202 | depends on OF || (ACPI && PCI_QUIRKS) |
| 203 | select PCI_HOST_COMMON |
| 204 | help |
| 205 | Say Y here if you want ECAM support for CN88XX-Pass-1.x Cavium Thunder SoCs. |
| 206 | |
| 207 | config PCIE_ROCKCHIP |
| 208 | bool |
| 209 | depends on PCI |
| 210 | |
| 211 | config PCIE_ROCKCHIP_HOST |
| 212 | tristate "Rockchip PCIe host controller" |
| 213 | depends on ARCH_ROCKCHIP || COMPILE_TEST |
| 214 | depends on OF |
| 215 | depends on PCI_MSI_IRQ_DOMAIN |
| 216 | select MFD_SYSCON |
| 217 | select PCIE_ROCKCHIP |
| 218 | help |
| 219 | Say Y here if you want internal PCI support on Rockchip SoC. |
| 220 | There is 1 internal PCIe port available to support GEN2 with |
| 221 | 4 slots. |
| 222 | |
| 223 | config PCIE_ROCKCHIP_EP |
| 224 | bool "Rockchip PCIe endpoint controller" |
| 225 | depends on ARCH_ROCKCHIP || COMPILE_TEST |
| 226 | depends on OF |
| 227 | depends on PCI_ENDPOINT |
| 228 | select MFD_SYSCON |
| 229 | select PCIE_ROCKCHIP |
| 230 | help |
| 231 | Say Y here if you want to support Rockchip PCIe controller in |
| 232 | endpoint mode on Rockchip SoC. There is 1 internal PCIe port |
| 233 | available to support GEN2 with 4 slots. |
| 234 | |
| 235 | config PCIE_MEDIATEK |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 236 | tristate "MediaTek PCIe controller" |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 237 | depends on ARCH_MEDIATEK || COMPILE_TEST |
| 238 | depends on OF |
| 239 | depends on PCI_MSI_IRQ_DOMAIN |
| 240 | help |
| 241 | Say Y here if you want to enable PCIe controller support on |
| 242 | MediaTek SoCs. |
| 243 | |
| 244 | config PCIE_MOBIVEIL |
| 245 | bool "Mobiveil AXI PCIe controller" |
| 246 | depends on ARCH_ZYNQMP || COMPILE_TEST |
| 247 | depends on OF |
| 248 | depends on PCI_MSI_IRQ_DOMAIN |
| 249 | help |
| 250 | Say Y here if you want to enable support for the Mobiveil AXI PCIe |
| 251 | Soft IP. It has up to 8 outbound and inbound windows |
| 252 | for address translation and it is a PCIe Gen4 IP. |
| 253 | |
| 254 | config PCIE_TANGO_SMP8759 |
| 255 | bool "Tango SMP8759 PCIe controller (DANGEROUS)" |
| 256 | depends on ARCH_TANGO && PCI_MSI && OF |
| 257 | depends on BROKEN |
| 258 | select PCI_HOST_COMMON |
| 259 | help |
| 260 | Say Y here to enable PCIe controller support for Sigma Designs |
| 261 | Tango SMP8759-based systems. |
| 262 | |
| 263 | Note: The SMP8759 controller multiplexes PCI config and MMIO |
| 264 | accesses, and Linux doesn't provide a way to serialize them. |
| 265 | This can lead to data corruption if drivers perform concurrent |
| 266 | config and MMIO accesses. |
| 267 | |
| 268 | config VMD |
| 269 | depends on PCI_MSI && X86_64 && SRCU |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 270 | select X86_DEV_DMA_OPS |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 271 | tristate "Intel Volume Management Device Driver" |
| 272 | ---help--- |
| 273 | Adds support for the Intel Volume Management Device (VMD). VMD is a |
| 274 | secondary PCI host bridge that allows PCI Express root ports, |
| 275 | and devices attached to them, to be removed from the default |
| 276 | PCI domain and placed within the VMD domain. This provides |
| 277 | more bus resources than are otherwise possible with a |
| 278 | single domain. If you know your system provides one of these and |
| 279 | has devices attached to it, say Y; if you are not sure, say N. |
| 280 | |
| 281 | To compile this driver as a module, choose M here: the |
| 282 | module will be called vmd. |
| 283 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 284 | config PCI_HYPERV_INTERFACE |
| 285 | tristate "Hyper-V PCI Interface" |
| 286 | depends on X86 && HYPERV && PCI_MSI && PCI_MSI_IRQ_DOMAIN && X86_64 |
| 287 | help |
| 288 | The Hyper-V PCI Interface is a helper driver allows other drivers to |
| 289 | have a common interface with the Hyper-V PCI frontend driver. |
| 290 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 291 | source "drivers/pci/controller/dwc/Kconfig" |
| 292 | endmenu |