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David Brazdil0f672f62019-12-10 10:32:29 +00001/* SPDX-License-Identifier: GPL-2.0-or-later */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002#ifndef _ASM_POWERPC_EXCEPTION_H
3#define _ASM_POWERPC_EXCEPTION_H
4/*
5 * Extracted from head_64.S
6 *
7 * PowerPC version
8 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
9 *
10 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
11 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
12 * Adapted for Power Macintosh by Paul Mackerras.
13 * Low-level exception handlers and MMU support
14 * rewritten by Paul Mackerras.
15 * Copyright (C) 1996 Paul Mackerras.
16 *
17 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
18 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
19 *
20 * This file contains the low-level support and setup for the
21 * PowerPC-64 platform, including trap and interrupt dispatch.
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000022 */
23/*
24 * The following macros define the code that appears as
25 * the prologue to each of the exception handlers. They
26 * are split into two parts to allow a single kernel binary
27 * to be used for pSeries and iSeries.
28 *
29 * We make as much of the exception code common between native
30 * exception handlers (including pSeries LPAR) and iSeries LPAR
31 * implementations as possible.
32 */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000033#include <asm/feature-fixups.h>
34
David Brazdil0f672f62019-12-10 10:32:29 +000035/* PACA save area size in u64 units (exgen, exmc, etc) */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000036#if defined(CONFIG_RELOCATABLE)
David Brazdil0f672f62019-12-10 10:32:29 +000037#define EX_SIZE 10
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000038#else
David Brazdil0f672f62019-12-10 10:32:29 +000039#define EX_SIZE 9
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000040#endif
41
42/*
43 * maximum recursive depth of MCE exceptions
44 */
45#define MAX_MCE_DEPTH 4
46
David Brazdil0f672f62019-12-10 10:32:29 +000047#ifdef __ASSEMBLY__
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000048
49#define STF_ENTRY_BARRIER_SLOT \
50 STF_ENTRY_BARRIER_FIXUP_SECTION; \
51 nop; \
52 nop; \
53 nop
54
55#define STF_EXIT_BARRIER_SLOT \
56 STF_EXIT_BARRIER_FIXUP_SECTION; \
57 nop; \
58 nop; \
59 nop; \
60 nop; \
61 nop; \
62 nop
63
Olivier Deprez0e641232021-09-23 10:07:05 +020064#define ENTRY_FLUSH_SLOT \
65 ENTRY_FLUSH_FIXUP_SECTION; \
66 nop; \
67 nop; \
68 nop;
69
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000070/*
71 * r10 must be free to use, r13 must be paca
72 */
73#define INTERRUPT_TO_KERNEL \
Olivier Deprez0e641232021-09-23 10:07:05 +020074 STF_ENTRY_BARRIER_SLOT; \
75 ENTRY_FLUSH_SLOT
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000076
77/*
78 * Macros for annotating the expected destination of (h)rfid
79 *
80 * The nop instructions allow us to insert one or more instructions to flush the
81 * L1-D cache when returning to userspace or a guest.
82 */
83#define RFI_FLUSH_SLOT \
84 RFI_FLUSH_FIXUP_SECTION; \
85 nop; \
86 nop; \
87 nop
88
89#define RFI_TO_KERNEL \
90 rfid
91
92#define RFI_TO_USER \
93 STF_EXIT_BARRIER_SLOT; \
94 RFI_FLUSH_SLOT; \
95 rfid; \
96 b rfi_flush_fallback
97
98#define RFI_TO_USER_OR_KERNEL \
99 STF_EXIT_BARRIER_SLOT; \
100 RFI_FLUSH_SLOT; \
101 rfid; \
102 b rfi_flush_fallback
103
104#define RFI_TO_GUEST \
105 STF_EXIT_BARRIER_SLOT; \
106 RFI_FLUSH_SLOT; \
107 rfid; \
108 b rfi_flush_fallback
109
110#define HRFI_TO_KERNEL \
111 hrfid
112
113#define HRFI_TO_USER \
114 STF_EXIT_BARRIER_SLOT; \
115 RFI_FLUSH_SLOT; \
116 hrfid; \
117 b hrfi_flush_fallback
118
119#define HRFI_TO_USER_OR_KERNEL \
120 STF_EXIT_BARRIER_SLOT; \
121 RFI_FLUSH_SLOT; \
122 hrfid; \
123 b hrfi_flush_fallback
124
125#define HRFI_TO_GUEST \
126 STF_EXIT_BARRIER_SLOT; \
127 RFI_FLUSH_SLOT; \
128 hrfid; \
129 b hrfi_flush_fallback
130
131#define HRFI_TO_UNKNOWN \
132 STF_EXIT_BARRIER_SLOT; \
133 RFI_FLUSH_SLOT; \
134 hrfid; \
135 b hrfi_flush_fallback
136
Olivier Deprez0e641232021-09-23 10:07:05 +0200137#else /* __ASSEMBLY__ */
138/* Prototype for function defined in exceptions-64s.S */
139void do_uaccess_flush(void);
David Brazdil0f672f62019-12-10 10:32:29 +0000140#endif /* __ASSEMBLY__ */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000141
142#endif /* _ASM_POWERPC_EXCEPTION_H */