Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * HPE WatchDog Driver |
| 3 | * based on |
| 4 | * |
| 5 | * SoftDog 0.05: A Software Watchdog Device |
| 6 | * |
| 7 | * (c) Copyright 2018 Hewlett Packard Enterprise Development LP |
| 8 | * Thomas Mingarelli <thomas.mingarelli@hpe.com> |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License |
| 12 | * version 2 as published by the Free Software Foundation |
| 13 | * |
| 14 | */ |
| 15 | |
| 16 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 17 | |
| 18 | #include <linux/device.h> |
| 19 | #include <linux/io.h> |
| 20 | #include <linux/kernel.h> |
| 21 | #include <linux/module.h> |
| 22 | #include <linux/moduleparam.h> |
| 23 | #include <linux/pci.h> |
| 24 | #include <linux/pci_ids.h> |
| 25 | #include <linux/types.h> |
| 26 | #include <linux/watchdog.h> |
| 27 | #include <asm/nmi.h> |
| 28 | |
| 29 | #define HPWDT_VERSION "2.0.0" |
| 30 | #define SECS_TO_TICKS(secs) ((secs) * 1000 / 128) |
| 31 | #define TICKS_TO_SECS(ticks) ((ticks) * 128 / 1000) |
| 32 | #define HPWDT_MAX_TIMER TICKS_TO_SECS(65535) |
| 33 | #define DEFAULT_MARGIN 30 |
| 34 | #define PRETIMEOUT_SEC 9 |
| 35 | |
| 36 | static bool ilo5; |
| 37 | static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */ |
| 38 | static bool nowayout = WATCHDOG_NOWAYOUT; |
| 39 | static bool pretimeout = IS_ENABLED(CONFIG_HPWDT_NMI_DECODING); |
| 40 | |
| 41 | static void __iomem *pci_mem_addr; /* the PCI-memory address */ |
| 42 | static unsigned long __iomem *hpwdt_nmistat; |
| 43 | static unsigned long __iomem *hpwdt_timer_reg; |
| 44 | static unsigned long __iomem *hpwdt_timer_con; |
| 45 | |
| 46 | static const struct pci_device_id hpwdt_devices[] = { |
| 47 | { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) }, /* iLO2 */ |
| 48 | { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) }, /* iLO3 */ |
| 49 | {0}, /* terminate list */ |
| 50 | }; |
| 51 | MODULE_DEVICE_TABLE(pci, hpwdt_devices); |
| 52 | |
| 53 | |
| 54 | /* |
| 55 | * Watchdog operations |
| 56 | */ |
| 57 | static int hpwdt_start(struct watchdog_device *wdd) |
| 58 | { |
| 59 | int control = 0x81 | (pretimeout ? 0x4 : 0); |
| 60 | int reload = SECS_TO_TICKS(wdd->timeout); |
| 61 | |
| 62 | dev_dbg(wdd->parent, "start watchdog 0x%08x:0x%02x\n", reload, control); |
| 63 | iowrite16(reload, hpwdt_timer_reg); |
| 64 | iowrite8(control, hpwdt_timer_con); |
| 65 | |
| 66 | return 0; |
| 67 | } |
| 68 | |
| 69 | static void hpwdt_stop(void) |
| 70 | { |
| 71 | unsigned long data; |
| 72 | |
| 73 | pr_debug("stop watchdog\n"); |
| 74 | |
| 75 | data = ioread8(hpwdt_timer_con); |
| 76 | data &= 0xFE; |
| 77 | iowrite8(data, hpwdt_timer_con); |
| 78 | } |
| 79 | |
| 80 | static int hpwdt_stop_core(struct watchdog_device *wdd) |
| 81 | { |
| 82 | hpwdt_stop(); |
| 83 | |
| 84 | return 0; |
| 85 | } |
| 86 | |
| 87 | static int hpwdt_ping(struct watchdog_device *wdd) |
| 88 | { |
| 89 | int reload = SECS_TO_TICKS(wdd->timeout); |
| 90 | |
| 91 | dev_dbg(wdd->parent, "ping watchdog 0x%08x\n", reload); |
| 92 | iowrite16(reload, hpwdt_timer_reg); |
| 93 | |
| 94 | return 0; |
| 95 | } |
| 96 | |
| 97 | static unsigned int hpwdt_gettimeleft(struct watchdog_device *wdd) |
| 98 | { |
| 99 | return TICKS_TO_SECS(ioread16(hpwdt_timer_reg)); |
| 100 | } |
| 101 | |
| 102 | static int hpwdt_settimeout(struct watchdog_device *wdd, unsigned int val) |
| 103 | { |
| 104 | dev_dbg(wdd->parent, "set_timeout = %d\n", val); |
| 105 | |
| 106 | wdd->timeout = val; |
| 107 | if (val <= wdd->pretimeout) { |
| 108 | dev_dbg(wdd->parent, "pretimeout < timeout. Setting to zero\n"); |
| 109 | wdd->pretimeout = 0; |
| 110 | pretimeout = 0; |
| 111 | if (watchdog_active(wdd)) |
| 112 | hpwdt_start(wdd); |
| 113 | } |
| 114 | hpwdt_ping(wdd); |
| 115 | |
| 116 | return 0; |
| 117 | } |
| 118 | |
| 119 | #ifdef CONFIG_HPWDT_NMI_DECODING |
| 120 | static int hpwdt_set_pretimeout(struct watchdog_device *wdd, unsigned int req) |
| 121 | { |
| 122 | unsigned int val = 0; |
| 123 | |
| 124 | dev_dbg(wdd->parent, "set_pretimeout = %d\n", req); |
| 125 | if (req) { |
| 126 | val = PRETIMEOUT_SEC; |
| 127 | if (val >= wdd->timeout) |
| 128 | return -EINVAL; |
| 129 | } |
| 130 | |
| 131 | if (val != req) |
| 132 | dev_dbg(wdd->parent, "Rounding pretimeout to: %d\n", val); |
| 133 | |
| 134 | wdd->pretimeout = val; |
| 135 | pretimeout = !!val; |
| 136 | |
| 137 | if (watchdog_active(wdd)) |
| 138 | hpwdt_start(wdd); |
| 139 | |
| 140 | return 0; |
| 141 | } |
| 142 | |
| 143 | static int hpwdt_my_nmi(void) |
| 144 | { |
| 145 | return ioread8(hpwdt_nmistat) & 0x6; |
| 146 | } |
| 147 | |
| 148 | /* |
| 149 | * NMI Handler |
| 150 | */ |
| 151 | static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs) |
| 152 | { |
| 153 | unsigned int mynmi = hpwdt_my_nmi(); |
| 154 | static char panic_msg[] = |
| 155 | "00: An NMI occurred. Depending on your system the reason " |
| 156 | "for the NMI is logged in any one of the following resources:\n" |
| 157 | "1. Integrated Management Log (IML)\n" |
| 158 | "2. OA Syslog\n" |
| 159 | "3. OA Forward Progress Log\n" |
| 160 | "4. iLO Event Log"; |
| 161 | |
| 162 | if (ilo5 && ulReason == NMI_UNKNOWN && !mynmi) |
| 163 | return NMI_DONE; |
| 164 | |
| 165 | if (ilo5 && !pretimeout) |
| 166 | return NMI_DONE; |
| 167 | |
| 168 | hpwdt_stop(); |
| 169 | |
| 170 | hex_byte_pack(panic_msg, mynmi); |
| 171 | nmi_panic(regs, panic_msg); |
| 172 | |
| 173 | return NMI_HANDLED; |
| 174 | } |
| 175 | #endif /* CONFIG_HPWDT_NMI_DECODING */ |
| 176 | |
| 177 | |
| 178 | static const struct watchdog_info ident = { |
| 179 | .options = WDIOF_PRETIMEOUT | |
| 180 | WDIOF_SETTIMEOUT | |
| 181 | WDIOF_KEEPALIVEPING | |
| 182 | WDIOF_MAGICCLOSE, |
| 183 | .identity = "HPE iLO2+ HW Watchdog Timer", |
| 184 | }; |
| 185 | |
| 186 | /* |
| 187 | * Kernel interfaces |
| 188 | */ |
| 189 | |
| 190 | static const struct watchdog_ops hpwdt_ops = { |
| 191 | .owner = THIS_MODULE, |
| 192 | .start = hpwdt_start, |
| 193 | .stop = hpwdt_stop_core, |
| 194 | .ping = hpwdt_ping, |
| 195 | .set_timeout = hpwdt_settimeout, |
| 196 | .get_timeleft = hpwdt_gettimeleft, |
| 197 | #ifdef CONFIG_HPWDT_NMI_DECODING |
| 198 | .set_pretimeout = hpwdt_set_pretimeout, |
| 199 | #endif |
| 200 | }; |
| 201 | |
| 202 | static struct watchdog_device hpwdt_dev = { |
| 203 | .info = &ident, |
| 204 | .ops = &hpwdt_ops, |
| 205 | .min_timeout = 1, |
| 206 | .max_timeout = HPWDT_MAX_TIMER, |
| 207 | .timeout = DEFAULT_MARGIN, |
| 208 | #ifdef CONFIG_HPWDT_NMI_DECODING |
| 209 | .pretimeout = PRETIMEOUT_SEC, |
| 210 | #endif |
| 211 | }; |
| 212 | |
| 213 | |
| 214 | /* |
| 215 | * Init & Exit |
| 216 | */ |
| 217 | |
| 218 | static int hpwdt_init_nmi_decoding(struct pci_dev *dev) |
| 219 | { |
| 220 | #ifdef CONFIG_HPWDT_NMI_DECODING |
| 221 | int retval; |
| 222 | /* |
| 223 | * Only one function can register for NMI_UNKNOWN |
| 224 | */ |
| 225 | retval = register_nmi_handler(NMI_UNKNOWN, hpwdt_pretimeout, 0, "hpwdt"); |
| 226 | if (retval) |
| 227 | goto error; |
| 228 | retval = register_nmi_handler(NMI_SERR, hpwdt_pretimeout, 0, "hpwdt"); |
| 229 | if (retval) |
| 230 | goto error1; |
| 231 | retval = register_nmi_handler(NMI_IO_CHECK, hpwdt_pretimeout, 0, "hpwdt"); |
| 232 | if (retval) |
| 233 | goto error2; |
| 234 | |
| 235 | dev_info(&dev->dev, |
| 236 | "HPE Watchdog Timer Driver: NMI decoding initialized\n"); |
| 237 | |
| 238 | return 0; |
| 239 | |
| 240 | error2: |
| 241 | unregister_nmi_handler(NMI_SERR, "hpwdt"); |
| 242 | error1: |
| 243 | unregister_nmi_handler(NMI_UNKNOWN, "hpwdt"); |
| 244 | error: |
| 245 | dev_warn(&dev->dev, |
| 246 | "Unable to register a die notifier (err=%d).\n", |
| 247 | retval); |
| 248 | return retval; |
| 249 | #endif /* CONFIG_HPWDT_NMI_DECODING */ |
| 250 | return 0; |
| 251 | } |
| 252 | |
| 253 | static void hpwdt_exit_nmi_decoding(void) |
| 254 | { |
| 255 | #ifdef CONFIG_HPWDT_NMI_DECODING |
| 256 | unregister_nmi_handler(NMI_UNKNOWN, "hpwdt"); |
| 257 | unregister_nmi_handler(NMI_SERR, "hpwdt"); |
| 258 | unregister_nmi_handler(NMI_IO_CHECK, "hpwdt"); |
| 259 | #endif |
| 260 | } |
| 261 | |
| 262 | static int hpwdt_init_one(struct pci_dev *dev, |
| 263 | const struct pci_device_id *ent) |
| 264 | { |
| 265 | int retval; |
| 266 | |
| 267 | /* |
| 268 | * First let's find out if we are on an iLO2+ server. We will |
| 269 | * not run on a legacy ASM box. |
| 270 | * So we only support the G5 ProLiant servers and higher. |
| 271 | */ |
| 272 | if (dev->subsystem_vendor != PCI_VENDOR_ID_HP && |
| 273 | dev->subsystem_vendor != PCI_VENDOR_ID_HP_3PAR) { |
| 274 | dev_warn(&dev->dev, |
| 275 | "This server does not have an iLO2+ ASIC.\n"); |
| 276 | return -ENODEV; |
| 277 | } |
| 278 | |
| 279 | /* |
| 280 | * Ignore all auxilary iLO devices with the following PCI ID |
| 281 | */ |
| 282 | if (dev->subsystem_vendor == PCI_VENDOR_ID_HP && |
| 283 | dev->subsystem_device == 0x1979) |
| 284 | return -ENODEV; |
| 285 | |
| 286 | if (pci_enable_device(dev)) { |
| 287 | dev_warn(&dev->dev, |
| 288 | "Not possible to enable PCI Device: 0x%x:0x%x.\n", |
| 289 | ent->vendor, ent->device); |
| 290 | return -ENODEV; |
| 291 | } |
| 292 | |
| 293 | pci_mem_addr = pci_iomap(dev, 1, 0x80); |
| 294 | if (!pci_mem_addr) { |
| 295 | dev_warn(&dev->dev, |
| 296 | "Unable to detect the iLO2+ server memory.\n"); |
| 297 | retval = -ENOMEM; |
| 298 | goto error_pci_iomap; |
| 299 | } |
| 300 | hpwdt_nmistat = pci_mem_addr + 0x6e; |
| 301 | hpwdt_timer_reg = pci_mem_addr + 0x70; |
| 302 | hpwdt_timer_con = pci_mem_addr + 0x72; |
| 303 | |
| 304 | /* Make sure that timer is disabled until /dev/watchdog is opened */ |
| 305 | hpwdt_stop(); |
| 306 | |
| 307 | /* Initialize NMI Decoding functionality */ |
| 308 | retval = hpwdt_init_nmi_decoding(dev); |
| 309 | if (retval != 0) |
| 310 | goto error_init_nmi_decoding; |
| 311 | |
| 312 | watchdog_set_nowayout(&hpwdt_dev, nowayout); |
| 313 | if (watchdog_init_timeout(&hpwdt_dev, soft_margin, NULL)) |
| 314 | dev_warn(&dev->dev, "Invalid soft_margin: %d.\n", soft_margin); |
| 315 | |
| 316 | hpwdt_dev.parent = &dev->dev; |
| 317 | retval = watchdog_register_device(&hpwdt_dev); |
| 318 | if (retval < 0) { |
| 319 | dev_err(&dev->dev, "watchdog register failed: %d.\n", retval); |
| 320 | goto error_wd_register; |
| 321 | } |
| 322 | |
| 323 | dev_info(&dev->dev, "HPE Watchdog Timer Driver: %s" |
| 324 | ", timer margin: %d seconds (nowayout=%d).\n", |
| 325 | HPWDT_VERSION, hpwdt_dev.timeout, nowayout); |
| 326 | |
| 327 | if (dev->subsystem_vendor == PCI_VENDOR_ID_HP_3PAR) |
| 328 | ilo5 = true; |
| 329 | |
| 330 | return 0; |
| 331 | |
| 332 | error_wd_register: |
| 333 | hpwdt_exit_nmi_decoding(); |
| 334 | error_init_nmi_decoding: |
| 335 | pci_iounmap(dev, pci_mem_addr); |
| 336 | error_pci_iomap: |
| 337 | pci_disable_device(dev); |
| 338 | return retval; |
| 339 | } |
| 340 | |
| 341 | static void hpwdt_exit(struct pci_dev *dev) |
| 342 | { |
| 343 | if (!nowayout) |
| 344 | hpwdt_stop(); |
| 345 | |
| 346 | watchdog_unregister_device(&hpwdt_dev); |
| 347 | hpwdt_exit_nmi_decoding(); |
| 348 | pci_iounmap(dev, pci_mem_addr); |
| 349 | pci_disable_device(dev); |
| 350 | } |
| 351 | |
| 352 | static struct pci_driver hpwdt_driver = { |
| 353 | .name = "hpwdt", |
| 354 | .id_table = hpwdt_devices, |
| 355 | .probe = hpwdt_init_one, |
| 356 | .remove = hpwdt_exit, |
| 357 | }; |
| 358 | |
| 359 | MODULE_AUTHOR("Tom Mingarelli"); |
| 360 | MODULE_DESCRIPTION("hpe watchdog driver"); |
| 361 | MODULE_LICENSE("GPL"); |
| 362 | MODULE_VERSION(HPWDT_VERSION); |
| 363 | |
| 364 | module_param(soft_margin, int, 0); |
| 365 | MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds"); |
| 366 | |
| 367 | module_param(nowayout, bool, 0); |
| 368 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" |
| 369 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
| 370 | |
| 371 | #ifdef CONFIG_HPWDT_NMI_DECODING |
| 372 | module_param(pretimeout, bool, 0); |
| 373 | MODULE_PARM_DESC(pretimeout, "Watchdog pretimeout enabled"); |
| 374 | #endif |
| 375 | |
| 376 | module_pci_driver(hpwdt_driver); |