| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * Marvell 88E6xxx SERDES manipulation, via SMI bus |
| 3 | * |
| 4 | * Copyright (c) 2008 Marvell Semiconductor |
| 5 | * |
| 6 | * Copyright (c) 2016 Andrew Lunn <andrew@lunn.ch> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | */ |
| 13 | |
| 14 | #ifndef _MV88E6XXX_SERDES_H |
| 15 | #define _MV88E6XXX_SERDES_H |
| 16 | |
| 17 | #include "chip.h" |
| 18 | |
| 19 | #define MV88E6352_ADDR_SERDES 0x0f |
| 20 | #define MV88E6352_SERDES_PAGE_FIBER 0x01 |
| 21 | |
| 22 | #define MV88E6341_ADDR_SERDES 0x15 |
| 23 | |
| 24 | #define MV88E6390_PORT9_LANE0 0x09 |
| 25 | #define MV88E6390_PORT9_LANE1 0x12 |
| 26 | #define MV88E6390_PORT9_LANE2 0x13 |
| 27 | #define MV88E6390_PORT9_LANE3 0x14 |
| 28 | #define MV88E6390_PORT10_LANE0 0x0a |
| 29 | #define MV88E6390_PORT10_LANE1 0x15 |
| 30 | #define MV88E6390_PORT10_LANE2 0x16 |
| 31 | #define MV88E6390_PORT10_LANE3 0x17 |
| 32 | |
| 33 | /* 10GBASE-R and 10GBASE-X4/X2 */ |
| 34 | #define MV88E6390_PCS_CONTROL_1 0x1000 |
| 35 | #define MV88E6390_PCS_CONTROL_1_RESET BIT(15) |
| 36 | #define MV88E6390_PCS_CONTROL_1_LOOPBACK BIT(14) |
| 37 | #define MV88E6390_PCS_CONTROL_1_SPEED BIT(13) |
| 38 | #define MV88E6390_PCS_CONTROL_1_PDOWN BIT(11) |
| 39 | |
| 40 | /* 1000BASE-X and SGMII */ |
| 41 | #define MV88E6390_SGMII_CONTROL 0x2000 |
| 42 | #define MV88E6390_SGMII_CONTROL_RESET BIT(15) |
| 43 | #define MV88E6390_SGMII_CONTROL_LOOPBACK BIT(14) |
| 44 | #define MV88E6390_SGMII_CONTROL_PDOWN BIT(11) |
| 45 | #define MV88E6390_SGMII_STATUS 0x2001 |
| 46 | #define MV88E6390_SGMII_STATUS_AN_DONE BIT(5) |
| 47 | #define MV88E6390_SGMII_STATUS_REMOTE_FAULT BIT(4) |
| 48 | #define MV88E6390_SGMII_STATUS_LINK BIT(2) |
| 49 | #define MV88E6390_SGMII_INT_ENABLE 0xa001 |
| 50 | #define MV88E6390_SGMII_INT_SPEED_CHANGE BIT(14) |
| 51 | #define MV88E6390_SGMII_INT_DUPLEX_CHANGE BIT(13) |
| 52 | #define MV88E6390_SGMII_INT_PAGE_RX BIT(12) |
| 53 | #define MV88E6390_SGMII_INT_AN_COMPLETE BIT(11) |
| 54 | #define MV88E6390_SGMII_INT_LINK_DOWN BIT(10) |
| 55 | #define MV88E6390_SGMII_INT_LINK_UP BIT(9) |
| 56 | #define MV88E6390_SGMII_INT_SYMBOL_ERROR BIT(8) |
| 57 | #define MV88E6390_SGMII_INT_FALSE_CARRIER BIT(7) |
| 58 | #define MV88E6390_SGMII_INT_STATUS 0xa002 |
| 59 | |
| 60 | int mv88e6390x_serdes_get_lane(struct mv88e6xxx_chip *chip, int port); |
| 61 | int mv88e6341_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on); |
| 62 | int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on); |
| 63 | int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on); |
| 64 | int mv88e6390x_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on); |
| 65 | int mv88e6390_serdes_irq_setup(struct mv88e6xxx_chip *chip, int port); |
| 66 | void mv88e6390_serdes_irq_free(struct mv88e6xxx_chip *chip, int port); |
| 67 | int mv88e6352_serdes_get_sset_count(struct mv88e6xxx_chip *chip, int port); |
| 68 | int mv88e6352_serdes_get_strings(struct mv88e6xxx_chip *chip, |
| 69 | int port, uint8_t *data); |
| 70 | int mv88e6352_serdes_get_stats(struct mv88e6xxx_chip *chip, int port, |
| 71 | uint64_t *data); |
| 72 | int mv88e6390_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, |
| 73 | int lane); |
| 74 | int mv88e6390_serdes_irq_disable(struct mv88e6xxx_chip *chip, int port, |
| 75 | int lane); |
| 76 | |
| 77 | #endif |