Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. |
| 3 | * |
| 4 | * This software is available to you under a choice of one of two |
| 5 | * licenses. You may choose to be licensed under the terms of the GNU |
| 6 | * General Public License (GPL) Version 2, available from the file |
| 7 | * COPYING in the main directory of this source tree, or the |
| 8 | * OpenIB.org BSD license below: |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or |
| 11 | * without modification, are permitted provided that the following |
| 12 | * conditions are met: |
| 13 | * |
| 14 | * - Redistributions of source code must retain the above |
| 15 | * copyright notice, this list of conditions and the following |
| 16 | * disclaimer. |
| 17 | * |
| 18 | * - Redistributions in binary form must reproduce the above |
| 19 | * copyright notice, this list of conditions and the following |
| 20 | * disclaimer in the documentation and/or other materials |
| 21 | * provided with the distribution. |
| 22 | * |
| 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 30 | * SOFTWARE. |
| 31 | */ |
| 32 | |
| 33 | #include <linux/module.h> |
| 34 | #include <rdma/ib_umem.h> |
| 35 | #include <rdma/ib_umem_odp.h> |
| 36 | #include "mlx5_ib.h" |
| 37 | |
| 38 | /* @umem: umem object to scan |
| 39 | * @addr: ib virtual address requested by the user |
| 40 | * @max_page_shift: high limit for page_shift - 0 means no limit |
| 41 | * @count: number of PAGE_SIZE pages covered by umem |
| 42 | * @shift: page shift for the compound pages found in the region |
| 43 | * @ncont: number of compund pages |
| 44 | * @order: log2 of the number of compound pages |
| 45 | */ |
| 46 | void mlx5_ib_cont_pages(struct ib_umem *umem, u64 addr, |
| 47 | unsigned long max_page_shift, |
| 48 | int *count, int *shift, |
| 49 | int *ncont, int *order) |
| 50 | { |
| 51 | unsigned long tmp; |
| 52 | unsigned long m; |
| 53 | u64 base = ~0, p = 0; |
| 54 | u64 len, pfn; |
| 55 | int i = 0; |
| 56 | struct scatterlist *sg; |
| 57 | int entry; |
| 58 | unsigned long page_shift = umem->page_shift; |
| 59 | |
| 60 | if (umem->odp_data) { |
| 61 | *ncont = ib_umem_page_count(umem); |
| 62 | *count = *ncont << (page_shift - PAGE_SHIFT); |
| 63 | *shift = page_shift; |
| 64 | if (order) |
| 65 | *order = ilog2(roundup_pow_of_two(*ncont)); |
| 66 | |
| 67 | return; |
| 68 | } |
| 69 | |
| 70 | addr = addr >> page_shift; |
| 71 | tmp = (unsigned long)addr; |
| 72 | m = find_first_bit(&tmp, BITS_PER_LONG); |
| 73 | if (max_page_shift) |
| 74 | m = min_t(unsigned long, max_page_shift - page_shift, m); |
| 75 | |
| 76 | for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) { |
| 77 | len = sg_dma_len(sg) >> page_shift; |
| 78 | pfn = sg_dma_address(sg) >> page_shift; |
| 79 | if (base + p != pfn) { |
| 80 | /* If either the offset or the new |
| 81 | * base are unaligned update m |
| 82 | */ |
| 83 | tmp = (unsigned long)(pfn | p); |
| 84 | if (!IS_ALIGNED(tmp, 1 << m)) |
| 85 | m = find_first_bit(&tmp, BITS_PER_LONG); |
| 86 | |
| 87 | base = pfn; |
| 88 | p = 0; |
| 89 | } |
| 90 | |
| 91 | p += len; |
| 92 | i += len; |
| 93 | } |
| 94 | |
| 95 | if (i) { |
| 96 | m = min_t(unsigned long, ilog2(roundup_pow_of_two(i)), m); |
| 97 | |
| 98 | if (order) |
| 99 | *order = ilog2(roundup_pow_of_two(i) >> m); |
| 100 | |
| 101 | *ncont = DIV_ROUND_UP(i, (1 << m)); |
| 102 | } else { |
| 103 | m = 0; |
| 104 | |
| 105 | if (order) |
| 106 | *order = 0; |
| 107 | |
| 108 | *ncont = 0; |
| 109 | } |
| 110 | *shift = page_shift + m; |
| 111 | *count = i; |
| 112 | } |
| 113 | |
| 114 | #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING |
| 115 | static u64 umem_dma_to_mtt(dma_addr_t umem_dma) |
| 116 | { |
| 117 | u64 mtt_entry = umem_dma & ODP_DMA_ADDR_MASK; |
| 118 | |
| 119 | if (umem_dma & ODP_READ_ALLOWED_BIT) |
| 120 | mtt_entry |= MLX5_IB_MTT_READ; |
| 121 | if (umem_dma & ODP_WRITE_ALLOWED_BIT) |
| 122 | mtt_entry |= MLX5_IB_MTT_WRITE; |
| 123 | |
| 124 | return mtt_entry; |
| 125 | } |
| 126 | #endif |
| 127 | |
| 128 | /* |
| 129 | * Populate the given array with bus addresses from the umem. |
| 130 | * |
| 131 | * dev - mlx5_ib device |
| 132 | * umem - umem to use to fill the pages |
| 133 | * page_shift - determines the page size used in the resulting array |
| 134 | * offset - offset into the umem to start from, |
| 135 | * only implemented for ODP umems |
| 136 | * num_pages - total number of pages to fill |
| 137 | * pas - bus addresses array to fill |
| 138 | * access_flags - access flags to set on all present pages. |
| 139 | use enum mlx5_ib_mtt_access_flags for this. |
| 140 | */ |
| 141 | void __mlx5_ib_populate_pas(struct mlx5_ib_dev *dev, struct ib_umem *umem, |
| 142 | int page_shift, size_t offset, size_t num_pages, |
| 143 | __be64 *pas, int access_flags) |
| 144 | { |
| 145 | unsigned long umem_page_shift = umem->page_shift; |
| 146 | int shift = page_shift - umem_page_shift; |
| 147 | int mask = (1 << shift) - 1; |
| 148 | int i, k, idx; |
| 149 | u64 cur = 0; |
| 150 | u64 base; |
| 151 | int len; |
| 152 | struct scatterlist *sg; |
| 153 | int entry; |
| 154 | #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING |
| 155 | const bool odp = umem->odp_data != NULL; |
| 156 | |
| 157 | if (odp) { |
| 158 | WARN_ON(shift != 0); |
| 159 | WARN_ON(access_flags != (MLX5_IB_MTT_READ | MLX5_IB_MTT_WRITE)); |
| 160 | |
| 161 | for (i = 0; i < num_pages; ++i) { |
| 162 | dma_addr_t pa = umem->odp_data->dma_list[offset + i]; |
| 163 | |
| 164 | pas[i] = cpu_to_be64(umem_dma_to_mtt(pa)); |
| 165 | } |
| 166 | return; |
| 167 | } |
| 168 | #endif |
| 169 | |
| 170 | i = 0; |
| 171 | for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) { |
| 172 | len = sg_dma_len(sg) >> umem_page_shift; |
| 173 | base = sg_dma_address(sg); |
| 174 | |
| 175 | /* Skip elements below offset */ |
| 176 | if (i + len < offset << shift) { |
| 177 | i += len; |
| 178 | continue; |
| 179 | } |
| 180 | |
| 181 | /* Skip pages below offset */ |
| 182 | if (i < offset << shift) { |
| 183 | k = (offset << shift) - i; |
| 184 | i = offset << shift; |
| 185 | } else { |
| 186 | k = 0; |
| 187 | } |
| 188 | |
| 189 | for (; k < len; k++) { |
| 190 | if (!(i & mask)) { |
| 191 | cur = base + (k << umem_page_shift); |
| 192 | cur |= access_flags; |
| 193 | idx = (i >> shift) - offset; |
| 194 | |
| 195 | pas[idx] = cpu_to_be64(cur); |
| 196 | mlx5_ib_dbg(dev, "pas[%d] 0x%llx\n", |
| 197 | i >> shift, be64_to_cpu(pas[idx])); |
| 198 | } |
| 199 | i++; |
| 200 | |
| 201 | /* Stop after num_pages reached */ |
| 202 | if (i >> shift >= offset + num_pages) |
| 203 | return; |
| 204 | } |
| 205 | } |
| 206 | } |
| 207 | |
| 208 | void mlx5_ib_populate_pas(struct mlx5_ib_dev *dev, struct ib_umem *umem, |
| 209 | int page_shift, __be64 *pas, int access_flags) |
| 210 | { |
| 211 | return __mlx5_ib_populate_pas(dev, umem, page_shift, 0, |
| 212 | ib_umem_num_pages(umem), pas, |
| 213 | access_flags); |
| 214 | } |
| 215 | int mlx5_ib_get_buf_offset(u64 addr, int page_shift, u32 *offset) |
| 216 | { |
| 217 | u64 page_size; |
| 218 | u64 page_mask; |
| 219 | u64 off_size; |
| 220 | u64 off_mask; |
| 221 | u64 buf_off; |
| 222 | |
| 223 | page_size = (u64)1 << page_shift; |
| 224 | page_mask = page_size - 1; |
| 225 | buf_off = addr & page_mask; |
| 226 | off_size = page_size >> 6; |
| 227 | off_mask = off_size - 1; |
| 228 | |
| 229 | if (buf_off & off_mask) |
| 230 | return -EINVAL; |
| 231 | |
| 232 | *offset = buf_off >> ilog2(off_size); |
| 233 | return 0; |
| 234 | } |