Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame^] | 1 | // SPDX-License-Identifier: (GPL-2.0 OR MIT) |
| 2 | /* |
| 3 | * Copyright (c) 2018 BayLibre, SAS. |
| 4 | * Author: Jerome Brunet <jbrunet@baylibre.com> |
| 5 | */ |
| 6 | |
| 7 | #include <linux/clk-provider.h> |
| 8 | #include "clkc-audio.h" |
| 9 | |
| 10 | /* |
| 11 | * This is a special clock for the audio controller. |
| 12 | * The phase of mst_sclk clock output can be controlled independently |
| 13 | * for the outside world (ph0), the tdmout (ph1) and tdmin (ph2). |
| 14 | * Controlling these 3 phases as just one makes things simpler and |
| 15 | * give the same clock view to all the element on the i2s bus. |
| 16 | * If necessary, we can still control the phase in the tdm block |
| 17 | * which makes these independent control redundant. |
| 18 | */ |
| 19 | static inline struct meson_clk_triphase_data * |
| 20 | meson_clk_triphase_data(struct clk_regmap *clk) |
| 21 | { |
| 22 | return (struct meson_clk_triphase_data *)clk->data; |
| 23 | } |
| 24 | |
| 25 | static void meson_clk_triphase_sync(struct clk_hw *hw) |
| 26 | { |
| 27 | struct clk_regmap *clk = to_clk_regmap(hw); |
| 28 | struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk); |
| 29 | unsigned int val; |
| 30 | |
| 31 | /* Get phase 0 and sync it to phase 1 and 2 */ |
| 32 | val = meson_parm_read(clk->map, &tph->ph0); |
| 33 | meson_parm_write(clk->map, &tph->ph1, val); |
| 34 | meson_parm_write(clk->map, &tph->ph2, val); |
| 35 | } |
| 36 | |
| 37 | static int meson_clk_triphase_get_phase(struct clk_hw *hw) |
| 38 | { |
| 39 | struct clk_regmap *clk = to_clk_regmap(hw); |
| 40 | struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk); |
| 41 | unsigned int val; |
| 42 | |
| 43 | /* Phase are in sync, reading phase 0 is enough */ |
| 44 | val = meson_parm_read(clk->map, &tph->ph0); |
| 45 | |
| 46 | return meson_clk_degrees_from_val(val, tph->ph0.width); |
| 47 | } |
| 48 | |
| 49 | static int meson_clk_triphase_set_phase(struct clk_hw *hw, int degrees) |
| 50 | { |
| 51 | struct clk_regmap *clk = to_clk_regmap(hw); |
| 52 | struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk); |
| 53 | unsigned int val; |
| 54 | |
| 55 | val = meson_clk_degrees_to_val(degrees, tph->ph0.width); |
| 56 | meson_parm_write(clk->map, &tph->ph0, val); |
| 57 | meson_parm_write(clk->map, &tph->ph1, val); |
| 58 | meson_parm_write(clk->map, &tph->ph2, val); |
| 59 | |
| 60 | return 0; |
| 61 | } |
| 62 | |
| 63 | const struct clk_ops meson_clk_triphase_ops = { |
| 64 | .init = meson_clk_triphase_sync, |
| 65 | .get_phase = meson_clk_triphase_get_phase, |
| 66 | .set_phase = meson_clk_triphase_set_phase, |
| 67 | }; |
| 68 | EXPORT_SYMBOL_GPL(meson_clk_triphase_ops); |