| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * Device Tree support for Rockchip SoCs |
| 3 | * |
| 4 | * Copyright (c) 2013 MundoReader S.L. |
| 5 | * Author: Heiko Stuebner <heiko@sntech.de> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | */ |
| 17 | |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/init.h> |
| 20 | #include <linux/of_platform.h> |
| 21 | #include <linux/irqchip.h> |
| 22 | #include <linux/clk-provider.h> |
| 23 | #include <linux/clocksource.h> |
| 24 | #include <linux/mfd/syscon.h> |
| 25 | #include <linux/regmap.h> |
| 26 | #include <asm/mach/arch.h> |
| 27 | #include <asm/mach/map.h> |
| 28 | #include <asm/hardware/cache-l2x0.h> |
| 29 | #include "core.h" |
| 30 | #include "pm.h" |
| 31 | |
| 32 | #define RK3288_TIMER6_7_PHYS 0xff810000 |
| 33 | |
| 34 | static void __init rockchip_timer_init(void) |
| 35 | { |
| 36 | if (of_machine_is_compatible("rockchip,rk3288")) { |
| 37 | void __iomem *reg_base; |
| 38 | |
| 39 | /* |
| 40 | * Most/all uboot versions for rk3288 don't enable timer7 |
| 41 | * which is needed for the architected timer to work. |
| 42 | * So make sure it is running during early boot. |
| 43 | */ |
| 44 | reg_base = ioremap(RK3288_TIMER6_7_PHYS, SZ_16K); |
| 45 | if (reg_base) { |
| 46 | writel(0, reg_base + 0x30); |
| 47 | writel(0xffffffff, reg_base + 0x20); |
| 48 | writel(0xffffffff, reg_base + 0x24); |
| 49 | writel(1, reg_base + 0x30); |
| 50 | dsb(); |
| 51 | iounmap(reg_base); |
| 52 | } else { |
| 53 | pr_err("rockchip: could not map timer7 registers\n"); |
| 54 | } |
| 55 | } |
| 56 | |
| 57 | of_clk_init(NULL); |
| 58 | timer_probe(); |
| 59 | } |
| 60 | |
| 61 | static void __init rockchip_dt_init(void) |
| 62 | { |
| 63 | rockchip_suspend_init(); |
| 64 | } |
| 65 | |
| 66 | static const char * const rockchip_board_dt_compat[] = { |
| 67 | "rockchip,rk2928", |
| 68 | "rockchip,rk3066a", |
| 69 | "rockchip,rk3066b", |
| 70 | "rockchip,rk3188", |
| 71 | "rockchip,rk3228", |
| 72 | "rockchip,rk3288", |
| 73 | "rockchip,rv1108", |
| 74 | NULL, |
| 75 | }; |
| 76 | |
| 77 | DT_MACHINE_START(ROCKCHIP_DT, "Rockchip (Device Tree)") |
| 78 | .l2c_aux_val = 0, |
| 79 | .l2c_aux_mask = ~0, |
| 80 | .init_time = rockchip_timer_init, |
| 81 | .dt_compat = rockchip_board_dt_compat, |
| 82 | .init_machine = rockchip_dt_init, |
| 83 | MACHINE_END |