| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2016 - ARM Ltd |
| 3 | * Author: Marc Zyngier <marc.zyngier@arm.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License version 2 as |
| 7 | * published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
| 18 | #include <linux/types.h> |
| 19 | #include <asm/kvm_arm.h> |
| 20 | #include <asm/kvm_asm.h> |
| 21 | #include <asm/kvm_hyp.h> |
| 22 | |
| 23 | u32 __hyp_text __init_stage2_translation(void) |
| 24 | { |
| 25 | u64 val = VTCR_EL2_FLAGS; |
| 26 | u64 parange; |
| 27 | u64 tmp; |
| 28 | |
| 29 | /* |
| 30 | * Read the PARange bits from ID_AA64MMFR0_EL1 and set the PS |
| 31 | * bits in VTCR_EL2. Amusingly, the PARange is 4 bits, while |
| 32 | * PS is only 3. Fortunately, bit 19 is RES0 in VTCR_EL2... |
| 33 | */ |
| 34 | parange = read_sysreg(id_aa64mmfr0_el1) & 7; |
| 35 | if (parange > ID_AA64MMFR0_PARANGE_MAX) |
| 36 | parange = ID_AA64MMFR0_PARANGE_MAX; |
| 37 | val |= parange << 16; |
| 38 | |
| 39 | /* Compute the actual PARange... */ |
| 40 | switch (parange) { |
| 41 | case 0: |
| 42 | parange = 32; |
| 43 | break; |
| 44 | case 1: |
| 45 | parange = 36; |
| 46 | break; |
| 47 | case 2: |
| 48 | parange = 40; |
| 49 | break; |
| 50 | case 3: |
| 51 | parange = 42; |
| 52 | break; |
| 53 | case 4: |
| 54 | parange = 44; |
| 55 | break; |
| 56 | case 5: |
| 57 | default: |
| 58 | parange = 48; |
| 59 | break; |
| 60 | } |
| 61 | |
| 62 | /* |
| 63 | * ... and clamp it to 40 bits, unless we have some braindead |
| 64 | * HW that implements less than that. In all cases, we'll |
| 65 | * return that value for the rest of the kernel to decide what |
| 66 | * to do. |
| 67 | */ |
| 68 | val |= 64 - (parange > 40 ? 40 : parange); |
| 69 | |
| 70 | /* |
| 71 | * Check the availability of Hardware Access Flag / Dirty Bit |
| 72 | * Management in ID_AA64MMFR1_EL1 and enable the feature in VTCR_EL2. |
| 73 | */ |
| 74 | tmp = (read_sysreg(id_aa64mmfr1_el1) >> ID_AA64MMFR1_HADBS_SHIFT) & 0xf; |
| 75 | if (tmp) |
| 76 | val |= VTCR_EL2_HA; |
| 77 | |
| 78 | /* |
| 79 | * Read the VMIDBits bits from ID_AA64MMFR1_EL1 and set the VS |
| 80 | * bit in VTCR_EL2. |
| 81 | */ |
| 82 | tmp = (read_sysreg(id_aa64mmfr1_el1) >> ID_AA64MMFR1_VMIDBITS_SHIFT) & 0xf; |
| 83 | val |= (tmp == ID_AA64MMFR1_VMIDBITS_16) ? |
| 84 | VTCR_EL2_VS_16BIT : |
| 85 | VTCR_EL2_VS_8BIT; |
| 86 | |
| 87 | write_sysreg(val, vtcr_el2); |
| 88 | |
| 89 | return parange; |
| 90 | } |