David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2006 PathScale, Inc. All Rights Reserved. |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef _LINUX_IO_H |
| 7 | #define _LINUX_IO_H |
| 8 | |
| 9 | #include <linux/types.h> |
| 10 | #include <linux/init.h> |
| 11 | #include <linux/bug.h> |
| 12 | #include <linux/err.h> |
| 13 | #include <asm/io.h> |
| 14 | #include <asm/page.h> |
| 15 | |
| 16 | struct device; |
| 17 | struct resource; |
| 18 | |
| 19 | __visible void __iowrite32_copy(void __iomem *to, const void *from, size_t count); |
| 20 | void __ioread32_copy(void *to, const void __iomem *from, size_t count); |
| 21 | void __iowrite64_copy(void __iomem *to, const void *from, size_t count); |
| 22 | |
| 23 | #ifdef CONFIG_MMU |
| 24 | int ioremap_page_range(unsigned long addr, unsigned long end, |
| 25 | phys_addr_t phys_addr, pgprot_t prot); |
| 26 | #else |
| 27 | static inline int ioremap_page_range(unsigned long addr, unsigned long end, |
| 28 | phys_addr_t phys_addr, pgprot_t prot) |
| 29 | { |
| 30 | return 0; |
| 31 | } |
| 32 | #endif |
| 33 | |
| 34 | #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP |
| 35 | void __init ioremap_huge_init(void); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 36 | int arch_ioremap_p4d_supported(void); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 37 | int arch_ioremap_pud_supported(void); |
| 38 | int arch_ioremap_pmd_supported(void); |
| 39 | #else |
| 40 | static inline void ioremap_huge_init(void) { } |
| 41 | #endif |
| 42 | |
| 43 | /* |
| 44 | * Managed iomap interface |
| 45 | */ |
| 46 | #ifdef CONFIG_HAS_IOPORT_MAP |
| 47 | void __iomem * devm_ioport_map(struct device *dev, unsigned long port, |
| 48 | unsigned int nr); |
| 49 | void devm_ioport_unmap(struct device *dev, void __iomem *addr); |
| 50 | #else |
| 51 | static inline void __iomem *devm_ioport_map(struct device *dev, |
| 52 | unsigned long port, |
| 53 | unsigned int nr) |
| 54 | { |
| 55 | return NULL; |
| 56 | } |
| 57 | |
| 58 | static inline void devm_ioport_unmap(struct device *dev, void __iomem *addr) |
| 59 | { |
| 60 | } |
| 61 | #endif |
| 62 | |
| 63 | #define IOMEM_ERR_PTR(err) (__force void __iomem *)ERR_PTR(err) |
| 64 | |
| 65 | void __iomem *devm_ioremap(struct device *dev, resource_size_t offset, |
| 66 | resource_size_t size); |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 67 | void __iomem *devm_ioremap_uc(struct device *dev, resource_size_t offset, |
| 68 | resource_size_t size); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 69 | void __iomem *devm_ioremap_wc(struct device *dev, resource_size_t offset, |
| 70 | resource_size_t size); |
| 71 | void devm_iounmap(struct device *dev, void __iomem *addr); |
| 72 | int check_signature(const volatile void __iomem *io_addr, |
| 73 | const unsigned char *signature, int length); |
| 74 | void devm_ioremap_release(struct device *dev, void *res); |
| 75 | |
| 76 | void *devm_memremap(struct device *dev, resource_size_t offset, |
| 77 | size_t size, unsigned long flags); |
| 78 | void devm_memunmap(struct device *dev, void *addr); |
| 79 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 80 | #ifdef CONFIG_PCI |
| 81 | /* |
| 82 | * The PCI specifications (Rev 3.0, 3.2.5 "Transaction Ordering and |
| 83 | * Posting") mandate non-posted configuration transactions. There is |
| 84 | * no ioremap API in the kernel that can guarantee non-posted write |
| 85 | * semantics across arches so provide a default implementation for |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 86 | * mapping PCI config space that defaults to ioremap(); arches |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 87 | * should override it if they have memory mapping implementations that |
| 88 | * guarantee non-posted writes semantics to make the memory mapping |
| 89 | * compliant with the PCI specification. |
| 90 | */ |
| 91 | #ifndef pci_remap_cfgspace |
| 92 | #define pci_remap_cfgspace pci_remap_cfgspace |
| 93 | static inline void __iomem *pci_remap_cfgspace(phys_addr_t offset, |
| 94 | size_t size) |
| 95 | { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 96 | return ioremap(offset, size); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 97 | } |
| 98 | #endif |
| 99 | #endif |
| 100 | |
| 101 | /* |
| 102 | * Some systems do not have legacy ISA devices. |
| 103 | * /dev/port is not a valid interface on these systems. |
| 104 | * So for those archs, <asm/io.h> should define the following symbol. |
| 105 | */ |
| 106 | #ifndef arch_has_dev_port |
| 107 | #define arch_has_dev_port() (1) |
| 108 | #endif |
| 109 | |
| 110 | /* |
| 111 | * Some systems (x86 without PAT) have a somewhat reliable way to mark a |
| 112 | * physical address range such that uncached mappings will actually |
| 113 | * end up write-combining. This facility should be used in conjunction |
| 114 | * with pgprot_writecombine, ioremap-wc, or set_memory_wc, since it has |
| 115 | * no effect if the per-page mechanisms are functional. |
| 116 | * (On x86 without PAT, these functions manipulate MTRRs.) |
| 117 | * |
| 118 | * arch_phys_del_wc(0) or arch_phys_del_wc(any error code) is guaranteed |
| 119 | * to have no effect. |
| 120 | */ |
| 121 | #ifndef arch_phys_wc_add |
| 122 | static inline int __must_check arch_phys_wc_add(unsigned long base, |
| 123 | unsigned long size) |
| 124 | { |
| 125 | return 0; /* It worked (i.e. did nothing). */ |
| 126 | } |
| 127 | |
| 128 | static inline void arch_phys_wc_del(int handle) |
| 129 | { |
| 130 | } |
| 131 | |
| 132 | #define arch_phys_wc_add arch_phys_wc_add |
| 133 | #ifndef arch_phys_wc_index |
| 134 | static inline int arch_phys_wc_index(int handle) |
| 135 | { |
| 136 | return -1; |
| 137 | } |
| 138 | #define arch_phys_wc_index arch_phys_wc_index |
| 139 | #endif |
| 140 | #endif |
| 141 | |
| 142 | enum { |
| 143 | /* See memremap() kernel-doc for usage description... */ |
| 144 | MEMREMAP_WB = 1 << 0, |
| 145 | MEMREMAP_WT = 1 << 1, |
| 146 | MEMREMAP_WC = 1 << 2, |
| 147 | MEMREMAP_ENC = 1 << 3, |
| 148 | MEMREMAP_DEC = 1 << 4, |
| 149 | }; |
| 150 | |
| 151 | void *memremap(resource_size_t offset, size_t size, unsigned long flags); |
| 152 | void memunmap(void *addr); |
| 153 | |
| 154 | /* |
| 155 | * On x86 PAT systems we have memory tracking that keeps track of |
| 156 | * the allowed mappings on memory ranges. This tracking works for |
| 157 | * all the in-kernel mapping APIs (ioremap*), but where the user |
| 158 | * wishes to map a range from a physical device into user memory |
| 159 | * the tracking won't be updated. This API is to be used by |
| 160 | * drivers which remap physical device pages into userspace, |
| 161 | * and wants to make sure they are mapped WC and not UC. |
| 162 | */ |
| 163 | #ifndef arch_io_reserve_memtype_wc |
| 164 | static inline int arch_io_reserve_memtype_wc(resource_size_t base, |
| 165 | resource_size_t size) |
| 166 | { |
| 167 | return 0; |
| 168 | } |
| 169 | |
| 170 | static inline void arch_io_free_memtype_wc(resource_size_t base, |
| 171 | resource_size_t size) |
| 172 | { |
| 173 | } |
| 174 | #endif |
| 175 | |
| 176 | #endif /* _LINUX_IO_H */ |