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David Brazdil0f672f62019-12-10 10:32:29 +00001/* SPDX-License-Identifier: GPL-2.0-or-later */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002#ifndef _ASM_POWERPC_EXCEPTION_H
3#define _ASM_POWERPC_EXCEPTION_H
4/*
5 * Extracted from head_64.S
6 *
7 * PowerPC version
8 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
9 *
10 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
11 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
12 * Adapted for Power Macintosh by Paul Mackerras.
13 * Low-level exception handlers and MMU support
14 * rewritten by Paul Mackerras.
15 * Copyright (C) 1996 Paul Mackerras.
16 *
17 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
18 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
19 *
20 * This file contains the low-level support and setup for the
21 * PowerPC-64 platform, including trap and interrupt dispatch.
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000022 */
23/*
24 * The following macros define the code that appears as
25 * the prologue to each of the exception handlers. They
26 * are split into two parts to allow a single kernel binary
27 * to be used for pSeries and iSeries.
28 *
29 * We make as much of the exception code common between native
30 * exception handlers (including pSeries LPAR) and iSeries LPAR
31 * implementations as possible.
32 */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000033#include <asm/feature-fixups.h>
34
David Brazdil0f672f62019-12-10 10:32:29 +000035/* PACA save area size in u64 units (exgen, exmc, etc) */
David Brazdil0f672f62019-12-10 10:32:29 +000036#define EX_SIZE 10
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000037
38/*
39 * maximum recursive depth of MCE exceptions
40 */
41#define MAX_MCE_DEPTH 4
42
David Brazdil0f672f62019-12-10 10:32:29 +000043#ifdef __ASSEMBLY__
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000044
45#define STF_ENTRY_BARRIER_SLOT \
46 STF_ENTRY_BARRIER_FIXUP_SECTION; \
47 nop; \
48 nop; \
49 nop
50
51#define STF_EXIT_BARRIER_SLOT \
52 STF_EXIT_BARRIER_FIXUP_SECTION; \
53 nop; \
54 nop; \
55 nop; \
56 nop; \
57 nop; \
58 nop
59
Olivier Deprez0e641232021-09-23 10:07:05 +020060#define ENTRY_FLUSH_SLOT \
61 ENTRY_FLUSH_FIXUP_SECTION; \
62 nop; \
63 nop; \
64 nop;
65
Olivier Deprez157378f2022-04-04 15:47:50 +020066#define SCV_ENTRY_FLUSH_SLOT \
67 SCV_ENTRY_FLUSH_FIXUP_SECTION; \
68 nop; \
69 nop; \
70 nop;
71
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000072/*
73 * r10 must be free to use, r13 must be paca
74 */
75#define INTERRUPT_TO_KERNEL \
Olivier Deprez0e641232021-09-23 10:07:05 +020076 STF_ENTRY_BARRIER_SLOT; \
77 ENTRY_FLUSH_SLOT
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000078
79/*
Olivier Deprez157378f2022-04-04 15:47:50 +020080 * r10, ctr must be free to use, r13 must be paca
81 */
82#define SCV_INTERRUPT_TO_KERNEL \
83 STF_ENTRY_BARRIER_SLOT; \
84 SCV_ENTRY_FLUSH_SLOT
85
86/*
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000087 * Macros for annotating the expected destination of (h)rfid
88 *
89 * The nop instructions allow us to insert one or more instructions to flush the
90 * L1-D cache when returning to userspace or a guest.
Olivier Deprez157378f2022-04-04 15:47:50 +020091 *
92 * powerpc relies on return from interrupt/syscall being context synchronising
93 * (which hrfid, rfid, and rfscv are) to support ARCH_HAS_MEMBARRIER_SYNC_CORE
94 * without additional synchronisation instructions.
95 *
96 * soft-masked interrupt replay does not include a context-synchronising rfid,
97 * but those always return to kernel, the sync is only required when returning
98 * to user.
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000099 */
100#define RFI_FLUSH_SLOT \
101 RFI_FLUSH_FIXUP_SECTION; \
102 nop; \
103 nop; \
104 nop
105
106#define RFI_TO_KERNEL \
107 rfid
108
109#define RFI_TO_USER \
110 STF_EXIT_BARRIER_SLOT; \
111 RFI_FLUSH_SLOT; \
112 rfid; \
113 b rfi_flush_fallback
114
115#define RFI_TO_USER_OR_KERNEL \
116 STF_EXIT_BARRIER_SLOT; \
117 RFI_FLUSH_SLOT; \
118 rfid; \
119 b rfi_flush_fallback
120
121#define RFI_TO_GUEST \
122 STF_EXIT_BARRIER_SLOT; \
123 RFI_FLUSH_SLOT; \
124 rfid; \
125 b rfi_flush_fallback
126
127#define HRFI_TO_KERNEL \
128 hrfid
129
130#define HRFI_TO_USER \
131 STF_EXIT_BARRIER_SLOT; \
132 RFI_FLUSH_SLOT; \
133 hrfid; \
134 b hrfi_flush_fallback
135
136#define HRFI_TO_USER_OR_KERNEL \
137 STF_EXIT_BARRIER_SLOT; \
138 RFI_FLUSH_SLOT; \
139 hrfid; \
140 b hrfi_flush_fallback
141
142#define HRFI_TO_GUEST \
143 STF_EXIT_BARRIER_SLOT; \
144 RFI_FLUSH_SLOT; \
145 hrfid; \
146 b hrfi_flush_fallback
147
148#define HRFI_TO_UNKNOWN \
149 STF_EXIT_BARRIER_SLOT; \
150 RFI_FLUSH_SLOT; \
151 hrfid; \
152 b hrfi_flush_fallback
153
Olivier Deprez157378f2022-04-04 15:47:50 +0200154#define RFSCV_TO_USER \
155 STF_EXIT_BARRIER_SLOT; \
156 RFI_FLUSH_SLOT; \
157 RFSCV; \
158 b rfscv_flush_fallback
159
Olivier Deprez0e641232021-09-23 10:07:05 +0200160#else /* __ASSEMBLY__ */
161/* Prototype for function defined in exceptions-64s.S */
162void do_uaccess_flush(void);
David Brazdil0f672f62019-12-10 10:32:29 +0000163#endif /* __ASSEMBLY__ */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000164
165#endif /* _ASM_POWERPC_EXCEPTION_H */