David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2012-2015 - ARM Ltd |
| 4 | * Author: Marc Zyngier <marc.zyngier@arm.com> |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <clocksource/arm_arch_timer.h> |
| 8 | #include <linux/compiler.h> |
| 9 | #include <linux/kvm_host.h> |
| 10 | |
| 11 | #include <asm/kvm_hyp.h> |
| 12 | |
| 13 | void __hyp_text __kvm_timer_set_cntvoff(u32 cntvoff_low, u32 cntvoff_high) |
| 14 | { |
| 15 | u64 cntvoff = (u64)cntvoff_high << 32 | cntvoff_low; |
| 16 | write_sysreg(cntvoff, cntvoff_el2); |
| 17 | } |
| 18 | |
| 19 | /* |
| 20 | * Should only be called on non-VHE systems. |
| 21 | * VHE systems use EL2 timers and configure EL1 timers in kvm_timer_init_vhe(). |
| 22 | */ |
| 23 | void __hyp_text __timer_disable_traps(struct kvm_vcpu *vcpu) |
| 24 | { |
| 25 | u64 val; |
| 26 | |
| 27 | /* Allow physical timer/counter access for the host */ |
| 28 | val = read_sysreg(cnthctl_el2); |
| 29 | val |= CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN; |
| 30 | write_sysreg(val, cnthctl_el2); |
| 31 | } |
| 32 | |
| 33 | /* |
| 34 | * Should only be called on non-VHE systems. |
| 35 | * VHE systems use EL2 timers and configure EL1 timers in kvm_timer_init_vhe(). |
| 36 | */ |
| 37 | void __hyp_text __timer_enable_traps(struct kvm_vcpu *vcpu) |
| 38 | { |
| 39 | u64 val; |
| 40 | |
| 41 | /* |
| 42 | * Disallow physical timer access for the guest |
| 43 | * Physical counter access is allowed |
| 44 | */ |
| 45 | val = read_sysreg(cnthctl_el2); |
| 46 | val &= ~CNTHCTL_EL1PCEN; |
| 47 | val |= CNTHCTL_EL1PCTEN; |
| 48 | write_sysreg(val, cnthctl_el2); |
| 49 | } |