Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ |
| 2 | /* |
| 3 | * Copyright 2014-2016 Freescale Semiconductor Inc. |
| 4 | * Copyright 2016 NXP |
| 5 | * |
| 6 | */ |
| 7 | #ifndef __FSL_DPAA2_FD_H |
| 8 | #define __FSL_DPAA2_FD_H |
| 9 | |
| 10 | #include <linux/kernel.h> |
| 11 | |
| 12 | /** |
| 13 | * DOC: DPAA2 FD - Frame Descriptor APIs for DPAA2 |
| 14 | * |
| 15 | * Frame Descriptors (FDs) are used to describe frame data in the DPAA2. |
| 16 | * Frames can be enqueued and dequeued to Frame Queues (FQs) which are consumed |
| 17 | * by the various DPAA accelerators (WRIOP, SEC, PME, DCE) |
| 18 | * |
| 19 | * There are three types of frames: single, scatter gather, and frame lists. |
| 20 | * |
| 21 | * The set of APIs in this file must be used to create, manipulate and |
| 22 | * query Frame Descriptors. |
| 23 | */ |
| 24 | |
| 25 | /** |
| 26 | * struct dpaa2_fd - Struct describing FDs |
| 27 | * @words: for easier/faster copying the whole FD structure |
| 28 | * @addr: address in the FD |
| 29 | * @len: length in the FD |
| 30 | * @bpid: buffer pool ID |
| 31 | * @format_offset: format, offset, and short-length fields |
| 32 | * @frc: frame context |
| 33 | * @ctrl: control bits...including dd, sc, va, err, etc |
| 34 | * @flc: flow context address |
| 35 | * |
| 36 | * This structure represents the basic Frame Descriptor used in the system. |
| 37 | */ |
| 38 | struct dpaa2_fd { |
| 39 | union { |
| 40 | u32 words[8]; |
| 41 | struct dpaa2_fd_simple { |
| 42 | __le64 addr; |
| 43 | __le32 len; |
| 44 | __le16 bpid; |
| 45 | __le16 format_offset; |
| 46 | __le32 frc; |
| 47 | __le32 ctrl; |
| 48 | __le64 flc; |
| 49 | } simple; |
| 50 | }; |
| 51 | }; |
| 52 | |
| 53 | #define FD_SHORT_LEN_FLAG_MASK 0x1 |
| 54 | #define FD_SHORT_LEN_FLAG_SHIFT 14 |
| 55 | #define FD_SHORT_LEN_MASK 0x3FFFF |
| 56 | #define FD_OFFSET_MASK 0x0FFF |
| 57 | #define FD_FORMAT_MASK 0x3 |
| 58 | #define FD_FORMAT_SHIFT 12 |
| 59 | #define FD_BPID_MASK 0x3FFF |
| 60 | #define SG_SHORT_LEN_FLAG_MASK 0x1 |
| 61 | #define SG_SHORT_LEN_FLAG_SHIFT 14 |
| 62 | #define SG_SHORT_LEN_MASK 0x1FFFF |
| 63 | #define SG_OFFSET_MASK 0x0FFF |
| 64 | #define SG_FORMAT_MASK 0x3 |
| 65 | #define SG_FORMAT_SHIFT 12 |
| 66 | #define SG_BPID_MASK 0x3FFF |
| 67 | #define SG_FINAL_FLAG_MASK 0x1 |
| 68 | #define SG_FINAL_FLAG_SHIFT 15 |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 69 | #define FL_SHORT_LEN_FLAG_MASK 0x1 |
| 70 | #define FL_SHORT_LEN_FLAG_SHIFT 14 |
| 71 | #define FL_SHORT_LEN_MASK 0x3FFFF |
| 72 | #define FL_OFFSET_MASK 0x0FFF |
| 73 | #define FL_FORMAT_MASK 0x3 |
| 74 | #define FL_FORMAT_SHIFT 12 |
| 75 | #define FL_BPID_MASK 0x3FFF |
| 76 | #define FL_FINAL_FLAG_MASK 0x1 |
| 77 | #define FL_FINAL_FLAG_SHIFT 15 |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 78 | |
| 79 | /* Error bits in FD CTRL */ |
| 80 | #define FD_CTRL_ERR_MASK 0x000000FF |
| 81 | #define FD_CTRL_UFD 0x00000004 |
| 82 | #define FD_CTRL_SBE 0x00000008 |
| 83 | #define FD_CTRL_FLC 0x00000010 |
| 84 | #define FD_CTRL_FSE 0x00000020 |
| 85 | #define FD_CTRL_FAERR 0x00000040 |
| 86 | |
| 87 | /* Annotation bits in FD CTRL */ |
| 88 | #define FD_CTRL_PTA 0x00800000 |
| 89 | #define FD_CTRL_PTV1 0x00400000 |
| 90 | |
| 91 | enum dpaa2_fd_format { |
| 92 | dpaa2_fd_single = 0, |
| 93 | dpaa2_fd_list, |
| 94 | dpaa2_fd_sg |
| 95 | }; |
| 96 | |
| 97 | /** |
| 98 | * dpaa2_fd_get_addr() - get the addr field of frame descriptor |
| 99 | * @fd: the given frame descriptor |
| 100 | * |
| 101 | * Return the address in the frame descriptor. |
| 102 | */ |
| 103 | static inline dma_addr_t dpaa2_fd_get_addr(const struct dpaa2_fd *fd) |
| 104 | { |
| 105 | return (dma_addr_t)le64_to_cpu(fd->simple.addr); |
| 106 | } |
| 107 | |
| 108 | /** |
| 109 | * dpaa2_fd_set_addr() - Set the addr field of frame descriptor |
| 110 | * @fd: the given frame descriptor |
| 111 | * @addr: the address needs to be set in frame descriptor |
| 112 | */ |
| 113 | static inline void dpaa2_fd_set_addr(struct dpaa2_fd *fd, dma_addr_t addr) |
| 114 | { |
| 115 | fd->simple.addr = cpu_to_le64(addr); |
| 116 | } |
| 117 | |
| 118 | /** |
| 119 | * dpaa2_fd_get_frc() - Get the frame context in the frame descriptor |
| 120 | * @fd: the given frame descriptor |
| 121 | * |
| 122 | * Return the frame context field in the frame descriptor. |
| 123 | */ |
| 124 | static inline u32 dpaa2_fd_get_frc(const struct dpaa2_fd *fd) |
| 125 | { |
| 126 | return le32_to_cpu(fd->simple.frc); |
| 127 | } |
| 128 | |
| 129 | /** |
| 130 | * dpaa2_fd_set_frc() - Set the frame context in the frame descriptor |
| 131 | * @fd: the given frame descriptor |
| 132 | * @frc: the frame context needs to be set in frame descriptor |
| 133 | */ |
| 134 | static inline void dpaa2_fd_set_frc(struct dpaa2_fd *fd, u32 frc) |
| 135 | { |
| 136 | fd->simple.frc = cpu_to_le32(frc); |
| 137 | } |
| 138 | |
| 139 | /** |
| 140 | * dpaa2_fd_get_ctrl() - Get the control bits in the frame descriptor |
| 141 | * @fd: the given frame descriptor |
| 142 | * |
| 143 | * Return the control bits field in the frame descriptor. |
| 144 | */ |
| 145 | static inline u32 dpaa2_fd_get_ctrl(const struct dpaa2_fd *fd) |
| 146 | { |
| 147 | return le32_to_cpu(fd->simple.ctrl); |
| 148 | } |
| 149 | |
| 150 | /** |
| 151 | * dpaa2_fd_set_ctrl() - Set the control bits in the frame descriptor |
| 152 | * @fd: the given frame descriptor |
| 153 | * @ctrl: the control bits to be set in the frame descriptor |
| 154 | */ |
| 155 | static inline void dpaa2_fd_set_ctrl(struct dpaa2_fd *fd, u32 ctrl) |
| 156 | { |
| 157 | fd->simple.ctrl = cpu_to_le32(ctrl); |
| 158 | } |
| 159 | |
| 160 | /** |
| 161 | * dpaa2_fd_get_flc() - Get the flow context in the frame descriptor |
| 162 | * @fd: the given frame descriptor |
| 163 | * |
| 164 | * Return the flow context in the frame descriptor. |
| 165 | */ |
| 166 | static inline dma_addr_t dpaa2_fd_get_flc(const struct dpaa2_fd *fd) |
| 167 | { |
| 168 | return (dma_addr_t)le64_to_cpu(fd->simple.flc); |
| 169 | } |
| 170 | |
| 171 | /** |
| 172 | * dpaa2_fd_set_flc() - Set the flow context field of frame descriptor |
| 173 | * @fd: the given frame descriptor |
| 174 | * @flc_addr: the flow context needs to be set in frame descriptor |
| 175 | */ |
| 176 | static inline void dpaa2_fd_set_flc(struct dpaa2_fd *fd, dma_addr_t flc_addr) |
| 177 | { |
| 178 | fd->simple.flc = cpu_to_le64(flc_addr); |
| 179 | } |
| 180 | |
| 181 | static inline bool dpaa2_fd_short_len(const struct dpaa2_fd *fd) |
| 182 | { |
| 183 | return !!((le16_to_cpu(fd->simple.format_offset) >> |
| 184 | FD_SHORT_LEN_FLAG_SHIFT) & FD_SHORT_LEN_FLAG_MASK); |
| 185 | } |
| 186 | |
| 187 | /** |
| 188 | * dpaa2_fd_get_len() - Get the length in the frame descriptor |
| 189 | * @fd: the given frame descriptor |
| 190 | * |
| 191 | * Return the length field in the frame descriptor. |
| 192 | */ |
| 193 | static inline u32 dpaa2_fd_get_len(const struct dpaa2_fd *fd) |
| 194 | { |
| 195 | if (dpaa2_fd_short_len(fd)) |
| 196 | return le32_to_cpu(fd->simple.len) & FD_SHORT_LEN_MASK; |
| 197 | |
| 198 | return le32_to_cpu(fd->simple.len); |
| 199 | } |
| 200 | |
| 201 | /** |
| 202 | * dpaa2_fd_set_len() - Set the length field of frame descriptor |
| 203 | * @fd: the given frame descriptor |
| 204 | * @len: the length needs to be set in frame descriptor |
| 205 | */ |
| 206 | static inline void dpaa2_fd_set_len(struct dpaa2_fd *fd, u32 len) |
| 207 | { |
| 208 | fd->simple.len = cpu_to_le32(len); |
| 209 | } |
| 210 | |
| 211 | /** |
| 212 | * dpaa2_fd_get_offset() - Get the offset field in the frame descriptor |
| 213 | * @fd: the given frame descriptor |
| 214 | * |
| 215 | * Return the offset. |
| 216 | */ |
| 217 | static inline uint16_t dpaa2_fd_get_offset(const struct dpaa2_fd *fd) |
| 218 | { |
| 219 | return le16_to_cpu(fd->simple.format_offset) & FD_OFFSET_MASK; |
| 220 | } |
| 221 | |
| 222 | /** |
| 223 | * dpaa2_fd_set_offset() - Set the offset field of frame descriptor |
| 224 | * @fd: the given frame descriptor |
| 225 | * @offset: the offset needs to be set in frame descriptor |
| 226 | */ |
| 227 | static inline void dpaa2_fd_set_offset(struct dpaa2_fd *fd, uint16_t offset) |
| 228 | { |
| 229 | fd->simple.format_offset &= cpu_to_le16(~FD_OFFSET_MASK); |
| 230 | fd->simple.format_offset |= cpu_to_le16(offset); |
| 231 | } |
| 232 | |
| 233 | /** |
| 234 | * dpaa2_fd_get_format() - Get the format field in the frame descriptor |
| 235 | * @fd: the given frame descriptor |
| 236 | * |
| 237 | * Return the format. |
| 238 | */ |
| 239 | static inline enum dpaa2_fd_format dpaa2_fd_get_format( |
| 240 | const struct dpaa2_fd *fd) |
| 241 | { |
| 242 | return (enum dpaa2_fd_format)((le16_to_cpu(fd->simple.format_offset) |
| 243 | >> FD_FORMAT_SHIFT) & FD_FORMAT_MASK); |
| 244 | } |
| 245 | |
| 246 | /** |
| 247 | * dpaa2_fd_set_format() - Set the format field of frame descriptor |
| 248 | * @fd: the given frame descriptor |
| 249 | * @format: the format needs to be set in frame descriptor |
| 250 | */ |
| 251 | static inline void dpaa2_fd_set_format(struct dpaa2_fd *fd, |
| 252 | enum dpaa2_fd_format format) |
| 253 | { |
| 254 | fd->simple.format_offset &= |
| 255 | cpu_to_le16(~(FD_FORMAT_MASK << FD_FORMAT_SHIFT)); |
| 256 | fd->simple.format_offset |= cpu_to_le16(format << FD_FORMAT_SHIFT); |
| 257 | } |
| 258 | |
| 259 | /** |
| 260 | * dpaa2_fd_get_bpid() - Get the bpid field in the frame descriptor |
| 261 | * @fd: the given frame descriptor |
| 262 | * |
| 263 | * Return the buffer pool id. |
| 264 | */ |
| 265 | static inline uint16_t dpaa2_fd_get_bpid(const struct dpaa2_fd *fd) |
| 266 | { |
| 267 | return le16_to_cpu(fd->simple.bpid) & FD_BPID_MASK; |
| 268 | } |
| 269 | |
| 270 | /** |
| 271 | * dpaa2_fd_set_bpid() - Set the bpid field of frame descriptor |
| 272 | * @fd: the given frame descriptor |
| 273 | * @bpid: buffer pool id to be set |
| 274 | */ |
| 275 | static inline void dpaa2_fd_set_bpid(struct dpaa2_fd *fd, uint16_t bpid) |
| 276 | { |
| 277 | fd->simple.bpid &= cpu_to_le16(~(FD_BPID_MASK)); |
| 278 | fd->simple.bpid |= cpu_to_le16(bpid); |
| 279 | } |
| 280 | |
| 281 | /** |
| 282 | * struct dpaa2_sg_entry - the scatter-gathering structure |
| 283 | * @addr: address of the sg entry |
| 284 | * @len: length in this sg entry |
| 285 | * @bpid: buffer pool id |
| 286 | * @format_offset: format and offset fields |
| 287 | */ |
| 288 | struct dpaa2_sg_entry { |
| 289 | __le64 addr; |
| 290 | __le32 len; |
| 291 | __le16 bpid; |
| 292 | __le16 format_offset; |
| 293 | }; |
| 294 | |
| 295 | enum dpaa2_sg_format { |
| 296 | dpaa2_sg_single = 0, |
| 297 | dpaa2_sg_frame_data, |
| 298 | dpaa2_sg_sgt_ext |
| 299 | }; |
| 300 | |
| 301 | /* Accessors for SG entry fields */ |
| 302 | |
| 303 | /** |
| 304 | * dpaa2_sg_get_addr() - Get the address from SG entry |
| 305 | * @sg: the given scatter-gathering object |
| 306 | * |
| 307 | * Return the address. |
| 308 | */ |
| 309 | static inline dma_addr_t dpaa2_sg_get_addr(const struct dpaa2_sg_entry *sg) |
| 310 | { |
| 311 | return (dma_addr_t)le64_to_cpu(sg->addr); |
| 312 | } |
| 313 | |
| 314 | /** |
| 315 | * dpaa2_sg_set_addr() - Set the address in SG entry |
| 316 | * @sg: the given scatter-gathering object |
| 317 | * @addr: the address to be set |
| 318 | */ |
| 319 | static inline void dpaa2_sg_set_addr(struct dpaa2_sg_entry *sg, dma_addr_t addr) |
| 320 | { |
| 321 | sg->addr = cpu_to_le64(addr); |
| 322 | } |
| 323 | |
| 324 | static inline bool dpaa2_sg_short_len(const struct dpaa2_sg_entry *sg) |
| 325 | { |
| 326 | return !!((le16_to_cpu(sg->format_offset) >> SG_SHORT_LEN_FLAG_SHIFT) |
| 327 | & SG_SHORT_LEN_FLAG_MASK); |
| 328 | } |
| 329 | |
| 330 | /** |
| 331 | * dpaa2_sg_get_len() - Get the length in SG entry |
| 332 | * @sg: the given scatter-gathering object |
| 333 | * |
| 334 | * Return the length. |
| 335 | */ |
| 336 | static inline u32 dpaa2_sg_get_len(const struct dpaa2_sg_entry *sg) |
| 337 | { |
| 338 | if (dpaa2_sg_short_len(sg)) |
| 339 | return le32_to_cpu(sg->len) & SG_SHORT_LEN_MASK; |
| 340 | |
| 341 | return le32_to_cpu(sg->len); |
| 342 | } |
| 343 | |
| 344 | /** |
| 345 | * dpaa2_sg_set_len() - Set the length in SG entry |
| 346 | * @sg: the given scatter-gathering object |
| 347 | * @len: the length to be set |
| 348 | */ |
| 349 | static inline void dpaa2_sg_set_len(struct dpaa2_sg_entry *sg, u32 len) |
| 350 | { |
| 351 | sg->len = cpu_to_le32(len); |
| 352 | } |
| 353 | |
| 354 | /** |
| 355 | * dpaa2_sg_get_offset() - Get the offset in SG entry |
| 356 | * @sg: the given scatter-gathering object |
| 357 | * |
| 358 | * Return the offset. |
| 359 | */ |
| 360 | static inline u16 dpaa2_sg_get_offset(const struct dpaa2_sg_entry *sg) |
| 361 | { |
| 362 | return le16_to_cpu(sg->format_offset) & SG_OFFSET_MASK; |
| 363 | } |
| 364 | |
| 365 | /** |
| 366 | * dpaa2_sg_set_offset() - Set the offset in SG entry |
| 367 | * @sg: the given scatter-gathering object |
| 368 | * @offset: the offset to be set |
| 369 | */ |
| 370 | static inline void dpaa2_sg_set_offset(struct dpaa2_sg_entry *sg, |
| 371 | u16 offset) |
| 372 | { |
| 373 | sg->format_offset &= cpu_to_le16(~SG_OFFSET_MASK); |
| 374 | sg->format_offset |= cpu_to_le16(offset); |
| 375 | } |
| 376 | |
| 377 | /** |
| 378 | * dpaa2_sg_get_format() - Get the SG format in SG entry |
| 379 | * @sg: the given scatter-gathering object |
| 380 | * |
| 381 | * Return the format. |
| 382 | */ |
| 383 | static inline enum dpaa2_sg_format |
| 384 | dpaa2_sg_get_format(const struct dpaa2_sg_entry *sg) |
| 385 | { |
| 386 | return (enum dpaa2_sg_format)((le16_to_cpu(sg->format_offset) |
| 387 | >> SG_FORMAT_SHIFT) & SG_FORMAT_MASK); |
| 388 | } |
| 389 | |
| 390 | /** |
| 391 | * dpaa2_sg_set_format() - Set the SG format in SG entry |
| 392 | * @sg: the given scatter-gathering object |
| 393 | * @format: the format to be set |
| 394 | */ |
| 395 | static inline void dpaa2_sg_set_format(struct dpaa2_sg_entry *sg, |
| 396 | enum dpaa2_sg_format format) |
| 397 | { |
| 398 | sg->format_offset &= cpu_to_le16(~(SG_FORMAT_MASK << SG_FORMAT_SHIFT)); |
| 399 | sg->format_offset |= cpu_to_le16(format << SG_FORMAT_SHIFT); |
| 400 | } |
| 401 | |
| 402 | /** |
| 403 | * dpaa2_sg_get_bpid() - Get the buffer pool id in SG entry |
| 404 | * @sg: the given scatter-gathering object |
| 405 | * |
| 406 | * Return the bpid. |
| 407 | */ |
| 408 | static inline u16 dpaa2_sg_get_bpid(const struct dpaa2_sg_entry *sg) |
| 409 | { |
| 410 | return le16_to_cpu(sg->bpid) & SG_BPID_MASK; |
| 411 | } |
| 412 | |
| 413 | /** |
| 414 | * dpaa2_sg_set_bpid() - Set the buffer pool id in SG entry |
| 415 | * @sg: the given scatter-gathering object |
| 416 | * @bpid: the bpid to be set |
| 417 | */ |
| 418 | static inline void dpaa2_sg_set_bpid(struct dpaa2_sg_entry *sg, u16 bpid) |
| 419 | { |
| 420 | sg->bpid &= cpu_to_le16(~(SG_BPID_MASK)); |
| 421 | sg->bpid |= cpu_to_le16(bpid); |
| 422 | } |
| 423 | |
| 424 | /** |
| 425 | * dpaa2_sg_is_final() - Check final bit in SG entry |
| 426 | * @sg: the given scatter-gathering object |
| 427 | * |
| 428 | * Return bool. |
| 429 | */ |
| 430 | static inline bool dpaa2_sg_is_final(const struct dpaa2_sg_entry *sg) |
| 431 | { |
| 432 | return !!(le16_to_cpu(sg->format_offset) >> SG_FINAL_FLAG_SHIFT); |
| 433 | } |
| 434 | |
| 435 | /** |
| 436 | * dpaa2_sg_set_final() - Set the final bit in SG entry |
| 437 | * @sg: the given scatter-gathering object |
| 438 | * @final: the final boolean to be set |
| 439 | */ |
| 440 | static inline void dpaa2_sg_set_final(struct dpaa2_sg_entry *sg, bool final) |
| 441 | { |
| 442 | sg->format_offset &= cpu_to_le16((~(SG_FINAL_FLAG_MASK |
| 443 | << SG_FINAL_FLAG_SHIFT)) & 0xFFFF); |
| 444 | sg->format_offset |= cpu_to_le16(final << SG_FINAL_FLAG_SHIFT); |
| 445 | } |
| 446 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 447 | /** |
| 448 | * struct dpaa2_fl_entry - structure for frame list entry. |
| 449 | * @addr: address in the FLE |
| 450 | * @len: length in the FLE |
| 451 | * @bpid: buffer pool ID |
| 452 | * @format_offset: format, offset, and short-length fields |
| 453 | * @frc: frame context |
| 454 | * @ctrl: control bits...including pta, pvt1, pvt2, err, etc |
| 455 | * @flc: flow context address |
| 456 | */ |
| 457 | struct dpaa2_fl_entry { |
| 458 | __le64 addr; |
| 459 | __le32 len; |
| 460 | __le16 bpid; |
| 461 | __le16 format_offset; |
| 462 | __le32 frc; |
| 463 | __le32 ctrl; |
| 464 | __le64 flc; |
| 465 | }; |
| 466 | |
| 467 | enum dpaa2_fl_format { |
| 468 | dpaa2_fl_single = 0, |
| 469 | dpaa2_fl_res, |
| 470 | dpaa2_fl_sg |
| 471 | }; |
| 472 | |
| 473 | /** |
| 474 | * dpaa2_fl_get_addr() - get the addr field of FLE |
| 475 | * @fle: the given frame list entry |
| 476 | * |
| 477 | * Return the address in the frame list entry. |
| 478 | */ |
| 479 | static inline dma_addr_t dpaa2_fl_get_addr(const struct dpaa2_fl_entry *fle) |
| 480 | { |
| 481 | return (dma_addr_t)le64_to_cpu(fle->addr); |
| 482 | } |
| 483 | |
| 484 | /** |
| 485 | * dpaa2_fl_set_addr() - Set the addr field of FLE |
| 486 | * @fle: the given frame list entry |
| 487 | * @addr: the address needs to be set in frame list entry |
| 488 | */ |
| 489 | static inline void dpaa2_fl_set_addr(struct dpaa2_fl_entry *fle, |
| 490 | dma_addr_t addr) |
| 491 | { |
| 492 | fle->addr = cpu_to_le64(addr); |
| 493 | } |
| 494 | |
| 495 | /** |
| 496 | * dpaa2_fl_get_frc() - Get the frame context in the FLE |
| 497 | * @fle: the given frame list entry |
| 498 | * |
| 499 | * Return the frame context field in the frame lsit entry. |
| 500 | */ |
| 501 | static inline u32 dpaa2_fl_get_frc(const struct dpaa2_fl_entry *fle) |
| 502 | { |
| 503 | return le32_to_cpu(fle->frc); |
| 504 | } |
| 505 | |
| 506 | /** |
| 507 | * dpaa2_fl_set_frc() - Set the frame context in the FLE |
| 508 | * @fle: the given frame list entry |
| 509 | * @frc: the frame context needs to be set in frame list entry |
| 510 | */ |
| 511 | static inline void dpaa2_fl_set_frc(struct dpaa2_fl_entry *fle, u32 frc) |
| 512 | { |
| 513 | fle->frc = cpu_to_le32(frc); |
| 514 | } |
| 515 | |
| 516 | /** |
| 517 | * dpaa2_fl_get_ctrl() - Get the control bits in the FLE |
| 518 | * @fle: the given frame list entry |
| 519 | * |
| 520 | * Return the control bits field in the frame list entry. |
| 521 | */ |
| 522 | static inline u32 dpaa2_fl_get_ctrl(const struct dpaa2_fl_entry *fle) |
| 523 | { |
| 524 | return le32_to_cpu(fle->ctrl); |
| 525 | } |
| 526 | |
| 527 | /** |
| 528 | * dpaa2_fl_set_ctrl() - Set the control bits in the FLE |
| 529 | * @fle: the given frame list entry |
| 530 | * @ctrl: the control bits to be set in the frame list entry |
| 531 | */ |
| 532 | static inline void dpaa2_fl_set_ctrl(struct dpaa2_fl_entry *fle, u32 ctrl) |
| 533 | { |
| 534 | fle->ctrl = cpu_to_le32(ctrl); |
| 535 | } |
| 536 | |
| 537 | /** |
| 538 | * dpaa2_fl_get_flc() - Get the flow context in the FLE |
| 539 | * @fle: the given frame list entry |
| 540 | * |
| 541 | * Return the flow context in the frame list entry. |
| 542 | */ |
| 543 | static inline dma_addr_t dpaa2_fl_get_flc(const struct dpaa2_fl_entry *fle) |
| 544 | { |
| 545 | return (dma_addr_t)le64_to_cpu(fle->flc); |
| 546 | } |
| 547 | |
| 548 | /** |
| 549 | * dpaa2_fl_set_flc() - Set the flow context field of FLE |
| 550 | * @fle: the given frame list entry |
| 551 | * @flc_addr: the flow context needs to be set in frame list entry |
| 552 | */ |
| 553 | static inline void dpaa2_fl_set_flc(struct dpaa2_fl_entry *fle, |
| 554 | dma_addr_t flc_addr) |
| 555 | { |
| 556 | fle->flc = cpu_to_le64(flc_addr); |
| 557 | } |
| 558 | |
| 559 | static inline bool dpaa2_fl_short_len(const struct dpaa2_fl_entry *fle) |
| 560 | { |
| 561 | return !!((le16_to_cpu(fle->format_offset) >> |
| 562 | FL_SHORT_LEN_FLAG_SHIFT) & FL_SHORT_LEN_FLAG_MASK); |
| 563 | } |
| 564 | |
| 565 | /** |
| 566 | * dpaa2_fl_get_len() - Get the length in the FLE |
| 567 | * @fle: the given frame list entry |
| 568 | * |
| 569 | * Return the length field in the frame list entry. |
| 570 | */ |
| 571 | static inline u32 dpaa2_fl_get_len(const struct dpaa2_fl_entry *fle) |
| 572 | { |
| 573 | if (dpaa2_fl_short_len(fle)) |
| 574 | return le32_to_cpu(fle->len) & FL_SHORT_LEN_MASK; |
| 575 | |
| 576 | return le32_to_cpu(fle->len); |
| 577 | } |
| 578 | |
| 579 | /** |
| 580 | * dpaa2_fl_set_len() - Set the length field of FLE |
| 581 | * @fle: the given frame list entry |
| 582 | * @len: the length needs to be set in frame list entry |
| 583 | */ |
| 584 | static inline void dpaa2_fl_set_len(struct dpaa2_fl_entry *fle, u32 len) |
| 585 | { |
| 586 | fle->len = cpu_to_le32(len); |
| 587 | } |
| 588 | |
| 589 | /** |
| 590 | * dpaa2_fl_get_offset() - Get the offset field in the frame list entry |
| 591 | * @fle: the given frame list entry |
| 592 | * |
| 593 | * Return the offset. |
| 594 | */ |
| 595 | static inline u16 dpaa2_fl_get_offset(const struct dpaa2_fl_entry *fle) |
| 596 | { |
| 597 | return le16_to_cpu(fle->format_offset) & FL_OFFSET_MASK; |
| 598 | } |
| 599 | |
| 600 | /** |
| 601 | * dpaa2_fl_set_offset() - Set the offset field of FLE |
| 602 | * @fle: the given frame list entry |
| 603 | * @offset: the offset needs to be set in frame list entry |
| 604 | */ |
| 605 | static inline void dpaa2_fl_set_offset(struct dpaa2_fl_entry *fle, u16 offset) |
| 606 | { |
| 607 | fle->format_offset &= cpu_to_le16(~FL_OFFSET_MASK); |
| 608 | fle->format_offset |= cpu_to_le16(offset); |
| 609 | } |
| 610 | |
| 611 | /** |
| 612 | * dpaa2_fl_get_format() - Get the format field in the FLE |
| 613 | * @fle: the given frame list entry |
| 614 | * |
| 615 | * Return the format. |
| 616 | */ |
| 617 | static inline enum dpaa2_fl_format dpaa2_fl_get_format(const struct dpaa2_fl_entry *fle) |
| 618 | { |
| 619 | return (enum dpaa2_fl_format)((le16_to_cpu(fle->format_offset) >> |
| 620 | FL_FORMAT_SHIFT) & FL_FORMAT_MASK); |
| 621 | } |
| 622 | |
| 623 | /** |
| 624 | * dpaa2_fl_set_format() - Set the format field of FLE |
| 625 | * @fle: the given frame list entry |
| 626 | * @format: the format needs to be set in frame list entry |
| 627 | */ |
| 628 | static inline void dpaa2_fl_set_format(struct dpaa2_fl_entry *fle, |
| 629 | enum dpaa2_fl_format format) |
| 630 | { |
| 631 | fle->format_offset &= cpu_to_le16(~(FL_FORMAT_MASK << FL_FORMAT_SHIFT)); |
| 632 | fle->format_offset |= cpu_to_le16(format << FL_FORMAT_SHIFT); |
| 633 | } |
| 634 | |
| 635 | /** |
| 636 | * dpaa2_fl_get_bpid() - Get the bpid field in the FLE |
| 637 | * @fle: the given frame list entry |
| 638 | * |
| 639 | * Return the buffer pool id. |
| 640 | */ |
| 641 | static inline u16 dpaa2_fl_get_bpid(const struct dpaa2_fl_entry *fle) |
| 642 | { |
| 643 | return le16_to_cpu(fle->bpid) & FL_BPID_MASK; |
| 644 | } |
| 645 | |
| 646 | /** |
| 647 | * dpaa2_fl_set_bpid() - Set the bpid field of FLE |
| 648 | * @fle: the given frame list entry |
| 649 | * @bpid: buffer pool id to be set |
| 650 | */ |
| 651 | static inline void dpaa2_fl_set_bpid(struct dpaa2_fl_entry *fle, u16 bpid) |
| 652 | { |
| 653 | fle->bpid &= cpu_to_le16(~(FL_BPID_MASK)); |
| 654 | fle->bpid |= cpu_to_le16(bpid); |
| 655 | } |
| 656 | |
| 657 | /** |
| 658 | * dpaa2_fl_is_final() - Check final bit in FLE |
| 659 | * @fle: the given frame list entry |
| 660 | * |
| 661 | * Return bool. |
| 662 | */ |
| 663 | static inline bool dpaa2_fl_is_final(const struct dpaa2_fl_entry *fle) |
| 664 | { |
| 665 | return !!(le16_to_cpu(fle->format_offset) >> FL_FINAL_FLAG_SHIFT); |
| 666 | } |
| 667 | |
| 668 | /** |
| 669 | * dpaa2_fl_set_final() - Set the final bit in FLE |
| 670 | * @fle: the given frame list entry |
| 671 | * @final: the final boolean to be set |
| 672 | */ |
| 673 | static inline void dpaa2_fl_set_final(struct dpaa2_fl_entry *fle, bool final) |
| 674 | { |
| 675 | fle->format_offset &= cpu_to_le16((~(FL_FINAL_FLAG_MASK << |
| 676 | FL_FINAL_FLAG_SHIFT)) & 0xFFFF); |
| 677 | fle->format_offset |= cpu_to_le16(final << FL_FINAL_FLAG_SHIFT); |
| 678 | } |
| 679 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 680 | #endif /* __FSL_DPAA2_FD_H */ |