David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved. |
| 4 | * Copyright (c) 2017-2019, Linaro Ltd. |
| 5 | */ |
| 6 | |
| 7 | #include <linux/debugfs.h> |
| 8 | #include <linux/err.h> |
| 9 | #include <linux/module.h> |
| 10 | #include <linux/platform_device.h> |
| 11 | #include <linux/random.h> |
| 12 | #include <linux/slab.h> |
| 13 | #include <linux/soc/qcom/smem.h> |
| 14 | #include <linux/string.h> |
| 15 | #include <linux/sys_soc.h> |
| 16 | #include <linux/types.h> |
| 17 | |
| 18 | /* |
| 19 | * SoC version type with major number in the upper 16 bits and minor |
| 20 | * number in the lower 16 bits. |
| 21 | */ |
| 22 | #define SOCINFO_MAJOR(ver) (((ver) >> 16) & 0xffff) |
| 23 | #define SOCINFO_MINOR(ver) ((ver) & 0xffff) |
| 24 | #define SOCINFO_VERSION(maj, min) ((((maj) & 0xffff) << 16)|((min) & 0xffff)) |
| 25 | |
| 26 | #define SMEM_SOCINFO_BUILD_ID_LENGTH 32 |
| 27 | |
| 28 | /* |
| 29 | * SMEM item id, used to acquire handles to respective |
| 30 | * SMEM region. |
| 31 | */ |
| 32 | #define SMEM_HW_SW_BUILD_ID 137 |
| 33 | |
| 34 | #ifdef CONFIG_DEBUG_FS |
| 35 | #define SMEM_IMAGE_VERSION_BLOCKS_COUNT 32 |
| 36 | #define SMEM_IMAGE_VERSION_SIZE 4096 |
| 37 | #define SMEM_IMAGE_VERSION_NAME_SIZE 75 |
| 38 | #define SMEM_IMAGE_VERSION_VARIANT_SIZE 20 |
| 39 | #define SMEM_IMAGE_VERSION_OEM_SIZE 32 |
| 40 | |
| 41 | /* |
| 42 | * SMEM Image table indices |
| 43 | */ |
| 44 | #define SMEM_IMAGE_TABLE_BOOT_INDEX 0 |
| 45 | #define SMEM_IMAGE_TABLE_TZ_INDEX 1 |
| 46 | #define SMEM_IMAGE_TABLE_RPM_INDEX 3 |
| 47 | #define SMEM_IMAGE_TABLE_APPS_INDEX 10 |
| 48 | #define SMEM_IMAGE_TABLE_MPSS_INDEX 11 |
| 49 | #define SMEM_IMAGE_TABLE_ADSP_INDEX 12 |
| 50 | #define SMEM_IMAGE_TABLE_CNSS_INDEX 13 |
| 51 | #define SMEM_IMAGE_TABLE_VIDEO_INDEX 14 |
| 52 | #define SMEM_IMAGE_VERSION_TABLE 469 |
| 53 | |
| 54 | /* |
| 55 | * SMEM Image table names |
| 56 | */ |
| 57 | static const char *const socinfo_image_names[] = { |
| 58 | [SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp", |
| 59 | [SMEM_IMAGE_TABLE_APPS_INDEX] = "apps", |
| 60 | [SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot", |
| 61 | [SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss", |
| 62 | [SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss", |
| 63 | [SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm", |
| 64 | [SMEM_IMAGE_TABLE_TZ_INDEX] = "tz", |
| 65 | [SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video", |
| 66 | }; |
| 67 | |
| 68 | static const char *const pmic_models[] = { |
| 69 | [0] = "Unknown PMIC model", |
| 70 | [9] = "PM8994", |
| 71 | [11] = "PM8916", |
| 72 | [13] = "PM8058", |
| 73 | [14] = "PM8028", |
| 74 | [15] = "PM8901", |
| 75 | [16] = "PM8027", |
| 76 | [17] = "ISL9519", |
| 77 | [18] = "PM8921", |
| 78 | [19] = "PM8018", |
| 79 | [20] = "PM8015", |
| 80 | [21] = "PM8014", |
| 81 | [22] = "PM8821", |
| 82 | [23] = "PM8038", |
| 83 | [24] = "PM8922", |
| 84 | [25] = "PM8917", |
| 85 | }; |
| 86 | #endif /* CONFIG_DEBUG_FS */ |
| 87 | |
| 88 | /* Socinfo SMEM item structure */ |
| 89 | struct socinfo { |
| 90 | __le32 fmt; |
| 91 | __le32 id; |
| 92 | __le32 ver; |
| 93 | char build_id[SMEM_SOCINFO_BUILD_ID_LENGTH]; |
| 94 | /* Version 2 */ |
| 95 | __le32 raw_id; |
| 96 | __le32 raw_ver; |
| 97 | /* Version 3 */ |
| 98 | __le32 hw_plat; |
| 99 | /* Version 4 */ |
| 100 | __le32 plat_ver; |
| 101 | /* Version 5 */ |
| 102 | __le32 accessory_chip; |
| 103 | /* Version 6 */ |
| 104 | __le32 hw_plat_subtype; |
| 105 | /* Version 7 */ |
| 106 | __le32 pmic_model; |
| 107 | __le32 pmic_die_rev; |
| 108 | /* Version 8 */ |
| 109 | __le32 pmic_model_1; |
| 110 | __le32 pmic_die_rev_1; |
| 111 | __le32 pmic_model_2; |
| 112 | __le32 pmic_die_rev_2; |
| 113 | /* Version 9 */ |
| 114 | __le32 foundry_id; |
| 115 | /* Version 10 */ |
| 116 | __le32 serial_num; |
| 117 | /* Version 11 */ |
| 118 | __le32 num_pmics; |
| 119 | __le32 pmic_array_offset; |
| 120 | /* Version 12 */ |
| 121 | __le32 chip_family; |
| 122 | __le32 raw_device_family; |
| 123 | __le32 raw_device_num; |
| 124 | }; |
| 125 | |
| 126 | #ifdef CONFIG_DEBUG_FS |
| 127 | struct socinfo_params { |
| 128 | u32 raw_device_family; |
| 129 | u32 hw_plat_subtype; |
| 130 | u32 accessory_chip; |
| 131 | u32 raw_device_num; |
| 132 | u32 chip_family; |
| 133 | u32 foundry_id; |
| 134 | u32 plat_ver; |
| 135 | u32 raw_ver; |
| 136 | u32 hw_plat; |
| 137 | u32 fmt; |
| 138 | }; |
| 139 | |
| 140 | struct smem_image_version { |
| 141 | char name[SMEM_IMAGE_VERSION_NAME_SIZE]; |
| 142 | char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE]; |
| 143 | char pad; |
| 144 | char oem[SMEM_IMAGE_VERSION_OEM_SIZE]; |
| 145 | }; |
| 146 | #endif /* CONFIG_DEBUG_FS */ |
| 147 | |
| 148 | struct qcom_socinfo { |
| 149 | struct soc_device *soc_dev; |
| 150 | struct soc_device_attribute attr; |
| 151 | #ifdef CONFIG_DEBUG_FS |
| 152 | struct dentry *dbg_root; |
| 153 | struct socinfo_params info; |
| 154 | #endif /* CONFIG_DEBUG_FS */ |
| 155 | }; |
| 156 | |
| 157 | struct soc_id { |
| 158 | unsigned int id; |
| 159 | const char *name; |
| 160 | }; |
| 161 | |
| 162 | static const struct soc_id soc_id[] = { |
| 163 | { 87, "MSM8960" }, |
| 164 | { 109, "APQ8064" }, |
| 165 | { 122, "MSM8660A" }, |
| 166 | { 123, "MSM8260A" }, |
| 167 | { 124, "APQ8060A" }, |
| 168 | { 126, "MSM8974" }, |
| 169 | { 130, "MPQ8064" }, |
| 170 | { 138, "MSM8960AB" }, |
| 171 | { 139, "APQ8060AB" }, |
| 172 | { 140, "MSM8260AB" }, |
| 173 | { 141, "MSM8660AB" }, |
| 174 | { 178, "APQ8084" }, |
| 175 | { 184, "APQ8074" }, |
| 176 | { 185, "MSM8274" }, |
| 177 | { 186, "MSM8674" }, |
| 178 | { 194, "MSM8974PRO" }, |
| 179 | { 206, "MSM8916" }, |
| 180 | { 208, "APQ8074-AA" }, |
| 181 | { 209, "APQ8074-AB" }, |
| 182 | { 210, "APQ8074PRO" }, |
| 183 | { 211, "MSM8274-AA" }, |
| 184 | { 212, "MSM8274-AB" }, |
| 185 | { 213, "MSM8274PRO" }, |
| 186 | { 214, "MSM8674-AA" }, |
| 187 | { 215, "MSM8674-AB" }, |
| 188 | { 216, "MSM8674PRO" }, |
| 189 | { 217, "MSM8974-AA" }, |
| 190 | { 218, "MSM8974-AB" }, |
| 191 | { 246, "MSM8996" }, |
| 192 | { 247, "APQ8016" }, |
| 193 | { 248, "MSM8216" }, |
| 194 | { 249, "MSM8116" }, |
| 195 | { 250, "MSM8616" }, |
| 196 | { 291, "APQ8096" }, |
| 197 | { 305, "MSM8996SG" }, |
| 198 | { 310, "MSM8996AU" }, |
| 199 | { 311, "APQ8096AU" }, |
| 200 | { 312, "APQ8096SG" }, |
| 201 | }; |
| 202 | |
| 203 | static const char *socinfo_machine(struct device *dev, unsigned int id) |
| 204 | { |
| 205 | int idx; |
| 206 | |
| 207 | for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) { |
| 208 | if (soc_id[idx].id == id) |
| 209 | return soc_id[idx].name; |
| 210 | } |
| 211 | |
| 212 | return NULL; |
| 213 | } |
| 214 | |
| 215 | #ifdef CONFIG_DEBUG_FS |
| 216 | |
| 217 | #define QCOM_OPEN(name, _func) \ |
| 218 | static int qcom_open_##name(struct inode *inode, struct file *file) \ |
| 219 | { \ |
| 220 | return single_open(file, _func, inode->i_private); \ |
| 221 | } \ |
| 222 | \ |
| 223 | static const struct file_operations qcom_ ##name## _ops = { \ |
| 224 | .open = qcom_open_##name, \ |
| 225 | .read = seq_read, \ |
| 226 | .llseek = seq_lseek, \ |
| 227 | .release = single_release, \ |
| 228 | } |
| 229 | |
| 230 | #define DEBUGFS_ADD(info, name) \ |
| 231 | debugfs_create_file(__stringify(name), 0400, \ |
| 232 | qcom_socinfo->dbg_root, \ |
| 233 | info, &qcom_ ##name## _ops) |
| 234 | |
| 235 | |
| 236 | static int qcom_show_build_id(struct seq_file *seq, void *p) |
| 237 | { |
| 238 | struct socinfo *socinfo = seq->private; |
| 239 | |
| 240 | seq_printf(seq, "%s\n", socinfo->build_id); |
| 241 | |
| 242 | return 0; |
| 243 | } |
| 244 | |
| 245 | static int qcom_show_pmic_model(struct seq_file *seq, void *p) |
| 246 | { |
| 247 | struct socinfo *socinfo = seq->private; |
| 248 | int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model)); |
| 249 | |
| 250 | if (model < 0) |
| 251 | return -EINVAL; |
| 252 | |
| 253 | seq_printf(seq, "%s\n", pmic_models[model]); |
| 254 | |
| 255 | return 0; |
| 256 | } |
| 257 | |
| 258 | static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p) |
| 259 | { |
| 260 | struct socinfo *socinfo = seq->private; |
| 261 | |
| 262 | seq_printf(seq, "%u.%u\n", |
| 263 | SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)), |
| 264 | SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev))); |
| 265 | |
| 266 | return 0; |
| 267 | } |
| 268 | |
| 269 | QCOM_OPEN(build_id, qcom_show_build_id); |
| 270 | QCOM_OPEN(pmic_model, qcom_show_pmic_model); |
| 271 | QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision); |
| 272 | |
| 273 | #define DEFINE_IMAGE_OPS(type) \ |
| 274 | static int show_image_##type(struct seq_file *seq, void *p) \ |
| 275 | { \ |
| 276 | struct smem_image_version *image_version = seq->private; \ |
| 277 | seq_puts(seq, image_version->type); \ |
| 278 | seq_puts(seq, "\n"); \ |
| 279 | return 0; \ |
| 280 | } \ |
| 281 | static int open_image_##type(struct inode *inode, struct file *file) \ |
| 282 | { \ |
| 283 | return single_open(file, show_image_##type, inode->i_private); \ |
| 284 | } \ |
| 285 | \ |
| 286 | static const struct file_operations qcom_image_##type##_ops = { \ |
| 287 | .open = open_image_##type, \ |
| 288 | .read = seq_read, \ |
| 289 | .llseek = seq_lseek, \ |
| 290 | .release = single_release, \ |
| 291 | } |
| 292 | |
| 293 | DEFINE_IMAGE_OPS(name); |
| 294 | DEFINE_IMAGE_OPS(variant); |
| 295 | DEFINE_IMAGE_OPS(oem); |
| 296 | |
| 297 | static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, |
| 298 | struct socinfo *info) |
| 299 | { |
| 300 | struct smem_image_version *versions; |
| 301 | struct dentry *dentry; |
| 302 | size_t size; |
| 303 | int i; |
| 304 | |
| 305 | qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL); |
| 306 | |
| 307 | qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt); |
| 308 | |
| 309 | switch (qcom_socinfo->info.fmt) { |
| 310 | case SOCINFO_VERSION(0, 12): |
| 311 | qcom_socinfo->info.chip_family = |
| 312 | __le32_to_cpu(info->chip_family); |
| 313 | qcom_socinfo->info.raw_device_family = |
| 314 | __le32_to_cpu(info->raw_device_family); |
| 315 | qcom_socinfo->info.raw_device_num = |
| 316 | __le32_to_cpu(info->raw_device_num); |
| 317 | |
| 318 | debugfs_create_x32("chip_family", 0400, qcom_socinfo->dbg_root, |
| 319 | &qcom_socinfo->info.chip_family); |
| 320 | debugfs_create_x32("raw_device_family", 0400, |
| 321 | qcom_socinfo->dbg_root, |
| 322 | &qcom_socinfo->info.raw_device_family); |
| 323 | debugfs_create_x32("raw_device_number", 0400, |
| 324 | qcom_socinfo->dbg_root, |
| 325 | &qcom_socinfo->info.raw_device_num); |
| 326 | /* Fall through */ |
| 327 | case SOCINFO_VERSION(0, 11): |
| 328 | case SOCINFO_VERSION(0, 10): |
| 329 | case SOCINFO_VERSION(0, 9): |
| 330 | qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id); |
| 331 | |
| 332 | debugfs_create_u32("foundry_id", 0400, qcom_socinfo->dbg_root, |
| 333 | &qcom_socinfo->info.foundry_id); |
| 334 | /* Fall through */ |
| 335 | case SOCINFO_VERSION(0, 8): |
| 336 | case SOCINFO_VERSION(0, 7): |
| 337 | DEBUGFS_ADD(info, pmic_model); |
| 338 | DEBUGFS_ADD(info, pmic_die_rev); |
| 339 | /* Fall through */ |
| 340 | case SOCINFO_VERSION(0, 6): |
| 341 | qcom_socinfo->info.hw_plat_subtype = |
| 342 | __le32_to_cpu(info->hw_plat_subtype); |
| 343 | |
| 344 | debugfs_create_u32("hardware_platform_subtype", 0400, |
| 345 | qcom_socinfo->dbg_root, |
| 346 | &qcom_socinfo->info.hw_plat_subtype); |
| 347 | /* Fall through */ |
| 348 | case SOCINFO_VERSION(0, 5): |
| 349 | qcom_socinfo->info.accessory_chip = |
| 350 | __le32_to_cpu(info->accessory_chip); |
| 351 | |
| 352 | debugfs_create_u32("accessory_chip", 0400, |
| 353 | qcom_socinfo->dbg_root, |
| 354 | &qcom_socinfo->info.accessory_chip); |
| 355 | /* Fall through */ |
| 356 | case SOCINFO_VERSION(0, 4): |
| 357 | qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver); |
| 358 | |
| 359 | debugfs_create_u32("platform_version", 0400, |
| 360 | qcom_socinfo->dbg_root, |
| 361 | &qcom_socinfo->info.plat_ver); |
| 362 | /* Fall through */ |
| 363 | case SOCINFO_VERSION(0, 3): |
| 364 | qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat); |
| 365 | |
| 366 | debugfs_create_u32("hardware_platform", 0400, |
| 367 | qcom_socinfo->dbg_root, |
| 368 | &qcom_socinfo->info.hw_plat); |
| 369 | /* Fall through */ |
| 370 | case SOCINFO_VERSION(0, 2): |
| 371 | qcom_socinfo->info.raw_ver = __le32_to_cpu(info->raw_ver); |
| 372 | |
| 373 | debugfs_create_u32("raw_version", 0400, qcom_socinfo->dbg_root, |
| 374 | &qcom_socinfo->info.raw_ver); |
| 375 | /* Fall through */ |
| 376 | case SOCINFO_VERSION(0, 1): |
| 377 | DEBUGFS_ADD(info, build_id); |
| 378 | break; |
| 379 | } |
| 380 | |
| 381 | versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_IMAGE_VERSION_TABLE, |
| 382 | &size); |
| 383 | |
| 384 | for (i = 0; i < ARRAY_SIZE(socinfo_image_names); i++) { |
| 385 | if (!socinfo_image_names[i]) |
| 386 | continue; |
| 387 | |
| 388 | dentry = debugfs_create_dir(socinfo_image_names[i], |
| 389 | qcom_socinfo->dbg_root); |
| 390 | debugfs_create_file("name", 0400, dentry, &versions[i], |
| 391 | &qcom_image_name_ops); |
| 392 | debugfs_create_file("variant", 0400, dentry, &versions[i], |
| 393 | &qcom_image_variant_ops); |
| 394 | debugfs_create_file("oem", 0400, dentry, &versions[i], |
| 395 | &qcom_image_oem_ops); |
| 396 | } |
| 397 | } |
| 398 | |
| 399 | static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) |
| 400 | { |
| 401 | debugfs_remove_recursive(qcom_socinfo->dbg_root); |
| 402 | } |
| 403 | #else |
| 404 | static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, |
| 405 | struct socinfo *info) |
| 406 | { |
| 407 | } |
| 408 | static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) { } |
| 409 | #endif /* CONFIG_DEBUG_FS */ |
| 410 | |
| 411 | static int qcom_socinfo_probe(struct platform_device *pdev) |
| 412 | { |
| 413 | struct qcom_socinfo *qs; |
| 414 | struct socinfo *info; |
| 415 | size_t item_size; |
| 416 | |
| 417 | info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID, |
| 418 | &item_size); |
| 419 | if (IS_ERR(info)) { |
| 420 | dev_err(&pdev->dev, "Couldn't find socinfo\n"); |
| 421 | return PTR_ERR(info); |
| 422 | } |
| 423 | |
| 424 | qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL); |
| 425 | if (!qs) |
| 426 | return -ENOMEM; |
| 427 | |
| 428 | qs->attr.family = "Snapdragon"; |
| 429 | qs->attr.machine = socinfo_machine(&pdev->dev, |
| 430 | le32_to_cpu(info->id)); |
| 431 | qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u", |
| 432 | SOCINFO_MAJOR(le32_to_cpu(info->ver)), |
| 433 | SOCINFO_MINOR(le32_to_cpu(info->ver))); |
| 434 | if (offsetof(struct socinfo, serial_num) <= item_size) |
| 435 | qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL, |
| 436 | "%u", |
| 437 | le32_to_cpu(info->serial_num)); |
| 438 | |
| 439 | qs->soc_dev = soc_device_register(&qs->attr); |
| 440 | if (IS_ERR(qs->soc_dev)) |
| 441 | return PTR_ERR(qs->soc_dev); |
| 442 | |
| 443 | socinfo_debugfs_init(qs, info); |
| 444 | |
| 445 | /* Feed the soc specific unique data into entropy pool */ |
| 446 | add_device_randomness(info, item_size); |
| 447 | |
| 448 | platform_set_drvdata(pdev, qs->soc_dev); |
| 449 | |
| 450 | return 0; |
| 451 | } |
| 452 | |
| 453 | static int qcom_socinfo_remove(struct platform_device *pdev) |
| 454 | { |
| 455 | struct qcom_socinfo *qs = platform_get_drvdata(pdev); |
| 456 | |
| 457 | soc_device_unregister(qs->soc_dev); |
| 458 | |
| 459 | socinfo_debugfs_exit(qs); |
| 460 | |
| 461 | return 0; |
| 462 | } |
| 463 | |
| 464 | static struct platform_driver qcom_socinfo_driver = { |
| 465 | .probe = qcom_socinfo_probe, |
| 466 | .remove = qcom_socinfo_remove, |
| 467 | .driver = { |
| 468 | .name = "qcom-socinfo", |
| 469 | }, |
| 470 | }; |
| 471 | |
| 472 | module_platform_driver(qcom_socinfo_driver); |
| 473 | |
| 474 | MODULE_DESCRIPTION("Qualcomm SoCinfo driver"); |
| 475 | MODULE_LICENSE("GPL v2"); |
| 476 | MODULE_ALIAS("platform:qcom-socinfo"); |