blob: d1708133fd548a8e8f4205f2a58b1cc64afeed76 [file] [log] [blame]
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
David Brazdil0f672f62019-12-10 10:32:29 +00004 * Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term *
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
6 * Copyright (C) 2010-2015 Emulex. All rights reserved. *
7 * EMULEX and SLI are trademarks of Emulex. *
8 * www.broadcom.com *
9 * *
10 * This program is free software; you can redistribute it and/or *
11 * modify it under the terms of version 2 of the GNU General *
12 * Public License as published by the Free Software Foundation. *
13 * This program is distributed in the hope that it will be useful. *
14 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
15 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
16 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
17 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
18 * TO BE LEGALLY INVALID. See the GNU General Public License for *
19 * more details, a copy of which can be found in the file COPYING *
20 * included with this package. *
21 *******************************************************************/
22/* bsg definitions
23 * No pointers to user data are allowed, all application buffers and sizes will
24 * derived through the bsg interface.
25 *
26 * These are the vendor unique structures passed in using the bsg
27 * FC_BSG_HST_VENDOR message code type.
28 */
29#define LPFC_BSG_VENDOR_SET_CT_EVENT 1
30#define LPFC_BSG_VENDOR_GET_CT_EVENT 2
31#define LPFC_BSG_VENDOR_SEND_MGMT_RESP 3
32#define LPFC_BSG_VENDOR_DIAG_MODE 4
33#define LPFC_BSG_VENDOR_DIAG_RUN_LOOPBACK 5
34#define LPFC_BSG_VENDOR_GET_MGMT_REV 6
35#define LPFC_BSG_VENDOR_MBOX 7
36#define LPFC_BSG_VENDOR_MENLO_CMD 8
37#define LPFC_BSG_VENDOR_MENLO_DATA 9
38#define LPFC_BSG_VENDOR_DIAG_MODE_END 10
39#define LPFC_BSG_VENDOR_LINK_DIAG_TEST 11
40#define LPFC_BSG_VENDOR_FORCED_LINK_SPEED 14
David Brazdil0f672f62019-12-10 10:32:29 +000041#define LPFC_BSG_VENDOR_RAS_GET_LWPD 16
42#define LPFC_BSG_VENDOR_RAS_GET_FWLOG 17
43#define LPFC_BSG_VENDOR_RAS_GET_CONFIG 18
44#define LPFC_BSG_VENDOR_RAS_SET_CONFIG 19
45#define LPFC_BSG_VENDOR_GET_TRUNK_INFO 20
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000046
47struct set_ct_event {
48 uint32_t command;
49 uint32_t type_mask;
50 uint32_t ev_req_id;
51 uint32_t ev_reg_id;
52};
53
54struct get_ct_event {
55 uint32_t command;
56 uint32_t ev_reg_id;
57 uint32_t ev_req_id;
58};
59
60struct get_ct_event_reply {
61 uint32_t immed_data;
62 uint32_t type;
63};
64
65struct send_mgmt_resp {
66 uint32_t command;
67 uint32_t tag;
68};
69
70
David Brazdil0f672f62019-12-10 10:32:29 +000071#define DISABLE_LOOP_BACK 0x0 /* disables loop back */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000072#define INTERNAL_LOOP_BACK 0x1 /* adapter short cuts the loop internally */
73#define EXTERNAL_LOOP_BACK 0x2 /* requires an external loopback plug */
74
75struct diag_mode_set {
76 uint32_t command;
77 uint32_t type;
78 uint32_t timeout;
David Brazdil0f672f62019-12-10 10:32:29 +000079 uint32_t physical_link;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000080};
81
82struct sli4_link_diag {
83 uint32_t command;
84 uint32_t timeout;
85 uint32_t test_id;
86 uint32_t loops;
87 uint32_t test_version;
88 uint32_t error_action;
89};
90
91struct diag_mode_test {
92 uint32_t command;
93};
94
95struct diag_status {
96 uint32_t mbox_status;
97 uint32_t shdr_status;
98 uint32_t shdr_add_status;
99};
100
101#define LPFC_WWNN_TYPE 0
102#define LPFC_WWPN_TYPE 1
103
104struct get_mgmt_rev {
105 uint32_t command;
106};
107
108#define MANAGEMENT_MAJOR_REV 1
109#define MANAGEMENT_MINOR_REV 1
110
111/* the MgmtRevInfo structure */
112struct MgmtRevInfo {
113 uint32_t a_Major;
114 uint32_t a_Minor;
115};
116
117struct get_mgmt_rev_reply {
118 struct MgmtRevInfo info;
119};
120
121#define BSG_MBOX_SIZE 4096 /* mailbox command plus extended data */
122
123/* BSG mailbox request header */
124struct dfc_mbox_req {
125 uint32_t command;
126 uint32_t mbOffset;
127 uint32_t inExtWLen;
128 uint32_t outExtWLen;
129 uint32_t extMboxTag;
130 uint32_t extSeqNum;
131};
132
133/* Used for menlo command or menlo data. The xri is only used for menlo data */
134struct menlo_command {
135 uint32_t cmd;
136 uint32_t xri;
137};
138
139struct menlo_response {
140 uint32_t xri; /* return the xri of the iocb exchange */
141};
142
143/*
144 * macros and data structures for handling sli-config mailbox command
145 * pass-through support, this header file is shared between user and
146 * kernel spaces, note the set of macros are duplicates from lpfc_hw4.h,
147 * with macro names prefixed with bsg_, as the macros defined in
148 * lpfc_hw4.h are not accessible from user space.
149 */
150
151/* Macros to deal with bit fields. Each bit field must have 3 #defines
152 * associated with it (_SHIFT, _MASK, and _WORD).
153 * EG. For a bit field that is in the 7th bit of the "field4" field of a
154 * structure and is 2 bits in size the following #defines must exist:
155 * struct temp {
156 * uint32_t field1;
157 * uint32_t field2;
158 * uint32_t field3;
159 * uint32_t field4;
160 * #define example_bit_field_SHIFT 7
161 * #define example_bit_field_MASK 0x03
162 * #define example_bit_field_WORD field4
163 * uint32_t field5;
164 * };
165 * Then the macros below may be used to get or set the value of that field.
166 * EG. To get the value of the bit field from the above example:
167 * struct temp t1;
168 * value = bsg_bf_get(example_bit_field, &t1);
169 * And then to set that bit field:
170 * bsg_bf_set(example_bit_field, &t1, 2);
171 * Or clear that bit field:
172 * bsg_bf_set(example_bit_field, &t1, 0);
173 */
174#define bsg_bf_get_le32(name, ptr) \
175 ((le32_to_cpu((ptr)->name##_WORD) >> name##_SHIFT) & name##_MASK)
176#define bsg_bf_get(name, ptr) \
177 (((ptr)->name##_WORD >> name##_SHIFT) & name##_MASK)
178#define bsg_bf_set_le32(name, ptr, value) \
179 ((ptr)->name##_WORD = cpu_to_le32(((((value) & \
180 name##_MASK) << name##_SHIFT) | (le32_to_cpu((ptr)->name##_WORD) & \
181 ~(name##_MASK << name##_SHIFT)))))
182#define bsg_bf_set(name, ptr, value) \
183 ((ptr)->name##_WORD = ((((value) & name##_MASK) << name##_SHIFT) | \
184 ((ptr)->name##_WORD & ~(name##_MASK << name##_SHIFT))))
185
186/*
187 * The sli_config structure specified here is based on the following
188 * restriction:
189 *
190 * -- SLI_CONFIG EMB=0, carrying MSEs, will carry subcommands without
191 * carrying HBD.
192 * -- SLI_CONFIG EMB=1, not carrying MSE, will carry subcommands with or
193 * without carrying HBDs.
194 */
195
196struct lpfc_sli_config_mse {
197 uint32_t pa_lo;
198 uint32_t pa_hi;
199 uint32_t buf_len;
200#define lpfc_mbox_sli_config_mse_len_SHIFT 0
201#define lpfc_mbox_sli_config_mse_len_MASK 0xffffff
202#define lpfc_mbox_sli_config_mse_len_WORD buf_len
203};
204
205struct lpfc_sli_config_hbd {
206 uint32_t buf_len;
207#define lpfc_mbox_sli_config_ecmn_hbd_len_SHIFT 0
208#define lpfc_mbox_sli_config_ecmn_hbd_len_MASK 0xffffff
209#define lpfc_mbox_sli_config_ecmn_hbd_len_WORD buf_len
210 uint32_t pa_lo;
211 uint32_t pa_hi;
212};
213
214struct lpfc_sli_config_hdr {
215 uint32_t word1;
216#define lpfc_mbox_hdr_emb_SHIFT 0
217#define lpfc_mbox_hdr_emb_MASK 0x00000001
218#define lpfc_mbox_hdr_emb_WORD word1
219#define lpfc_mbox_hdr_mse_cnt_SHIFT 3
220#define lpfc_mbox_hdr_mse_cnt_MASK 0x0000001f
221#define lpfc_mbox_hdr_mse_cnt_WORD word1
222 uint32_t payload_length;
223 uint32_t tag_lo;
224 uint32_t tag_hi;
225 uint32_t reserved5;
226};
227
228struct lpfc_sli_config_emb0_subsys {
229 struct lpfc_sli_config_hdr sli_config_hdr;
230#define LPFC_MBX_SLI_CONFIG_MAX_MSE 19
231 struct lpfc_sli_config_mse mse[LPFC_MBX_SLI_CONFIG_MAX_MSE];
232 uint32_t padding;
233 uint32_t word64;
234#define lpfc_emb0_subcmnd_opcode_SHIFT 0
235#define lpfc_emb0_subcmnd_opcode_MASK 0xff
236#define lpfc_emb0_subcmnd_opcode_WORD word64
237#define lpfc_emb0_subcmnd_subsys_SHIFT 8
238#define lpfc_emb0_subcmnd_subsys_MASK 0xff
239#define lpfc_emb0_subcmnd_subsys_WORD word64
240/* Subsystem FCOE (0x0C) OpCodes */
241#define SLI_CONFIG_SUBSYS_FCOE 0x0C
242#define FCOE_OPCODE_READ_FCF 0x08
243#define FCOE_OPCODE_ADD_FCF 0x09
244#define FCOE_OPCODE_SET_DPORT_MODE 0x27
245#define FCOE_OPCODE_GET_DPORT_RESULTS 0x28
246};
247
248struct lpfc_sli_config_emb1_subsys {
249 struct lpfc_sli_config_hdr sli_config_hdr;
250 uint32_t word6;
251#define lpfc_emb1_subcmnd_opcode_SHIFT 0
252#define lpfc_emb1_subcmnd_opcode_MASK 0xff
253#define lpfc_emb1_subcmnd_opcode_WORD word6
254#define lpfc_emb1_subcmnd_subsys_SHIFT 8
255#define lpfc_emb1_subcmnd_subsys_MASK 0xff
256#define lpfc_emb1_subcmnd_subsys_WORD word6
257/* Subsystem COMN (0x01) OpCodes */
258#define SLI_CONFIG_SUBSYS_COMN 0x01
259#define COMN_OPCODE_GET_PROFILE_CONFIG 0xA4
260#define COMN_OPCODE_READ_OBJECT 0xAB
261#define COMN_OPCODE_WRITE_OBJECT 0xAC
262#define COMN_OPCODE_READ_OBJECT_LIST 0xAD
263#define COMN_OPCODE_DELETE_OBJECT 0xAE
264#define COMN_OPCODE_GET_CNTL_ADDL_ATTRIBUTES 0x79
265#define COMN_OPCODE_GET_CNTL_ATTRIBUTES 0x20
266 uint32_t timeout;
267 uint32_t request_length;
268 uint32_t word9;
269#define lpfc_subcmnd_version_SHIFT 0
270#define lpfc_subcmnd_version_MASK 0xff
271#define lpfc_subcmnd_version_WORD word9
272 uint32_t word10;
273#define lpfc_subcmnd_ask_rd_len_SHIFT 0
274#define lpfc_subcmnd_ask_rd_len_MASK 0xffffff
275#define lpfc_subcmnd_ask_rd_len_WORD word10
276 uint32_t rd_offset;
277 uint32_t obj_name[26];
278 uint32_t hbd_count;
279#define LPFC_MBX_SLI_CONFIG_MAX_HBD 8
280 struct lpfc_sli_config_hbd hbd[LPFC_MBX_SLI_CONFIG_MAX_HBD];
281};
282
283struct lpfc_sli_config_mbox {
284 uint32_t word0;
285#define lpfc_mqe_status_SHIFT 16
286#define lpfc_mqe_status_MASK 0x0000FFFF
287#define lpfc_mqe_status_WORD word0
288#define lpfc_mqe_command_SHIFT 8
289#define lpfc_mqe_command_MASK 0x000000FF
290#define lpfc_mqe_command_WORD word0
291 union {
292 struct lpfc_sli_config_emb0_subsys sli_config_emb0_subsys;
293 struct lpfc_sli_config_emb1_subsys sli_config_emb1_subsys;
294 } un;
295};
296
297#define LPFC_FORCED_LINK_SPEED_NOT_SUPPORTED 0
298#define LPFC_FORCED_LINK_SPEED_SUPPORTED 1
299struct get_forced_link_speed_support {
300 uint32_t command;
301};
302struct forced_link_speed_support_reply {
303 uint8_t supported;
304};
305
David Brazdil0f672f62019-12-10 10:32:29 +0000306struct lpfc_bsg_ras_req {
307 uint32_t command;
308};
309
310struct lpfc_bsg_get_fwlog_req {
311 uint32_t command;
312 uint32_t read_size;
313 uint32_t read_offset;
314};
315
316struct lpfc_bsg_get_ras_lwpd {
317 uint32_t offset;
318 uint32_t wrap_count;
319};
320
321struct lpfc_bsg_set_ras_config_req {
322 uint32_t command;
323 uint8_t action;
324#define LPFC_RASACTION_STOP_LOGGING 0x00
325#define LPFC_RASACTION_START_LOGGING 0x01
326 uint8_t log_level;
327};
328
329struct lpfc_bsg_get_ras_config_reply {
330 uint8_t state;
331#define LPFC_RASLOG_STATE_STOPPED 0x00
332#define LPFC_RASLOG_STATE_RUNNING 0x01
333 uint8_t log_level;
334 uint32_t log_buff_sz;
335};
336
337struct lpfc_trunk_info {
338 uint32_t word0;
339#define lpfc_trunk_info_link_status_SHIFT 0
340#define lpfc_trunk_info_link_status_MASK 1
341#define lpfc_trunk_info_link_status_WORD word0
342#define lpfc_trunk_info_trunk_active0_SHIFT 8
343#define lpfc_trunk_info_trunk_active0_MASK 1
344#define lpfc_trunk_info_trunk_active0_WORD word0
345#define lpfc_trunk_info_trunk_active1_SHIFT 9
346#define lpfc_trunk_info_trunk_active1_MASK 1
347#define lpfc_trunk_info_trunk_active1_WORD word0
348#define lpfc_trunk_info_trunk_active2_SHIFT 10
349#define lpfc_trunk_info_trunk_active2_MASK 1
350#define lpfc_trunk_info_trunk_active2_WORD word0
351#define lpfc_trunk_info_trunk_active3_SHIFT 11
352#define lpfc_trunk_info_trunk_active3_MASK 1
353#define lpfc_trunk_info_trunk_active3_WORD word0
354#define lpfc_trunk_info_trunk_config0_SHIFT 12
355#define lpfc_trunk_info_trunk_config0_MASK 1
356#define lpfc_trunk_info_trunk_config0_WORD word0
357#define lpfc_trunk_info_trunk_config1_SHIFT 13
358#define lpfc_trunk_info_trunk_config1_MASK 1
359#define lpfc_trunk_info_trunk_config1_WORD word0
360#define lpfc_trunk_info_trunk_config2_SHIFT 14
361#define lpfc_trunk_info_trunk_config2_MASK 1
362#define lpfc_trunk_info_trunk_config2_WORD word0
363#define lpfc_trunk_info_trunk_config3_SHIFT 15
364#define lpfc_trunk_info_trunk_config3_MASK 1
365#define lpfc_trunk_info_trunk_config3_WORD word0
366 uint16_t port_speed;
367 uint16_t logical_speed;
368 uint32_t reserved3;
369};
370
371struct get_trunk_info_req {
372 uint32_t command;
373};
374
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000375/* driver only */
376#define SLI_CONFIG_NOT_HANDLED 0
377#define SLI_CONFIG_HANDLED 1