David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * CIMaX SP2/HF CI driver |
| 4 | * |
| 5 | * Copyright (C) 2014 Olli Salonen <olli.salonen@iki.fi> |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef SP2_PRIV_H |
| 9 | #define SP2_PRIV_H |
| 10 | |
| 11 | #include "sp2.h" |
| 12 | #include <media/dvb_frontend.h> |
| 13 | |
| 14 | /* state struct */ |
| 15 | struct sp2 { |
| 16 | int status; |
| 17 | struct i2c_client *client; |
| 18 | struct dvb_adapter *dvb_adap; |
| 19 | struct dvb_ca_en50221 ca; |
| 20 | int module_access_type; |
| 21 | unsigned long next_status_checked_time; |
| 22 | void *priv; |
| 23 | void *ci_control; |
| 24 | }; |
| 25 | |
| 26 | #define SP2_CI_ATTR_ACS 0x00 |
| 27 | #define SP2_CI_IO_ACS 0x04 |
| 28 | #define SP2_CI_WR 0 |
| 29 | #define SP2_CI_RD 1 |
| 30 | |
| 31 | /* Module control register (0x00 module A, 0x09 module B) bits */ |
| 32 | #define SP2_MOD_CTL_DET 0x01 |
| 33 | #define SP2_MOD_CTL_AUTO 0x02 |
| 34 | #define SP2_MOD_CTL_ACS0 0x04 |
| 35 | #define SP2_MOD_CTL_ACS1 0x08 |
| 36 | #define SP2_MOD_CTL_HAD 0x10 |
| 37 | #define SP2_MOD_CTL_TSIEN 0x20 |
| 38 | #define SP2_MOD_CTL_TSOEN 0x40 |
| 39 | #define SP2_MOD_CTL_RST 0x80 |
| 40 | |
| 41 | #endif |