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Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2001 - 2012 Tensilica Inc.
7 */
8
9#ifndef _XTENSA_SYSTEM_H
10#define _XTENSA_SYSTEM_H
11
David Brazdil0f672f62019-12-10 10:32:29 +000012#include <asm/core.h>
13
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000014#define mb() ({ __asm__ __volatile__("memw" : : : "memory"); })
15#define rmb() barrier()
16#define wmb() mb()
17
David Brazdil0f672f62019-12-10 10:32:29 +000018#if XCHAL_HAVE_S32C1I
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000019#define __smp_mb__before_atomic() barrier()
20#define __smp_mb__after_atomic() barrier()
David Brazdil0f672f62019-12-10 10:32:29 +000021#endif
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000022
23#include <asm-generic/barrier.h>
24
25#endif /* _XTENSA_SYSTEM_H */