David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* -*- linux-c -*- ------------------------------------------------------- * |
| 3 | * |
| 4 | * Copyright (C) 1991, 1992 Linus Torvalds |
| 5 | * Copyright 2007-2008 rPath, Inc. - All Rights Reserved |
| 6 | * Copyright 2009 Intel Corporation; author H. Peter Anvin |
| 7 | * |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 8 | * ----------------------------------------------------------------------- */ |
| 9 | |
| 10 | /* |
| 11 | * Enable A20 gate (return -1 on failure) |
| 12 | */ |
| 13 | |
| 14 | #include "boot.h" |
| 15 | |
| 16 | #define MAX_8042_LOOPS 100000 |
| 17 | #define MAX_8042_FF 32 |
| 18 | |
| 19 | static int empty_8042(void) |
| 20 | { |
| 21 | u8 status; |
| 22 | int loops = MAX_8042_LOOPS; |
| 23 | int ffs = MAX_8042_FF; |
| 24 | |
| 25 | while (loops--) { |
| 26 | io_delay(); |
| 27 | |
| 28 | status = inb(0x64); |
| 29 | if (status == 0xff) { |
| 30 | /* FF is a plausible, but very unlikely status */ |
| 31 | if (!--ffs) |
| 32 | return -1; /* Assume no KBC present */ |
| 33 | } |
| 34 | if (status & 1) { |
| 35 | /* Read and discard input data */ |
| 36 | io_delay(); |
| 37 | (void)inb(0x60); |
| 38 | } else if (!(status & 2)) { |
| 39 | /* Buffers empty, finished! */ |
| 40 | return 0; |
| 41 | } |
| 42 | } |
| 43 | |
| 44 | return -1; |
| 45 | } |
| 46 | |
| 47 | /* Returns nonzero if the A20 line is enabled. The memory address |
| 48 | used as a test is the int $0x80 vector, which should be safe. */ |
| 49 | |
| 50 | #define A20_TEST_ADDR (4*0x80) |
| 51 | #define A20_TEST_SHORT 32 |
| 52 | #define A20_TEST_LONG 2097152 /* 2^21 */ |
| 53 | |
| 54 | static int a20_test(int loops) |
| 55 | { |
| 56 | int ok = 0; |
| 57 | int saved, ctr; |
| 58 | |
| 59 | set_fs(0x0000); |
| 60 | set_gs(0xffff); |
| 61 | |
| 62 | saved = ctr = rdfs32(A20_TEST_ADDR); |
| 63 | |
| 64 | while (loops--) { |
| 65 | wrfs32(++ctr, A20_TEST_ADDR); |
| 66 | io_delay(); /* Serialize and make delay constant */ |
| 67 | ok = rdgs32(A20_TEST_ADDR+0x10) ^ ctr; |
| 68 | if (ok) |
| 69 | break; |
| 70 | } |
| 71 | |
| 72 | wrfs32(saved, A20_TEST_ADDR); |
| 73 | return ok; |
| 74 | } |
| 75 | |
| 76 | /* Quick test to see if A20 is already enabled */ |
| 77 | static int a20_test_short(void) |
| 78 | { |
| 79 | return a20_test(A20_TEST_SHORT); |
| 80 | } |
| 81 | |
| 82 | /* Longer test that actually waits for A20 to come on line; this |
| 83 | is useful when dealing with the KBC or other slow external circuitry. */ |
| 84 | static int a20_test_long(void) |
| 85 | { |
| 86 | return a20_test(A20_TEST_LONG); |
| 87 | } |
| 88 | |
| 89 | static void enable_a20_bios(void) |
| 90 | { |
| 91 | struct biosregs ireg; |
| 92 | |
| 93 | initregs(&ireg); |
| 94 | ireg.ax = 0x2401; |
| 95 | intcall(0x15, &ireg, NULL); |
| 96 | } |
| 97 | |
| 98 | static void enable_a20_kbc(void) |
| 99 | { |
| 100 | empty_8042(); |
| 101 | |
| 102 | outb(0xd1, 0x64); /* Command write */ |
| 103 | empty_8042(); |
| 104 | |
| 105 | outb(0xdf, 0x60); /* A20 on */ |
| 106 | empty_8042(); |
| 107 | |
| 108 | outb(0xff, 0x64); /* Null command, but UHCI wants it */ |
| 109 | empty_8042(); |
| 110 | } |
| 111 | |
| 112 | static void enable_a20_fast(void) |
| 113 | { |
| 114 | u8 port_a; |
| 115 | |
| 116 | port_a = inb(0x92); /* Configuration port A */ |
| 117 | port_a |= 0x02; /* Enable A20 */ |
| 118 | port_a &= ~0x01; /* Do not reset machine */ |
| 119 | outb(port_a, 0x92); |
| 120 | } |
| 121 | |
| 122 | /* |
| 123 | * Actual routine to enable A20; return 0 on ok, -1 on failure |
| 124 | */ |
| 125 | |
| 126 | #define A20_ENABLE_LOOPS 255 /* Number of times to try */ |
| 127 | |
| 128 | int enable_a20(void) |
| 129 | { |
| 130 | int loops = A20_ENABLE_LOOPS; |
| 131 | int kbc_err; |
| 132 | |
| 133 | while (loops--) { |
| 134 | /* First, check to see if A20 is already enabled |
| 135 | (legacy free, etc.) */ |
| 136 | if (a20_test_short()) |
| 137 | return 0; |
| 138 | |
| 139 | /* Next, try the BIOS (INT 0x15, AX=0x2401) */ |
| 140 | enable_a20_bios(); |
| 141 | if (a20_test_short()) |
| 142 | return 0; |
| 143 | |
| 144 | /* Try enabling A20 through the keyboard controller */ |
| 145 | kbc_err = empty_8042(); |
| 146 | |
| 147 | if (a20_test_short()) |
| 148 | return 0; /* BIOS worked, but with delayed reaction */ |
| 149 | |
| 150 | if (!kbc_err) { |
| 151 | enable_a20_kbc(); |
| 152 | if (a20_test_long()) |
| 153 | return 0; |
| 154 | } |
| 155 | |
| 156 | /* Finally, try enabling the "fast A20 gate" */ |
| 157 | enable_a20_fast(); |
| 158 | if (a20_test_long()) |
| 159 | return 0; |
| 160 | } |
| 161 | |
| 162 | return -1; |
| 163 | } |