TrustedFirmware Git Browser
Code Review Sign In
review.trustedfirmware.org / hafnium / third_party / linux.git / 0f672f6c0b52b7b0700b0915c72b540721af4465 / . / arch / powerpc / boot / dts / mpc8272ads.dts
blob: 13ec786f6adf0975fd2c56b4b75b157aca4e6304 [file] [log] [blame]
David Brazdil0f672f62019-12-10 10:32:29 +0000[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0-or-later
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]2/*
3 * MPC8272 ADS Device Tree Source
4 *
5 * Copyright 2005,2008 Freescale Semiconductor Inc.
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]6 */
7
8/dts-v1/;
9
10/ {
11 model = "MPC8272ADS";
12 compatible = "fsl,mpc8272ads";
13 #address-cells = <1>;
14 #size-cells = <1>;
15
16 aliases {
17 ethernet0 = &eth0;
18 ethernet1 = &eth1;
19 serial0 = &scc1;
20 serial1 = &scc4;
21 };
22
23 cpus {
24 #address-cells = <1>;
25 #size-cells = <0>;
26
27 PowerPC,8272@0 {
28 device_type = "cpu";
29 reg = <0x0>;
30 d-cache-line-size = <32>;
31 i-cache-line-size = <32>;
32 d-cache-size = <16384>;
33 i-cache-size = <16384>;
34 timebase-frequency = <0>;
35 bus-frequency = <0>;
36 clock-frequency = <0>;
37 };
38 };
39
40 memory {
41 device_type = "memory";
42 reg = <0x0 0x0>;
43 };
44
45 localbus@f0010100 {
46 compatible = "fsl,mpc8272-localbus",
47 "fsl,pq2-localbus";
48 #address-cells = <2>;
49 #size-cells = <1>;
50 reg = <0xf0010100 0x40>;
51
52 ranges = <0x0 0x0 0xff800000 0x00800000
53 0x1 0x0 0xf4500000 0x8000
54 0x3 0x0 0xf8200000 0x8000>;
55
56 flash@0,0 {
57 compatible = "jedec-flash";
58 reg = <0x0 0x0 0x00800000>;
59 bank-width = <4>;
60 device-width = <1>;
61 };
62
63 board-control@1,0 {
64 reg = <0x1 0x0 0x20>;
65 compatible = "fsl,mpc8272ads-bcsr";
66 };
67
68 PCI_PIC: interrupt-controller@3,0 {
69 compatible = "fsl,mpc8272ads-pci-pic",
70 "fsl,pq2ads-pci-pic";
71 #interrupt-cells = <1>;
72 interrupt-controller;
73 reg = <0x3 0x0 0x8>;
74 interrupt-parent = <&PIC>;
75 interrupts = <20 8>;
76 };
77 };
78
79
80 pci@f0010800 {
81 device_type = "pci";
82 reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
83 compatible = "fsl,mpc8272-pci", "fsl,pq2-pci";
84 #interrupt-cells = <1>;
85 #size-cells = <2>;
86 #address-cells = <3>;
87 clock-frequency = <66666666>;
88 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
89 interrupt-map = <
90 /* IDSEL 0x16 */
91 0xb000 0x0 0x0 0x1 &PCI_PIC 0
92 0xb000 0x0 0x0 0x2 &PCI_PIC 1
93 0xb000 0x0 0x0 0x3 &PCI_PIC 2
94 0xb000 0x0 0x0 0x4 &PCI_PIC 3
95
96 /* IDSEL 0x17 */
97 0xb800 0x0 0x0 0x1 &PCI_PIC 4
98 0xb800 0x0 0x0 0x2 &PCI_PIC 5
99 0xb800 0x0 0x0 0x3 &PCI_PIC 6
100 0xb800 0x0 0x0 0x4 &PCI_PIC 7
101
102 /* IDSEL 0x18 */
103 0xc000 0x0 0x0 0x1 &PCI_PIC 8
104 0xc000 0x0 0x0 0x2 &PCI_PIC 9
105 0xc000 0x0 0x0 0x3 &PCI_PIC 10
106 0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
107
108 interrupt-parent = <&PIC>;
109 interrupts = <18 8>;
110 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
111 0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
112 0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
113 };
114
115 soc@f0000000 {
116 #address-cells = <1>;
117 #size-cells = <1>;
118 device_type = "soc";
119 compatible = "fsl,mpc8272", "fsl,pq2-soc";
120 ranges = <0x0 0xf0000000 0x53000>;
121
122 // Temporary -- will go away once kernel uses ranges for get_immrbase().
123 reg = <0xf0000000 0x53000>;
124
125 cpm@119c0 {
126 #address-cells = <1>;
127 #size-cells = <1>;
128 compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
129 reg = <0x119c0 0x30>;
130 ranges;
131
132 muram@0 {
133 #address-cells = <1>;
134 #size-cells = <1>;
135 ranges = <0x0 0x0 0x10000>;
136
137 data@0 {
138 compatible = "fsl,cpm-muram-data";
139 reg = <0x0 0x2000 0x9800 0x800>;
140 };
141 };
142
143 brg@119f0 {
144 compatible = "fsl,mpc8272-brg",
145 "fsl,cpm2-brg",
146 "fsl,cpm-brg";
147 reg = <0x119f0 0x10 0x115f0 0x10>;
148 };
149
150 scc1: serial@11a00 {
151 device_type = "serial";
152 compatible = "fsl,mpc8272-scc-uart",
153 "fsl,cpm2-scc-uart";
154 reg = <0x11a00 0x20 0x8000 0x100>;
155 interrupts = <40 8>;
156 interrupt-parent = <&PIC>;
157 fsl,cpm-brg = <1>;
158 fsl,cpm-command = <0x800000>;
159 };
160
161 scc4: serial@11a60 {
162 device_type = "serial";
163 compatible = "fsl,mpc8272-scc-uart",
164 "fsl,cpm2-scc-uart";
165 reg = <0x11a60 0x20 0x8300 0x100>;
166 interrupts = <43 8>;
167 interrupt-parent = <&PIC>;
168 fsl,cpm-brg = <4>;
169 fsl,cpm-command = <0xce00000>;
170 };
171
172 usb@11b60 {
173 compatible = "fsl,mpc8272-cpm-usb";
174 reg = <0x11b60 0x40 0x8b00 0x100>;
175 interrupts = <11 8>;
176 interrupt-parent = <&PIC>;
177 mode = "peripheral";
178 };
179
180 mdio@10d40 {
181 compatible = "fsl,mpc8272ads-mdio-bitbang",
182 "fsl,mpc8272-mdio-bitbang",
183 "fsl,cpm2-mdio-bitbang";
184 reg = <0x10d40 0x14>;
185 #address-cells = <1>;
186 #size-cells = <0>;
187 fsl,mdio-pin = <18>;
188 fsl,mdc-pin = <19>;
189
190 PHY0: ethernet-phy@0 {
191 interrupt-parent = <&PIC>;
192 interrupts = <23 8>;
193 reg = <0x0>;
194 };
195
196 PHY1: ethernet-phy@1 {
197 interrupt-parent = <&PIC>;
198 interrupts = <23 8>;
199 reg = <0x3>;
200 };
201 };
202
203 eth0: ethernet@11300 {
204 device_type = "network";
205 compatible = "fsl,mpc8272-fcc-enet",
206 "fsl,cpm2-fcc-enet";
207 reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
208 local-mac-address = [ 00 00 00 00 00 00 ];
209 interrupts = <32 8>;
210 interrupt-parent = <&PIC>;
211 phy-handle = <&PHY0>;
212 linux,network-index = <0>;
213 fsl,cpm-command = <0x12000300>;
214 };
215
216 eth1: ethernet@11320 {
217 device_type = "network";
218 compatible = "fsl,mpc8272-fcc-enet",
219 "fsl,cpm2-fcc-enet";
220 reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
221 local-mac-address = [ 00 00 00 00 00 00 ];
222 interrupts = <33 8>;
223 interrupt-parent = <&PIC>;
224 phy-handle = <&PHY1>;
225 linux,network-index = <1>;
226 fsl,cpm-command = <0x16200300>;
227 };
228
229 i2c@11860 {
230 compatible = "fsl,mpc8272-i2c",
231 "fsl,cpm2-i2c";
232 reg = <0x11860 0x20 0x8afc 0x2>;
233 interrupts = <1 8>;
234 interrupt-parent = <&PIC>;
235 fsl,cpm-command = <0x29600000>;
236 #address-cells = <1>;
237 #size-cells = <0>;
238 };
239 };
240
241 PIC: interrupt-controller@10c00 {
242 #interrupt-cells = <2>;
243 interrupt-controller;
244 reg = <0x10c00 0x80>;
245 compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
246 };
247
248 crypto@30000 {
249 compatible = "fsl,sec1.0";
250 reg = <0x40000 0x13000>;
251 interrupts = <47 0x8>;
252 interrupt-parent = <&PIC>;
253 fsl,num-channels = <4>;
254 fsl,channel-fifo-len = <24>;
255 fsl,exec-units-mask = <0x7e>;
256 fsl,descriptor-types-mask = <0x1010415>;
257 };
258 };
259
260 chosen {
261 stdout-path = "/soc/cpm/serial@11a00";
262 };
263};