| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Definitions for Freescale Coldfire QSPI module |
| 4 | * |
| 5 | * Copyright 2010 Steven King <sfking@fdwdc.com> |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef mcfqspi_h |
| 9 | #define mcfqspi_h |
| 10 | |
| 11 | /** |
| 12 | * struct mcfqspi_cs_control - chip select control for the coldfire qspi driver |
| 13 | * @setup: setup the control; allocate gpio's, etc. May be NULL. |
| 14 | * @teardown: finish with the control; free gpio's, etc. May be NULL. |
| 15 | * @select: output the signals to select the device. Can not be NULL. |
| 16 | * @deselect: output the signals to deselect the device. Can not be NULL. |
| 17 | * |
| 18 | * The QSPI module has 4 hardware chip selects. We don't use them. Instead |
| 19 | * platforms are required to supply a mcfqspi_cs_control as a part of the |
| 20 | * platform data for each QSPI master controller. Only the select and |
| 21 | * deselect functions are required. |
| 22 | */ |
| 23 | struct mcfqspi_cs_control { |
| 24 | int (*setup)(struct mcfqspi_cs_control *); |
| 25 | void (*teardown)(struct mcfqspi_cs_control *); |
| 26 | void (*select)(struct mcfqspi_cs_control *, u8, bool); |
| 27 | void (*deselect)(struct mcfqspi_cs_control *, u8, bool); |
| 28 | }; |
| 29 | |
| 30 | /** |
| 31 | * struct mcfqspi_platform_data - platform data for the coldfire qspi driver |
| 32 | * @bus_num: board specific identifier for this qspi driver. |
| 33 | * @num_chipselects: number of chip selects supported by this qspi driver. |
| 34 | * @cs_control: platform dependent chip select control. |
| 35 | */ |
| 36 | struct mcfqspi_platform_data { |
| 37 | s16 bus_num; |
| 38 | u16 num_chipselect; |
| 39 | struct mcfqspi_cs_control *cs_control; |
| 40 | }; |
| 41 | |
| 42 | #endif /* mcfqspi_h */ |